Bug 110200 - [Regression][bisected] with gl_nir_lower_buffers (most likely)
Summary: [Regression][bisected] with gl_nir_lower_buffers (most likely)
Alias: None
Product: Mesa
Classification: Unclassified
Component: Drivers/DRI/i965 (show other bugs)
Version: git
Hardware: x86-64 (AMD64) Linux (All)
: medium normal
Assignee: Jason Ekstrand
QA Contact: Intel 3D Bugs Mailing List
Keywords: bisected, regression
Depends on:
Reported: 2019-03-19 19:30 UTC by Gert Wollny
Modified: 2019-03-21 08:53 UTC (History)
0 users

See Also:
i915 platform:
i915 features:

Diff between fs logs (144.21 KB, patch)
2019-03-19 19:30 UTC, Gert Wollny
Details | Splinter Review

Description Gert Wollny 2019-03-19 19:30:06 UTC
Created attachment 143735 [details] [review]
Diff between fs logs

With commit be2990d8fbcd5b4b450e7bfd2053b62d66153b8d 
   i965: Stop setting LowerBuferInterfaceBlocks

dEQP-GLES31.functional.synchronization.in_invocation.ssbo_alias_overwrite fails when run through virglrenderer with i965 as GL host.

In the created NIR shaders block 19 a load_ssbo that is present in the nir created before applying the patch is missing in the version with the patch, and to me it seems that this is not the result of a proper optimization, because the value that is read from the ssbo in the older version is replaced by a literal constant, so I would guess that the real bug is actually in gl_nior_lower_buffers.
Comment 1 Jason Ekstrand 2019-03-20 18:11:24 UTC
I'm going to give this about an 80% chance that it's a virgl bug.  Most likely, virgl isn't properly propagating the SSBO aliasing decorations.  Now that i965 actually optimizes things based on them, we need those decorations.  Feel free to change the status back to ASSIGNED if you can prove me wrong.
Comment 2 Gert Wollny 2019-03-21 08:53:27 UTC
Thanks for the pointer, after knowing were to look I was indeed able to fix it in virglrenderer.

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