Bug 105584 - [CI] [SNB only] igt@* - dmesg-warn - *ERROR* uncleared pch fifo underrun on pch transcoder A |& *ERROR* PCH transcoder A FIFO underrun
Summary: [CI] [SNB only] igt@* - dmesg-warn - *ERROR* uncleared pch fifo underrun on p...
Status: CLOSED WORKSFORME
Alias: None
Product: DRI
Classification: Unclassified
Component: DRM/Intel (show other bugs)
Version: DRI git
Hardware: Other All
: high normal
Assignee: Intel GFX Bugs mailing list
QA Contact: Intel GFX Bugs mailing list
URL:
Whiteboard: ReadyForDev
Keywords:
Depends on:
Blocks: 105980
  Show dependency tree / graph
 
Reported: 2018-03-19 07:17 UTC by Marta Löfstedt
Modified: 2018-06-14 14:36 UTC (History)
1 user (show)

See Also:
i915 platform: SNB
i915 features: display/Other

Attachments

Description Marta Löfstedt 2018-03-19 07:17:25 UTC 
https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1/fi-snb-2600/igt@testdisplay.html

<3>[  160.201707] [drm:intel_set_pch_fifo_underrun_reporting [i915]] *ERROR* uncleared pch fifo underrun on pch transcoder A
<3>[  160.201842] [drm:cpt_irq_handler [i915]] *ERROR* PCH transcoder A FIFO underrun
Comment 1 Marta Löfstedt 2018-03-28 05:54:58 UTC 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3990/shard-hsw5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html

<7>[  814.602967] [drm:intel_enable_pipe [i915]] enabling pipe A
<7>[  814.603086] [drm:haswell_crtc_enable [i915]] iCLKIP clock: found settings for 65000KHz refresh rate: auxdiv=0, divsel=27, phasedir=0, phaseinc=22
<3>[  814.670444] [drm:intel_set_pch_fifo_underrun_reporting [i915]] *ERROR* uncleared pch fifo underrun on pch transcoder A
<3>[  814.670742] [drm:cpt_irq_handler [i915]] *ERROR* PCH transcoder A FIFO underrun
Comment 2 Marta Löfstedt 2018-03-28 05:56:02 UTC 
(In reply to Marta Löfstedt from comment #1)
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3990/shard-hsw5/
> igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-draw-render.html
> 
> <7>[  814.602967] [drm:intel_enable_pipe [i915]] enabling pipe A
> <7>[  814.603086] [drm:haswell_crtc_enable [i915]] iCLKIP clock: found
> settings for 65000KHz refresh rate: auxdiv=0, divsel=27, phasedir=0,
> phaseinc=22
> <3>[  814.670444] [drm:intel_set_pch_fifo_underrun_reporting [i915]] *ERROR*
> uncleared pch fifo underrun on pch transcoder A
> <3>[  814.670742] [drm:cpt_irq_handler [i915]] *ERROR* PCH transcoder A FIFO
> underrun

Wrong bug this should have been on bug 102614
Comment 4 Francesco Balestrieri 2018-06-01 07:56:03 UTC 
Not seen for 4 weeks, resolving.
Comment 5 Martin Peres 2018-06-14 14:36:18 UTC 
This got fixed in drmmtip_51.

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