Attachment 28678 Details for Bug 23353 – Xorg log.

Xorg log.

Xorg.0.log (text/x-log), 380.21 KB, created by Raúl on 2009-08-16 12:50:37 UTC

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Creator: Raúl

Created: 2009-08-16 12:50:37 UTC

Size: 380.21 KB

patch

obsolete

>
>X.Org X Server 1.6.3
>Release Date: 2009-7-31
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.30.2-dsa-amd64 x86_64 Debian
>Current Operating System: Linux portaka 2.6.30-toi3 #1 SMP PREEMPT Wed Aug 12 10:26:35 CEST 2009 x86_64
>Build Date: 01 August 2009  07:44:36AM
>xorg-server 2:1.6.3-1 (buildd@) 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Thu Aug 13 20:51:18 2009
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) No Layout section.  Using the first Screen section.
>(==) No screen section available. Using defaults.
>(**) |-->Screen "Default Screen Section" (0)
>(**) |   |-->Monitor "<default monitor>"
>(==) No device specified for screen "Default Screen Section".
>	Using the first device section listed.
>(**) |   |-->Device "Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller"
>(==) No monitor specified for screen "Default Screen Section".
>	Using a default monitor configuration.
>(**) Option "DontZap" "False"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
>	Entry deleted from font path.
>(WW) `fonts.dir' not found (or not valid) in "/usr/share/fonts/X11/100dpi/".
>	Entry deleted from font path.
>	(Run 'mkfontdir' on "/usr/share/fonts/X11/100dpi/").
>(WW) `fonts.dir' not found (or not valid) in "/usr/share/fonts/X11/75dpi/".
>	Entry deleted from font path.
>	(Run 'mkfontdir' on "/usr/share/fonts/X11/75dpi/").
>(WW) `fonts.dir' not found (or not valid) in "/usr/share/fonts/X11/100dpi".
>	Entry deleted from font path.
>	(Run 'mkfontdir' on "/usr/share/fonts/X11/100dpi").
>(WW) `fonts.dir' not found (or not valid) in "/usr/share/fonts/X11/75dpi".
>	Entry deleted from font path.
>	(Run 'mkfontdir' on "/usr/share/fonts/X11/75dpi").
>(==) FontPath set to:
>	/usr/share/fonts/X11/misc,
>	/usr/share/fonts/X11/Type1,
>	/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType,
>	built-ins
>(==) ModulePath set to "/usr/lib/xorg/modules"
>(==) |-->Input Device "Touchpad"
>(II) Cannot locate a core keyboard device.
>(==) No Layout section. Using the first core pointer device.
>(II) The server relies on HAL to provide the list of input devices.
>	If no devices become available, reconfigure HAL or disable AllowEmptyInput.
>(II) Loader magic: 0x3740
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 5.0
>	X.Org XInput driver : 4.0
>	X.Org Server Extension : 2.0
>(II) Loader running on linux
>(++) using VT number 7
>
>(--) PCI:*(0:0:2:0) 8086:2a02:1179:ff50 Intel Corporation Mobile GM965/GL960 Integrated Graphics Controller rev 3, Mem @ 0xf0000000/1048576, 0xd0000000/268435456, I/O @ 0x00001800/8
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension SELinux
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dri2"
>(II) Loading /usr/lib/xorg/modules/extensions//libdri2.so
>(II) Module dri2: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 1.1.0
>	ABI class: X.Org Server Extension, version 2.0
>(II) Loading extension DRI2
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.6.2.901, module version = 2.8.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 5.0
>(II) LoadModule: "synaptics"
>(II) Loading /usr/lib/xorg/modules/input//synaptics_drv.so
>(II) Module synaptics: vendor="X.Org Foundation"
>	compiled for 1.6.1.901, module version = 1.1.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 4.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, IGD_GM, IGD_G, 965G, G35,
>	965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41, IGDNG_D,
>	IGDNG_M
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 5.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 8, (OK)
>drmOpenByBusid: drmOpenMinor returns 8
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) intel(0): Creating default Display subsection in Screen section
>	"Default Screen Section" for depth/fbbpp 24/32
>(==) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "1"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 965GM
>(--) intel(0): Chipset: "965GM"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xF0000000 size 1048576
>(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
>(II) intel(0): No SDVO device is found in VBT
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x82308300 (enabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00000207 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x98047a00 (enabled, non-dvo, unknown clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_A: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_A: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_A: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_A: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_A: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x18046a00 (disabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): SDVO phase shift 13 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 73809 n 1 m1 15 m2 6 p1 3 p2 14
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 103333 n 1 m1 15 m2 6 p1 3 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA has no monitor section
>(II) intel(0): Output LVDS has no monitor section
>(II) intel(0): I2C bus "LVDSDDC_C" initialized.
>(II) intel(0): Attempting to determine panel fixed mode.
>(II) intel(0): I2C device "LVDSDDC_C:E-EDID segment register" registered at address 0x60.
>(II) intel(0): I2C device "LVDSDDC_C:ddc2" registered at address 0xA0.
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): found backlight control method /sys/class/backlight/acpi_video0
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output LVDS connected
>(II) intel(0): Using exact sizes for initial modes
>(II) intel(0): Output LVDS using initial mode 1280x800
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 7676 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (96, 96)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd000000a
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 488960 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 1955836 kB available
>(II) intel(0): [DRI2] Setup complete
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(**) intel(0): SwapBuffers wait enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) UXA(0): Driver registered support for the following operations:
>(II)         solid
>(II)         copy
>(II)         composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00000fff: power context (4 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x0077f000-0x0fffffff: DRI memory manager (254468 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x0077f000:            start of memory manager
>(II) intel(0): 0x0079f000-0x00b86fff: front buffer (4000 kB) X tiled
>(II) intel(0): 0x00b9f000-0x00b9ffff: overlay registers (4 kB)
>(II) intel(0): 0x00ba0000-0x00ba9fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): chosen: dotclock 71142 vco 1992000 ((m 83, m1 13, m2 6), n 2, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00003f80
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x0079f000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x0079f000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 74107 n 2 m1 13 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(II) intel(0): DPMS enabled
>(==) intel(0): Intel XvMC decoder disabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: DRI2 Enabled
>(WW) intel(0): Option "AccelMethod" is not used
>(--) RandR disabled
>(II) Initializing built-in extension Generic Event Extension
>(II) Initializing built-in extension SHAPE
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension BIG-REQUESTS
>(II) Initializing built-in extension SYNC
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-MISC
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>SELinux: Disabled on system, not enabling in X server
>(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>(II) AIGLX: GLX_EXT_texture_from_pixmap backed by buffer objects
>(II) AIGLX: Loaded and initialized /usr/lib/dri/i965_dri.so
>(II) GLX: Initialized DRI2 GL provider for screen 0
>(II) intel(0): Setting screen physical size to 286 x 179
>(II) Synaptics touchpad driver version 1.1.2
>(--) Touchpad auto-dev sets device to /dev/input/event8
>(**) Option "Device" "/dev/input/event8"
>(II) Touchpad: x-axis range 1472 - 5472
>(II) Touchpad: y-axis range 1408 - 4448
>(II) Touchpad: pressure range 0 - 255
>(II) Touchpad: finger width range 0 - 0
>(II) Touchpad: buttons: left right middle
>(**) Option "SHMConfig" "on"
>(**) Option "VertEdgeScroll" "1"
>(**) Option "HorizEdgeScroll" "1"
>(**) Option "RTCornerButton" "2"
>(**) Option "RBCornerButton" "3"
>(**) Option "TapButton1" "1"
>(**) Option "TapButton2" "2"
>(**) Option "TapButton3" "3"
>(--) Touchpad: touchpad found
>(**) Option "CorePointer"
>(**) Touchpad: always reports core events
>(II) XINPUT: Adding extended input device "Touchpad" (type: TOUCHPAD)
>(**) Touchpad: (accel) keeping acceleration scheme 1
>(**) Touchpad: (accel) filter chain progression: 2.00
>(**) Touchpad: (accel) filter stage 0: 20.00 ms
>(**) Touchpad: (accel) set acceleration profile 0
>(--) Touchpad: touchpad found
>(II) config/hal: Adding input device AT Translated Set 2 keyboard
>(II) LoadModule: "evdev"
>(II) Loading /usr/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 1.6.3, module version = 2.2.4
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 4.0
>(**) AT Translated Set 2 keyboard: always reports core events
>(**) AT Translated Set 2 keyboard: Device: "/dev/input/event1"
>(II) AT Translated Set 2 keyboard: Found keys
>(II) AT Translated Set 2 keyboard: Configuring as keyboard
>(II) XINPUT: Adding extended input device "AT Translated Set 2 keyboard" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Option "xkb_model" "pc105"
>(**) Option "xkb_layout" "es"
>(**) Option "xkb_options" "lv3:ralt_switch"
>(II) config/hal: Adding input device Power Button
>(**) Power Button: always reports core events
>(**) Power Button: Device: "/dev/input/event6"
>(II) Power Button: Found keys
>(II) Power Button: Configuring as keyboard
>(II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Option "xkb_model" "pc105"
>(**) Option "xkb_layout" "es"
>(**) Option "xkb_options" "lv3:ralt_switch"
>(II) config/hal: Adding input device Chicony USB 2.0 Camera
>(**) Chicony USB 2.0 Camera: always reports core events
>(**) Chicony USB 2.0 Camera: Device: "/dev/input/event7"
>(II) Chicony USB 2.0 Camera: Found keys
>(II) Chicony USB 2.0 Camera: Configuring as keyboard
>(II) XINPUT: Adding extended input device "Chicony USB 2.0 Camera" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Option "xkb_model" "pc105"
>(**) Option "xkb_layout" "es"
>(**) Option "xkb_options" "lv3:ralt_switch"
>(II) config/hal: Adding input device Video Bus
>(**) Video Bus: always reports core events
>(**) Video Bus: Device: "/dev/input/event2"
>(II) Video Bus: Found keys
>(II) Video Bus: Configuring as keyboard
>(II) XINPUT: Adding extended input device "Video Bus" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Option "xkb_model" "pc105"
>(**) Option "xkb_layout" "es"
>(**) Option "xkb_options" "lv3:ralt_switch"
>(II) config/hal: Adding input device Power Button
>(**) Power Button: always reports core events
>(**) Power Button: Device: "/dev/input/event4"
>(II) Power Button: Found keys
>(II) Power Button: Configuring as keyboard
>(II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD)
>(**) Option "xkb_rules" "evdev"
>(**) Option "xkb_model" "pc105"
>(**) Option "xkb_layout" "es"
>(**) Option "xkb_options" "lv3:ralt_switch"
>(II) config/hal: Adding input device Macintosh mouse button emulation
>(**) Macintosh mouse button emulation: always reports core events
>(**) Macintosh mouse button emulation: Device: "/dev/input/event0"
>(II) Macintosh mouse button emulation: Found 3 mouse buttons
>(II) Macintosh mouse button emulation: Found x and y relative axes
>(II) Macintosh mouse button emulation: Configuring as mouse
>(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
>(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
>(II) XINPUT: Adding extended input device "Macintosh mouse button emulation" (type: MOUSE)
>(**) Macintosh mouse button emulation: (accel) keeping acceleration scheme 1
>(**) Macintosh mouse button emulation: (accel) filter chain progression: 2.00
>(**) Macintosh mouse button emulation: (accel) filter stage 0: 20.00 ms
>(**) Macintosh mouse button emulation: (accel) set acceleration profile 0
>(II) Macintosh mouse button emulation: initialized for relative axes.
>(II) config/hal: Adding input device SynPS/2 Synaptics TouchPad
>(II) Synaptics touchpad driver version 1.1.2
>(**) Option "Device" "/dev/input/event8"
>(II) SynPS/2 Synaptics TouchPad: x-axis range 1472 - 5472
>(II) SynPS/2 Synaptics TouchPad: y-axis range 1408 - 4448
>(II) SynPS/2 Synaptics TouchPad: pressure range 0 - 255
>(II) SynPS/2 Synaptics TouchPad: finger width range 0 - 0
>(II) SynPS/2 Synaptics TouchPad: buttons: left right middle
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(**) SynPS/2 Synaptics TouchPad: always reports core events
>(II) XINPUT: Adding extended input device "SynPS/2 Synaptics TouchPad" (type: TOUCHPAD)
>(**) SynPS/2 Synaptics TouchPad: (accel) keeping acceleration scheme 1
>(**) SynPS/2 Synaptics TouchPad: (accel) filter chain progression: 2.00
>(**) SynPS/2 Synaptics TouchPad: (accel) filter stage 0: 20.00 ms
>(**) SynPS/2 Synaptics TouchPad: (accel) set acceleration profile 0
>(WW) SynPS/2 Synaptics TouchPad can't grab event device, errno=16
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd000000a
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000020 to 0x06040200
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x0000c000
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000207 to 0x00040000
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00400206 to 0x00440000
>(WW) intel(0): PIPEBSTAT before: status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x82308300 (enabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd000000a (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x98047a00 (enabled, non-dvo, unknown clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_A: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_A: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_A: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_A: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_A: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00440000 (status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x18046a00 (disabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): SDVO phase shift 13 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 73809 n 1 m1 15 m2 6 p1 3 p2 14
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 103333 n 1 m1 15 m2 6 p1 3 p2 10
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00000fff: power context (4 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x0077f000-0x0fffffff: DRI memory manager (254468 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x0077f000:            start of memory manager
>(II) intel(0): 0x0079f000-0x00b86fff: front buffer (4000 kB) X tiled
>(II) intel(0): 0x00b9f000-0x00b9ffff: overlay registers (4 kB)
>(II) intel(0): 0x00ba0000-0x00ba9fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): chosen: dotclock 71142 vco 1992000 ((m 83, m1 13, m2 6), n 2, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00003f80
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x0079f000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x0079f000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x80400206 (status: FIFO_UNDERRUN LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 74107 n 2 m1 13 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(--) Touchpad: touchpad found
>(WW) SynPS/2 Synaptics TouchPad can't grab event device, errno=16
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(II) AT Translated Set 2 keyboard: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Chicony USB 2.0 Camera: Device reopened after 1 attempts.
>(II) Video Bus: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using EDID range info for horizontal sync
>(II) intel(0): Using EDID range info for vertical refresh
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd000000a
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000020 to 0x06040220
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x0000c000
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000207 to 0x00040000
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00400206 to 0x00440000
>(WW) intel(0): PIPEBSTAT before: status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x82308300 (enabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd000000a (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040220
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00040203 (status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x98047a00 (enabled, non-dvo, unknown clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_A: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_A: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_A: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_A: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_A: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00440000 (status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x18046a00 (disabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): SDVO phase shift 13 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 73809 n 1 m1 15 m2 6 p1 3 p2 14
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 103333 n 1 m1 15 m2 6 p1 3 p2 10
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00000fff: power context (4 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x0077f000-0x0fffffff: DRI memory manager (254468 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x0077f000:            start of memory manager
>(II) intel(0): 0x0079f000-0x00b86fff: front buffer (4000 kB) X tiled
>(II) intel(0): 0x00b9f000-0x00b9ffff: overlay registers (4 kB)
>(II) intel(0): 0x00ba0000-0x00ba9fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): chosen: dotclock 71142 vco 1992000 ((m 83, m1 13, m2 6), n 2, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00003f80
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x0079f000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x0079f000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x80400206 (status: FIFO_UNDERRUN LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 74107 n 2 m1 13 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(--) Touchpad: touchpad found
>(WW) SynPS/2 Synaptics TouchPad can't grab event device, errno=16
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(II) AT Translated Set 2 keyboard: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Chicony USB 2.0 Camera: Device reopened after 1 attempts.
>(II) Video Bus: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000020 to 0x06040200
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x0000c000
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000207 to 0x00040200
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00400206 to 0x00440000
>(WW) intel(0): PIPEBSTAT before: status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x82308300 (enabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00040200 (status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x98047a00 (enabled, non-dvo, unknown clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_A: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_A: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_A: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_A: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_A: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00440000 (status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x18046a00 (disabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): SDVO phase shift 13 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 73809 n 1 m1 15 m2 6 p1 3 p2 14
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 103333 n 1 m1 15 m2 6 p1 3 p2 10
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00000fff: power context (4 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x0077f000-0x0fffffff: DRI memory manager (254468 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x0077f000:            start of memory manager
>(II) intel(0): 0x0079f000-0x00b86fff: front buffer (4000 kB) X tiled
>(II) intel(0): 0x00b9f000-0x00b9ffff: overlay registers (4 kB)
>(II) intel(0): 0x00ba0000-0x00ba9fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): chosen: dotclock 71142 vco 1992000 ((m 83, m1 13, m2 6), n 2, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00003f80
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x0079f000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x0079f000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 74107 n 2 m1 13 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(--) Touchpad: touchpad found
>(WW) SynPS/2 Synaptics TouchPad can't grab event device, errno=16
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(II) AT Translated Set 2 keyboard: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Chicony USB 2.0 Camera: Device reopened after 1 attempts.
>(II) Video Bus: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000020 to 0x06040200
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x0000c000
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000207 to 0x00040200
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00400206 to 0x00440000
>(WW) intel(0): PIPEBSTAT before: status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x82308300 (enabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00040200 (status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x98047a00 (enabled, non-dvo, unknown clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_A: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_A: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_A: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_A: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_A: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00440000 (status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x18046a00 (disabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): SDVO phase shift 13 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 73809 n 1 m1 15 m2 6 p1 3 p2 14
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 103333 n 1 m1 15 m2 6 p1 3 p2 10
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00000fff: power context (4 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x0077f000-0x0fffffff: DRI memory manager (254468 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x0077f000:            start of memory manager
>(II) intel(0): 0x0079f000-0x00b86fff: front buffer (4000 kB) X tiled
>(II) intel(0): 0x00b9f000-0x00b9ffff: overlay registers (4 kB)
>(II) intel(0): 0x00ba0000-0x00ba9fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): chosen: dotclock 71142 vco 1992000 ((m 83, m1 13, m2 6), n 2, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00003f80
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x0079f000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x0079f000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x80400206 (status: FIFO_UNDERRUN LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 74107 n 2 m1 13 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(--) Touchpad: touchpad found
>(WW) SynPS/2 Synaptics TouchPad can't grab event device, errno=16
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(II) AT Translated Set 2 keyboard: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Chicony USB 2.0 Camera: Device reopened after 1 attempts.
>(II) Video Bus: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000020 to 0x06040220
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x0000c000
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000207 to 0x00040200
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00400206 to 0x00440000
>(WW) intel(0): PIPEBSTAT before: status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x82308300 (enabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040220
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00040200 (status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x98047a00 (enabled, non-dvo, unknown clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_A: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_A: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_A: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_A: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_A: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00440000 (status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x18046a00 (disabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): SDVO phase shift 13 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 73809 n 1 m1 15 m2 6 p1 3 p2 14
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 103333 n 1 m1 15 m2 6 p1 3 p2 10
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00000fff: power context (4 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x0077f000-0x0fffffff: DRI memory manager (254468 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x0077f000:            start of memory manager
>(II) intel(0): 0x0079f000-0x00b86fff: front buffer (4000 kB) X tiled
>(II) intel(0): 0x00b9f000-0x00b9ffff: overlay registers (4 kB)
>(II) intel(0): 0x00ba0000-0x00ba9fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): chosen: dotclock 71142 vco 1992000 ((m 83, m1 13, m2 6), n 2, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000002
>(II) intel(0):               DSPARB: 0x00003f80
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x0079f000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x0079f000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x00400206 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 74107 n 2 m1 13 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(--) Touchpad: touchpad found
>(WW) SynPS/2 Synaptics TouchPad can't grab event device, errno=16
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(II) AT Translated Set 2 keyboard: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Chicony USB 2.0 Camera: Device reopened after 1 attempts.
>(II) Video Bus: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
>(II) AIGLX: Suspending AIGLX clients for VT switch
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(WW) intel(0): Register 0x61150 (SDVOUDI) changed from 0x00000000 to 0x00000002
>(WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009
>(WW) intel(0): PP_STATUS before: on, ready, sequencing idle
>(WW) intel(0): PP_STATUS after: on, ready, sequencing on
>(WW) intel(0): Register 0x61110 (PORT_HOTPLUG_EN) changed from 0x00000020 to 0x06040200
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x0000c000
>(WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000207 to 0x00040200
>(WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS
>(WW) intel(0): PIPEASTAT after: status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS
>(WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00400206 to 0x00440000
>(WW) intel(0): PIPEBSTAT before: status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS
>(WW) intel(0): PIPEBSTAT after: status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE
>(WW) intel(0): Register 0x3000 (FENCE  8) changed from 0x00000000 to 0x0079f09d
>(WW) intel(0): FENCE  8 before: (null)
>(WW) intel(0): FENCE  8 after: (null)
>(WW) intel(0): Register 0x3004 (FENCE  9) changed from 0x00000000 to 0x00b9e000
>(WW) intel(0): FENCE  9 before: (null)
>(WW) intel(0): FENCE  9 after: (null)
>(WW) intel(0): Register 0x3000 (FENCE START 0) changed from 0x00000000 to 0x0079f09d
>(WW) intel(0): FENCE START 0 before: disabled, X tile walk,    0 pitch, 0x00000000 start
>(WW) intel(0): FENCE START 0 after:  enabled, X tile walk, 4992 pitch, 0x0079f000 start
>(WW) intel(0): Register 0x3004 (FENCE END 0) changed from 0x00000000 to 0x00b9e000
>(WW) intel(0): FENCE END 0 before:                                    0x00000000 end
>(WW) intel(0): FENCE END 0 after:                                    0x00b9e000 end
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000002
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x82308300 (enabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x80000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x98000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEASTAT: 0x00040200 (status: SVBLANK_INT_ENABLE VSYNC_INT_STATUS)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x98047a00 (enabled, non-dvo, unknown clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_A: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_A: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_A: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_A: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_A: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEBSRC: 0x027f018f (640, 400)
>(II) intel(0):            PIPEBSTAT: 0x00440000 (status: LBLC_EVENT_ENABLE SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00010f06 (n = 1, m1 = 15, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x18046a00 (disabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 3, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000003
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x0079f09d ( enabled, X tile walk, 4992 pitch, 0x0079f000 start)
>(II) intel(0):          FENCE END 0: 0x00b9e000 (                                   0x00b9e000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): SDVO phase shift 13 out of range -- probobly not an issue.
>(II) intel(0): pipe A dot 73809 n 1 m1 15 m2 6 p1 3 p2 14
>(II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue.
>(II) intel(0): pipe B dot 103333 n 1 m1 15 m2 6 p1 3 p2 10
>(II) intel(0): DumpRegsEnd
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) AIGLX: Resuming AIGLX clients after VT switch
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x00000fff: power context (4 kB)
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x0077f000-0x0fffffff: DRI memory manager (254468 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): BO memory allocation layout:
>(II) intel(0): 0x0077f000:            start of memory manager
>(II) intel(0): 0x0079f000-0x00b86fff: front buffer (4000 kB) X tiled
>(II) intel(0): 0x00b9f000-0x00b9ffff: overlay registers (4 kB)
>(II) intel(0): 0x00ba0000-0x00ba9fff: HW cursors (40 kB)
>(II) intel(0): 0x10000000:            end of memory manager
>(II) intel(0): using SSC reference clock of 96 MHz
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): chosen: dotclock 71142 vco 1992000 ((m 83, m1 13, m2 6), n 2, (p 28, p1 2, p2 14))
>(II) intel(0): Selecting standard 18 bit TMDS pixel format.
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):                  DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>(II) intel(0):            CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x000f0002 (0x0002)
>(II) intel(0):               C0DRB1: 0x0000000f (0x000f)
>(II) intel(0):               C0DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C0DRB3: 0x0e000000 (0x0000)
>(II) intel(0):               C1DRB0: 0x17cbe000 (0xe000)
>(II) intel(0):               C1DRB1: 0x000017cb (0x17cb)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00030e00 (0x0e00)
>(II) intel(0):              C0DRA23: 0x000c0003 (0x0003)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):           PGETBL_CTL: 0x7ff80001
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x20000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000002
>(II) intel(0):               DSPARB: 0x00003f80
>(II) intel(0):               DSPFW1: 0x3f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000003 (power target: on)
>(II) intel(0):            PP_STATUS: 0xd0000009 (on, ready, sequencing on)
>(II) intel(0):         PP_ON_DELAYS: 0x01e00bb8
>(II) intel(0):        PP_OFF_DELAYS: 0x01c20bb8
>(II) intel(0):           PP_DIVISOR: 0x0031cd05
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x0f5c0ccd
>(II) intel(0):      PORT_HOTPLUG_EN: 0x06040200
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x0000c000
>(II) intel(0):             DSPACNTR: 0x58000400 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x0079f000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x00000000 (disabled, inactive)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00040000 (status: SVBLANK_INT_ENABLE)
>(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x033f027f (640 active, 832 total)
>(II) intel(0):             HBLANK_A: 0x033f027f (640 start, 832 end)
>(II) intel(0):              HSYNC_A: 0x02bf0297 (664 start, 704 end)
>(II) intel(0):             VTOTAL_A: 0x020701df (480 active, 520 total)
>(II) intel(0):             VBLANK_A: 0x020701df (480 start, 520 end)
>(II) intel(0):              VSYNC_A: 0x01ea01e8 (489 start, 491 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00001400 (5120 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x0079f000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x04ff031f (1280, 800)
>(II) intel(0):            PIPEBSTAT: 0x80400206 (status: FIFO_UNDERRUN LBLC_EVENT_ENABLE VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
>(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
>(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
>(II) intel(0):                 FPB0: 0x00020d06 (n = 2, m1 = 13, m2 = 6)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x059f04ff (1280 active, 1440 total)
>(II) intel(0):             HBLANK_B: 0x059f04ff (1280 start, 1440 end)
>(II) intel(0):              HSYNC_B: 0x054f052f (1328 start, 1360 end)
>(II) intel(0):             VTOTAL_B: 0x0336031f (800 active, 823 total)
>(II) intel(0):             VBLANK_B: 0x0336031f (800 start, 823 end)
>(II) intel(0):              VSYNC_B: 0x03280322 (803 start, 809 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8224008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x70000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0x00000000
>(II) intel(0):          FBC_LL_BASE: 0x00000000
>(II) intel(0):          FBC_CONTROL: 0x00000000
>(II) intel(0):          FBC_COMMAND: 0x00000000
>(II) intel(0):           FBC_STATUS: 0x20000000
>(II) intel(0):         FBC_CONTROL2: 0x00000000
>(II) intel(0):        FBC_FENCE_OFF: 0x00000000
>(II) intel(0):          FBC_MOD_NUM: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):        FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 0: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 1: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 2: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 3: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 3: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 4: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 4: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 5: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 5: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 6: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 7: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 7: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 8: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 8: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):        FENCE START 9: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):          FENCE END 9: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 10: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 10: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 11: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 11: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 12: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 12: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 13: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 13: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 14: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 14: 0x00000000 (                                   0x00000000 end)
>(II) intel(0):       FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>(II) intel(0):         FENCE END 15: 0x00000000 (                                   0x00000000 end)
>(II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 74107 n 2 m1 13 m2 6 p1 2 p2 14
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is off
>(II) intel(0):   Display plane A is now disabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output LVDS is connected to pipe B
>(--) Touchpad: touchpad found
>(WW) SynPS/2 Synaptics TouchPad can't grab event device, errno=16
>(--) SynPS/2 Synaptics TouchPad: touchpad found
>(II) AT Translated Set 2 keyboard: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Chicony USB 2.0 Camera: Device reopened after 1 attempts.
>(II) Video Bus: Device reopened after 1 attempts.
>(II) Power Button: Device reopened after 1 attempts.
>(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): EDID for output VGA
>(II) intel(0): EDID for output LVDS
>(II) intel(0): Manufacturer: APP  Model: 9c5f  Serial#: 0
>(II) intel(0): Year: 2006  Week: 8
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): Max Image Size [cm]: horiz.: 29  vert.: 18
>(II) intel(0): Gamma: 2.20
>(II) intel(0): No DPMS capabilities specified
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): GTF timings supported
>(II) intel(0): redX: 0.590 redY: 0.346   greenX: 0.327 greenY: 0.546
>(II) intel(0): blueX: 0.160 blueY: 0.147   whiteX: 0.312 whiteY: 0.328
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported detailed timing:
>(II) intel(0): clock: 71.0 MHz   Image Size:  286 x 179 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1360 h_blank_end 1440 h_border: 0
>(II) intel(0): v_active: 800  v_sync: 803  v_sync_end 809 v_blanking: 823 v_border: 0
>(II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz,
>(II) intel(0):  LP133WX1-TLA1
>(II) intel(0):  Color LCD
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0006105f9c00000000
>(II) intel(0): 	08100103801d12780a2f309758538b29
>(II) intel(0): 	25505400000001010101010101010101
>(II) intel(0): 	010101010101bc1b00a0502017303020
>(II) intel(0): 	36001eb3100000180000000100061020
>(II) intel(0): 	00000000000000000a20000000fe004c
>(II) intel(0): 	503133335758312d544c4131000000fe
>(II) intel(0): 	00436f6c6f72204c43440a20202000c2
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Using hsync ranges from config file
>(II) intel(0): Using vrefresh ranges from config file
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x800"x0.0   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): EDID vendor "APP", prod id 40031
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x960" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1280x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1152x864" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1360x768" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1400x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1440x900" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1600x1024" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1680x1050" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "1920x1080" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1200" (monitor doesn't support reduced blanking)
>(II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions)
>(II) intel(0): Printing probed modes for output LVDS
>(II) intel(0): Modeline "1280x800"x59.9   71.00  1280 1328 1360 1440  800 803 809 823 -hsync -vsync (49.3 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>
>Backtrace:
>0: /usr/bin/X(xorg_backtrace+0x26) [0x4edff6]
>1: /usr/bin/X(mieqEnqueue+0x359) [0x4cf359]
>2: /usr/bin/X(xf86PostMotionEventP+0xd4) [0x493b34]
>3: /usr/bin/X(xf86PostMotionEvent+0xb1) [0x493d01]
>4: /usr/lib/xorg/modules/input//synaptics_drv.so [0x7faea5e5194a]
>5: /usr/lib/xorg/modules/input//synaptics_drv.so [0x7faea5e53e5c]
>6: /usr/bin/X [0x4835e5]
>7: /usr/bin/X [0x474e57]
>8: /lib/libpthread.so.0 [0x7faea8af7720]
>9: /lib/libc.so.6(ioctl+0x7) [0x7faea7b204a7]
>10: /usr/lib/libdrm.so.2(drmIoctl+0x23) [0x7faea6714673]
>11: /usr/lib/libdrm.so.2(drmCommandNone+0x16) [0x7faea6714976]
>12: /usr/lib/xorg/modules/drivers//intel_drv.so [0x7faea628f440]
>13: /usr/bin/X [0x531248]
>14: /usr/bin/X [0x4fd4ce]
>15: /usr/bin/X(BlockHandler+0x50) [0x450cd0]
>16: /usr/bin/X(WaitForSomething+0x161) [0x4ebb51]
>17: /usr/bin/X(Dispatch+0x80) [0x44d060]
>18: /usr/bin/X(main+0x3aa) [0x43329a]
>19: /lib/libc.so.6(__libc_start_main+0xe6) [0x7faea7a795c6]
>20: /usr/bin/X [0x432739]
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.
>[mi] EQ overflowing. The server is probably stuck in an infinite loop.
>[mi] mieqEnequeue: out-of-order valuator event; dropping.

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Attachments on bug 23353: 28677 | 28678

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