Attachment 16656 Details for Bug 15590 – Updated clock gating patch

[patch] Updated clock gating patch

i830-clock-gating-workarounds-5.patch (text/plain), 2.77 KB, created by Jesse Barnes on 2008-05-20 16:50:08 UTC

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Creator: Jesse Barnes

Created: 2008-05-20 16:50:08 UTC

Size: 2.77 KB

patch

obsolete

>diff --git a/src/i810_reg.h b/src/i810_reg.h
>index bc42a4f..0473c08 100644
>--- a/src/i810_reg.h
>+++ b/src/i810_reg.h
>@@ -1151,6 +1151,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
> 
> #define RENCLK_GATE_D2		0x6208
> #define RAMCLK_GATE_D		0x6210		/* CRL only */
>+#define DEUC			0x6214          /* CRL only */
> 
> /*
>  * This is a PCI config space register to manipulate backlight brightness
>diff --git a/src/i830_driver.c b/src/i830_driver.c
>index 662b3e4..7d741a9 100644
>--- a/src/i830_driver.c
>+++ b/src/i830_driver.c
>@@ -934,6 +934,40 @@ I830SetupOutputs(ScrnInfoPtr pScrn)
>    }
> }
> 
>+static void
>+i830_init_clock_gating(ScrnInfoPtr pScrn)
>+{
>+    I830Ptr pI830 = I830PTR(pScrn);
>+
>+    /* Disable clock gating reported to work incorrectly according to the specs.
>+     */
>+    if (IS_IGD_GM(pI830)) {
>+	OUTREG(RENCLK_GATE_D1, 0);
>+	OUTREG(RENCLK_GATE_D2, 0);
>+	OUTREG(RAMCLK_GATE_D, 0);
>+	OUTREG(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE |
>+	       OVRUNIT_CLOCK_GATE_DISABLE |
>+	       OVCUNIT_CLOCK_GATE_DISABLE);
>+    } else if (IS_I965GM(pI830)) {
>+	OUTREG(RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);
>+	OUTREG(RENCLK_GATE_D2, 0);
>+	OUTREG(DSPCLK_GATE_D, 0);
>+	OUTREG(RAMCLK_GATE_D, 0);
>+	OUTREG16(DEUC, 0);
>+    } else if (IS_I965G(pI830)) {
>+	OUTREG(RENCLK_GATE_D1, I965_RCZ_CLOCK_GATE_DISABLE |
>+	       I965_RCC_CLOCK_GATE_DISABLE |
>+	       I965_RCPB_CLOCK_GATE_DISABLE |
>+	       I965_ISC_CLOCK_GATE_DISABLE |
>+	       I965_FBC_CLOCK_GATE_DISABLE);
>+	OUTREG(RENCLK_GATE_D2, 0);
>+    } else if (IS_I855(pI830) || IS_I865G(pI830)) {
>+	OUTREG(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
>+    } else if (IS_I830(pI830)) {
>+	OUTREG(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
>+    }
>+}
>+
> static int
> I830LVDSPresent(ScrnInfoPtr pScrn)
> {
>@@ -1461,6 +1495,8 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
> 
>    i830TakeRegSnapshot(pScrn);
> 
>+   i830_init_clock_gating(pScrn);
>+
> #if 1
>    pI830->saveSWF0 = INREG(SWF0);
>    pI830->saveSWF4 = INREG(SWF4);
>@@ -1901,23 +1937,6 @@ SetHWOperatingState(ScrnInfoPtr pScrn)
> 
>    DPRINTF(PFX, "SetHWOperatingState\n");
> 
>-   /* Disable clock gating reported to work incorrectly according to the specs.
>-    */
>-   if (IS_IGD_GM(pI830)) {
>-      OUTREG(RENCLK_GATE_D1, 0);
>-      OUTREG(RENCLK_GATE_D2, 0);
>-      OUTREG(DSPCLK_GATE_D, VRHUNIT_CLOCK_GATE_DISABLE);
>-   } else if (IS_I965GM(pI830)) {
>-      OUTREG(RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);
>-   } else if (IS_I965G(pI830)) {
>-      OUTREG(RENCLK_GATE_D1,
>-	     I965_RCC_CLOCK_GATE_DISABLE | I965_ISC_CLOCK_GATE_DISABLE);
>-   } else if (IS_I855(pI830) || IS_I865G(pI830)) {
>-      OUTREG(RENCLK_GATE_D1, SV_CLOCK_GATE_DISABLE);
>-   } else if (IS_I830(pI830)) {
>-      OUTREG(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);
>-   }
>-
>    i830_start_ring(pScrn);
>    if (!pI830->SWCursor)
>       I830InitHWCursor(pScrn);

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