| Summary: |
test_vec4_cmod_propagation.cpp:372:26: error: ‘brw_reg’ is an inaccessible base of ‘brw::dst_reg’ |
| Product: |
Mesa
|
Reporter: |
Vinson Lee <vlee> |
| Component: |
Mesa core | Assignee: |
mesa-dev |
| Status: |
RESOLVED
FIXED
|
QA Contact: |
mesa-dev |
| Severity: |
normal
|
|
|
| Priority: |
medium
|
CC: |
currojerez, itoral
|
| Version: |
13.0 | Keywords: |
bisected, regression |
| Hardware: |
x86-64 (AMD64) | |
|
| OS: |
Linux (All) | |
|
| Whiteboard: |
|
|
i915 platform:
|
|
i915 features:
|
|
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mesa: e6aeeace6953a7007d98082e3f44bff40a44106d (master 13.1.0-devel) CXX test_vec4_cmod_propagation.o test_vec4_cmod_propagation.cpp: In member function ‘virtual void cmod_propagation_test_intervening_dest_write_Test::TestBody()’: test_vec4_cmod_propagation.cpp:372:26: error: ‘brw_reg’ is an inaccessible base of ‘brw::dst_reg’ bld.ADD(offset(dest, 2), src0, src1); ^ 66fcfa6894ab61a8cb70955f4a4113729e4a8099 is the first bad commit commit 66fcfa6894ab61a8cb70955f4a4113729e4a8099 Author: Iago Toral Quiroga <itoral@igalia.com> Date: Mon Oct 3 13:33:12 2016 +0200 i965/vec4: make offset() work in terms of a simd width and scalar components So that it has the same semantics as the scalar backend implementation. The helper will now take a simd width (which is always 8 in vec4 mode) and step as many scalar components as specified by that width, respecting the size of the scalar channels. v2 (Curro): - Remove the assertion in offset(), byte_offset() has the same checks. - Use byte_offset() directly instead of add_byte_offset(). - Make things more clear by explicitly including the vertical stride in the byte offset expression. Reviewed-by: Francisco Jerez <currojerez@riseup.net> :040000 040000 61fda73ca05d5d657615121949183d07f9b05632 2c08f32494029dac5aabfcf483b70c9314d91750 M src bisect run success