Bug 82831

Summary:	i965: Support GL_ARB_blend_func_extended in SIMD16
Product:	Mesa	Reporter:	Matt Turner <mattst88>
Component:	Drivers/DRI/i965	Assignee:	Iago Toral <itoral>
Status:	RESOLVED FIXED	QA Contact:	Intel 3D Bugs Mailing List <intel-3d-bugs>
Severity:	normal
Priority:	medium
Version:	unspecified
Hardware:	Other
OS:	All
Whiteboard:
i915 platform:		i915 features:
Bug Depends on:
Bug Blocks:	77547

Description Matt Turner 2014-08-20 01:17:19 UTC

To implement dual source blending in SIMD16 we need to send two messages: SIMD8_DUALSRC_LO and SIMD8_DUALSRC_HI (as they're named in the BSpec/PRM).

These are called

> BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN01
> BRW_DATAPORT_RENDER_TARGET_WRITE_SIMD8_DUAL_SOURCE_SUBSPAN23

in the i965 driver.

Note that the PRM says

> If multiple SIMD8 Dual Source messages are delivered by the pixel shader
> thread, each SIMD8_DUALSRC_LO message must be issued before the
> SIMD8_DUALSRC_HI message with the same Slot Group Select setting.

See fs_visitor::emit_fb_writes().

Comment 1 Iago Toral 2014-09-16 12:22:50 UTC

I am working on this

Comment 2 Iago Toral 2014-09-17 11:40:11 UTC

I have just sent a patch to the mailing list for review:
http://lists.freedesktop.org/archives/mesa-dev/2014-September/067859.html

(In reply to comment #0)
> Note that the PRM says
> 
> > If multiple SIMD8 Dual Source messages are delivered by the pixel shader
> > thread, each SIMD8_DUALSRC_LO message must be issued before the
> > SIMD8_DUALSRC_HI message with the same Slot Group Select setting.

I think this does not require any actions. If I am not wrong we are always using the same Slot Group Select (0) for all 8 and 16 pixel dispatches.

Comment 3 Iago Toral 2015-03-05 12:55:21 UTC

(In reply to Iago Toral from comment #2)
> I have just sent a patch to the mailing list for review:
> http://lists.freedesktop.org/archives/mesa-dev/2014-September/067859.html

That patch was made obsolete by Jason's FB write code rewrite some months ago, I have sent an updated version:
http://lists.freedesktop.org/archives/mesa-dev/2015-March/078648.html

Comment 4 Matt Turner 2015-03-09 18:23:53 UTC

Fixed by

commit a72fb69604711d4f0e0fe49241d2da0311503f6a
Author: Iago Toral Quiroga <itoral@igalia.com>
Date:   Thu Mar 5 09:43:38 2015 +0100

    i965/fs: Implement SIMD16 dual source blending.
    
    From the SNB PRM, volume 4, part 1, page 193:
    
    "The dual source render target messages only have SIMD8 forms due to
     maximum message length limitations. SIMD16 pixel shaders must send two of
     these messages to cover all of the pixels. Each message contains two colors
     (4 channels each) for each pixel in the message payload."
    
    Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82831
    Reviewed-by: Jason Ekstrand <jason.ekstrand@intel.com>

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