Attachment 36304 Details for Bug 28546 – /intel_reg_dumper_dump_not_working.txt

/intel_reg_dumper_dump_not_working.txt

intel_reg_dumper_dump_not_working.txt (text/plain), 10.39 KB, created by Frank Polte on 2010-06-15 13:01:47 UTC

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Creator: Frank Polte

Created: 2010-06-15 13:01:47 UTC

Size: 10.39 KB

patch

obsolete

>                 DCC: 0x000f0002 (dual channel interleaved, XOR randomization: enabled, XOR bit: 11)
>           CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh disabled, ch0 enh disabled, flex disabled, ep not present)
>              C0DRB0: 0x000f0002 (0x0002)
>              C0DRB1: 0x0000000f (0x000f)
>              C0DRB2: 0x00000000 (0x0000)
>              C0DRB3: 0x0e000000 (0x0000)
>              C1DRB0: 0x17cbe000 (0xe000)
>              C1DRB1: 0x000017cb (0x17cb)
>              C1DRB2: 0x00000000 (0x0000)
>              C1DRB3: 0x00000000 (0x0000)
>             C0DRA01: 0x00030e00 (0x0e00)
>             C0DRA23: 0x000c0003 (0x0003)
>             C1DRA01: 0x00000000 (0x0000)
>             C1DRA23: 0x00000000 (0x0000)
>          PGETBL_CTL: 0xbff80001
>   VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>   VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>       VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>           DPLL_TEST: 0x00010001 ()
>        CACHE_MODE_0: 0x00006820
>             D_STATE: 0x00000000
>       DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>      RENCLK_GATE_D1: 0x20000000
>      RENCLK_GATE_D2: 0x00000000
>               SDVOB: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>               SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>             SDVOUDI: 0x00000000
>              DSPARB: 0x00001d9c
>              DSPFW1: 0x00880808
>              DSPFW2: 0x00000808
>              DSPFW3: 0x00000000
>                ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync)
>                LVDS: 0xc2308300 (enabled, pipe B, 18 bit, 1 channel)
>                DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>                DVOB: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>                DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>         DVOA_SRCDIM: 0x00000000
>         DVOB_SRCDIM: 0x00000000
>         DVOC_SRCDIM: 0x00000000
>          PP_CONTROL: 0x00000003 (power target: on)
>           PP_STATUS: 0xc0000008 (on, ready, sequencing idle)
>        PP_ON_DELAYS: 0x01900834
>       PP_OFF_DELAYS: 0x00c807d0
>          PP_DIVISOR: 0x003e7f05
>        PFIT_CONTROL: 0x00000000
>     PFIT_PGM_RATIOS: 0x031f0800
>     PORT_HOTPLUG_EN: 0x00000200
>   PORT_HOTPLUG_STAT: 0x00000000
>            DSPACNTR: 0xc0000000 (enabled, pipe A)
>          DSPASTRIDE: 0x00000000 (0 bytes)
>             DSPAPOS: 0x00000000 (0, 0)
>            DSPASIZE: 0x00000000 (1, 1)
>            DSPABASE: 0x00000000
>            DSPASURF: 0x00000000
>         DSPATILEOFF: 0x00000000
>           PIPEACONF: 0xc0000000 (enabled, active)
>            PIPEASRC: 0x04ff03ff (1280, 1024)
>           PIPEASTAT: 0x00000000 (status:)
>   PIPEA_GMCH_DATA_M: 0x00000000
>   PIPEA_GMCH_DATA_N: 0x00000000
>     PIPEA_DP_LINK_M: 0x00000000
>     PIPEA_DP_LINK_N: 0x00000000
>       CURSOR_A_BASE: 0x00000000
>    CURSOR_A_CONTROL: 0x00000000
>   CURSOR_A_POSITION: 0x00000000
>                FPA0: 0x00020e08 (n = 2, m1 = 14, m2 = 8)
>                FPA1: 0x00020e08 (n = 2, m1 = 14, m2 = 8)
>              DPLL_A: 0x94020c00 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>           DPLL_A_MD: 0x00000000
>            HTOTAL_A: 0x06af04ff (1280 active, 1712 total)
>            HBLANK_A: 0x06af04ff (1280 start, 1712 end)
>             HSYNC_A: 0x05d70557 (1368 start, 1496 end)
>            VTOTAL_A: 0x044f03ff (1024 active, 1104 total)
>            VBLANK_A: 0x044f03ff (1024 start, 1104 end)
>             VSYNC_A: 0x04090402 (1027 start, 1034 end)
>           BCLRPAT_A: 0x00000000
>        VSYNCSHIFT_A: 0x00000000
>            DSPBCNTR: 0xd9000000 (enabled, pipe B)
>          DSPBSTRIDE: 0x00001400 (5120 bytes)
>             DSPBPOS: 0x00000000 (0, 0)
>            DSPBSIZE: 0x00000000 (1, 1)
>            DSPBBASE: 0x00000000
>            DSPBSURF: 0x007f0000
>         DSPBTILEOFF: 0x00000000
>           PIPEBCONF: 0xc0000000 (enabled, active)
>            PIPEBSRC: 0x04ff031f (1280, 800)
>           PIPEBSTAT: 0x00400306 (status: LBLC_EVENT_ENABLE VSYNC_INT_STATUS DLINE_COMPARE_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>   PIPEB_GMCH_DATA_M: 0x00000000
>   PIPEB_GMCH_DATA_N: 0x00000000
>     PIPEB_DP_LINK_M: 0x00000000
>     PIPEB_DP_LINK_N: 0x00000000
>       CURSOR_B_BASE: 0x00000000
>    CURSOR_B_CONTROL: 0x10000000
>   CURSOR_B_POSITION: 0x022002cb
>                FPB0: 0x00031005 (n = 3, m1 = 16, m2 = 5)
>                FPB1: 0x00031005 (n = 3, m1 = 16, m2 = 5)
>              DPLL_B: 0x98026c00 (enabled, non-dvo, spread spectrum clock, LVDS mode, p1 = 2, p2 = 14)
>           DPLL_B_MD: 0x00000000
>            HTOTAL_B: 0x058104ff (1280 active, 1410 total)
>            HBLANK_B: 0x058104ff (1280 start, 1410 end)
>             HSYNC_B: 0x05400526 (1319 start, 1345 end)
>            VTOTAL_B: 0x0332031f (800 active, 819 total)
>            VBLANK_B: 0x0332031f (800 start, 819 end)
>             VSYNC_B: 0x03250321 (802 start, 806 end)
>           BCLRPAT_B: 0x00000000
>        VSYNCSHIFT_B: 0x00000000
>   VCLK_DIVISOR_VGA0: 0x00031108
>   VCLK_DIVISOR_VGA1: 0x00031406
>       VCLK_POST_DIV: 0x00020002
>            VGACNTRL: 0x80000000 (disabled)
>              TV_CTL: 0x800c00d0
>              TV_DAC: 0x70000000
>            TV_CSC_Y: 0x0332012d
>           TV_CSC_Y2: 0x07d30104
>            TV_CSC_U: 0x0733052d
>           TV_CSC_U2: 0x05c70200
>            TV_CSC_V: 0x0340030c
>           TV_CSC_V2: 0x06d00200
>        TV_CLR_KNOBS: 0x00404000
>        TV_CLR_LEVEL: 0x010b00e1
>          TV_H_CTL_1: 0x00400359
>          TV_H_CTL_2: 0x80480022
>          TV_H_CTL_3: 0x007c0344
>          TV_V_CTL_1: 0x00f01415
>          TV_V_CTL_2: 0x00060607
>          TV_V_CTL_3: 0x80120001
>          TV_V_CTL_4: 0x000900f0
>          TV_V_CTL_5: 0x000a00f0
>          TV_V_CTL_6: 0x000900f0
>          TV_V_CTL_7: 0x000a00f0
>         TV_SC_CTL_1: 0xc1710087
>         TV_SC_CTL_2: 0x6b405140
>         TV_SC_CTL_3: 0x00000000
>          TV_WIN_POS: 0x00360024
>         TV_WIN_SIZE: 0x02640198
>     TV_FILTER_CTL_1: 0x8000085e
>     TV_FILTER_CTL_2: 0x00028283
>     TV_FILTER_CTL_3: 0x00014141
>       TV_CC_CONTROL: 0x00000000
>          TV_CC_DATA: 0x00000000
>         TV_H_LUMA_0: 0xb1403000
>        TV_H_LUMA_59: 0x0000b060
>       TV_H_CHROMA_0: 0xb1403000
>      TV_H_CHROMA_59: 0x0000b060
>        FBC_CFB_BASE: 0xbf800000
>         FBC_LL_BASE: 0x369b8000
>         FBC_CONTROL: 0x41f408e3
>         FBC_COMMAND: 0x00000000
>          FBC_STATUS: 0x20000000
>        FBC_CONTROL2: 0x00000003
>       FBC_FENCE_OFF: 0x00000000
>         FBC_MOD_NUM: 0x00000000
>             MI_MODE: 0x00000200
>        MI_ARB_STATE: 0x00000040
>      MI_RDRET_STATE: 0x00000000
>             ECOSKPD: 0x00000307
>                DP_B: 0x00000000
>      DPB_AUX_CH_CTL: 0x00000000
>    DPB_AUX_CH_DATA1: 0x00000000
>    DPB_AUX_CH_DATA2: 0x00000000
>    DPB_AUX_CH_DATA3: 0x00000000
>    DPB_AUX_CH_DATA4: 0x00000000
>    DPB_AUX_CH_DATA5: 0x00000000
>                DP_C: 0x00000000
>      DPC_AUX_CH_CTL: 0x00000000
>    DPC_AUX_CH_DATA1: 0x00000000
>    DPC_AUX_CH_DATA2: 0x00000000
>    DPC_AUX_CH_DATA3: 0x00000000
>    DPC_AUX_CH_DATA4: 0x00000000
>    DPC_AUX_CH_DATA5: 0x00000000
>                DP_D: 0x00000000
>      DPD_AUX_CH_CTL: 0x00000000
>    DPD_AUX_CH_DATA1: 0x00000000
>    DPD_AUX_CH_DATA2: 0x00000000
>    DPD_AUX_CH_DATA3: 0x00000000
>    DPD_AUX_CH_DATA4: 0x00000000
>    DPD_AUX_CH_DATA5: 0x00000000
>          AUD_CONFIG: 0x00000000
>    AUD_HDMIW_STATUS: 0x00000000
>      AUD_CONV_CHCNT: 0x00000000
>       VIDEO_DIP_CTL: 0x00000600
>       AUD_PINW_CNTR: 0x00000140
>         AUD_CNTL_ST: 0x00001800
>         AUD_PIN_CAP: 0x00000094
>        AUD_PINW_CAP: 0x004013b5
>  AUD_PINW_UNSOLRESP: 0x00000000
>    AUD_OUT_DIG_CNVT: 0x00000001
>       AUD_OUT_CWCAP: 0x00000219
>         AUD_GRP_CAP: 0x00000004
>       FENCE START 0: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>         FENCE END 0: 0x00000000 (                                   0x00000000 end)
>       FENCE START 1: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>         FENCE END 1: 0x00000000 (                                   0x00000000 end)
>       FENCE START 2: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>         FENCE END 2: 0x00000000 (                                   0x00000000 end)
>       FENCE START 3: 0x0294800d ( enabled, X tile walk,  384 pitch, 0x02948000 start)
>         FENCE END 3: 0x0294b000 (                                   0x0294b000 end)
>       FENCE START 4: 0x01c4409d ( enabled, X tile walk, 4992 pitch, 0x01c44000 start)
>         FENCE END 4: 0x01c63000 (                                   0x01c63000 end)
>       FENCE START 5: 0x0340e09d ( enabled, X tile walk, 4992 pitch, 0x0340e000 start)
>         FENCE END 5: 0x0380d000 (                                   0x0380d000 end)
>       FENCE START 6: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>         FENCE END 6: 0x00000000 (                                   0x00000000 end)
>       FENCE START 7: 0x01cd700d ( enabled, X tile walk,  384 pitch, 0x01cd7000 start)
>         FENCE END 7: 0x01cda000 (                                   0x01cda000 end)
>       FENCE START 8: 0x01bf809d ( enabled, X tile walk, 4992 pitch, 0x01bf8000 start)
>         FENCE END 8: 0x01c17000 (                                   0x01c17000 end)
>       FENCE START 9: 0x0242503d ( enabled, X tile walk, 1920 pitch, 0x02425000 start)
>         FENCE END 9: 0x024a4000 (                                   0x024a4000 end)
>      FENCE START 10: 0x0272c01d ( enabled, X tile walk,  896 pitch, 0x0272c000 start)
>        FENCE END 10: 0x02733000 (                                   0x02733000 end)
>      FENCE START 11: 0x01cdb00d ( enabled, X tile walk,  384 pitch, 0x01cdb000 start)
>        FENCE END 11: 0x01cde000 (                                   0x01cde000 end)
>      FENCE START 12: 0x0294c00d ( enabled, X tile walk,  384 pitch, 0x0294c000 start)
>        FENCE END 12: 0x0294f000 (                                   0x0294f000 end)
>      FENCE START 13: 0x01c9100d ( enabled, X tile walk,  384 pitch, 0x01c91000 start)
>        FENCE END 13: 0x01c94000 (                                   0x01c94000 end)
>      FENCE START 14: 0x01d3007d ( enabled, X tile walk, 3968 pitch, 0x01d30000 start)
>        FENCE END 14: 0x01f2f000 (                                   0x01f2f000 end)
>      FENCE START 15: 0x00000000 (disabled, X tile walk,    0 pitch, 0x00000000 start)
>        FENCE END 15: 0x00000000 (                                   0x00000000 end)
>             INST_PM: 0x00000000
>pipe A dot 108000 n 2 m1 14 m2 8 p1 2 p2 10
>pipe B dot 69285 n 3 m1 16 m2 5 p1 2 p2 14

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Attachments on bug 28546: 36275 | 36276 | 36277 | 36304 | 36305 | 36710 | 36711 | 36712 | 36713 | 36751 | 36752 | 36753

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