X.Org X Server 1.6.3
Release Date: 2009-7-31
X Protocol Version 11, Revision 0
Build Operating System: Linux 2.6.24-24-server i686 Ubuntu
Current Operating System: Linux ubuntu 2.6.31-9-generic #29-Ubuntu SMP Sun Aug 30 17:39:23 UTC 2009 i686
Kernel command line: BOOT_IMAGE=/casper/vmlinuz file=/cdrom/preseed/ubuntu.seed boot=casper initrd=/casper/initrd.lz quiet splash  i915.modeset=0--
Build Date: 27 August 2009  03:53:56PM
xorg-server 2:1.6.3-1ubuntu4 (buildd@rothera.buildd) 
	Before reporting problems, check http://wiki.x.org
	to make sure that you have the latest version.
Markers: (--) probed, (**) from config file, (==) default setting,
	(++) from command line, (!!) notice, (II) informational,
	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
(==) Log file: "/var/log/Xorg.0.log", Time: Thu Sep 10 15:28:09 2009
(++) Using config file: "/root/xorg.conf.new"
(==) ServerLayout "X.org Configured"
(**) |-->Screen "Screen0" (0)
(**) |   |-->Monitor "Monitor0"
(**) |   |-->Device "Card0"
(**) |-->Input Device "Mouse0"
(**) |-->Input Device "Keyboard0"
(==) Automatically adding devices
(==) Automatically enabling devices
(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
	Entry deleted from font path.
(WW) The directory "/usr/share/fonts/X11/cyrillic" does not exist.
	Entry deleted from font path.
(**) FontPath set to:
	/usr/share/fonts/X11/misc,
	/usr/share/fonts/X11/100dpi/:unscaled,
	/usr/share/fonts/X11/75dpi/:unscaled,
	/usr/share/fonts/X11/Type1,
	/usr/share/fonts/X11/100dpi,
	/usr/share/fonts/X11/75dpi,
	/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType,
	/usr/share/fonts/X11/misc,
	/usr/share/fonts/X11/100dpi/:unscaled,
	/usr/share/fonts/X11/75dpi/:unscaled,
	/usr/share/fonts/X11/Type1,
	/usr/share/fonts/X11/100dpi,
	/usr/share/fonts/X11/75dpi,
	/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType,
	built-ins
(**) ModulePath set to "/usr/lib/xorg/modules"
(WW) AllowEmptyInput is on, devices using drivers 'kbd', 'mouse' or 'vmmouse' will be disabled.
(WW) Disabling Mouse0
(WW) Disabling Keyboard0
(II) Loader magic: 0x1fbc0
(II) Module ABI versions:
	X.Org ANSI C Emulation: 0.4
	X.Org Video Driver: 5.0
	X.Org XInput driver : 4.0
	X.Org Server Extension : 2.0
(II) Loader running on linux
(--) using VT number 7

(--) PCI:*(0:0:2:0) 8086:29c2:1462:7404 Intel Corporation 82G33/G31 Express Integrated Graphics Controller rev 16, Mem @ 0xfe980000/524288, 0xd0000000/268435456, 0xfe800000/1048576, I/O @ 0x0000cc00/8
(II) Open ACPI successful (/var/run/acpid.socket)
(II) System resource ranges:
	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
(II) "record" will be loaded. This was enabled by default and also specified in the config file.
(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
(II) "dri2" will be loaded. This was enabled by default and also specified in the config file.
(II) LoadModule: "dbe"
(II) Loading /usr/lib/xorg/modules/extensions//libdbe.so
(II) Module dbe: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.0.0
	Module class: X.Org Server Extension
	ABI class: X.Org Server Extension, version 2.0
(II) Loading extension DOUBLE-BUFFER
(II) LoadModule: "dri"
(II) Loading /usr/lib/xorg/modules/extensions//libdri.so
(II) Module dri: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.0.0
	ABI class: X.Org Server Extension, version 2.0
(II) Loading extension XFree86-DRI
(II) LoadModule: "dri2"
(II) Loading /usr/lib/xorg/modules/extensions//libdri2.so
(II) Module dri2: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.1.0
	ABI class: X.Org Server Extension, version 2.0
(II) Loading extension DRI2
(II) LoadModule: "extmod"
(II) Loading /usr/lib/xorg/modules/extensions//libextmod.so
(II) Module extmod: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.0.0
	Module class: X.Org Server Extension
	ABI class: X.Org Server Extension, version 2.0
(II) Loading extension MIT-SCREEN-SAVER
(II) Loading extension XFree86-VidModeExtension
(II) Loading extension XFree86-DGA
(II) Loading extension DPMS
(II) Loading extension XVideo
(II) Loading extension XVideo-MotionCompensation
(II) Loading extension X-Resource
(II) LoadModule: "glx"
(II) Loading /usr/lib/xorg/modules/extensions//libglx.so
(II) Module glx: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.0.0
	ABI class: X.Org Server Extension, version 2.0
(==) AIGLX enabled
(II) Loading extension GLX
(II) LoadModule: "record"
(II) Loading /usr/lib/xorg/modules/extensions//librecord.so
(II) Module record: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.13.0
	Module class: X.Org Server Extension
	ABI class: X.Org Server Extension, version 2.0
(II) Loading extension RECORD
(II) LoadModule: "intel"
(II) Loading /usr/lib/xorg/modules/drivers//intel_drv.so
(II) Module intel: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 2.8.1
	Module class: X.Org Video Driver
	ABI class: X.Org Video Driver, version 5.0
(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
	E7221 (i915), 915GM, 945G, 945GM, 945GME, IGD_GM, IGD_G, 965G, G35,
	965Q, 946GZ, 965GM, 965GME/GLE, G33, Q35, Q33,
	Mobile Intel® GM45 Express Chipset,
	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41, IGDNG_D,
	IGDNG_M
(II) Primary Device is: PCI 00@00:02:0
(II) resource ranges after xf86ClaimFixedResources() call:
	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
(II) resource ranges after probing:
	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
(II) Loading sub module "vgahw"
(II) LoadModule: "vgahw"
(II) Loading /usr/lib/xorg/modules//libvgahw.so
(II) Module vgahw: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 0.1.0
	ABI class: X.Org Video Driver, version 5.0
(II) Loading sub module "ramdac"
(II) LoadModule: "ramdac"
(II) Module "ramdac" already built-in
drmOpenDevice: node name is /dev/dri/card0
[drm] failed to load kernel module "i915"
(EE) intel(0): [drm] Failed to open DRM device for : No such file or directory
(EE) intel(0): Failed to become DRM master.
(==) intel(0): Depth 24, (--) framebuffer bpp 32
(==) intel(0): RGB weight 888
(==) intel(0): Default visual is TrueColor
(**) intel(0): Option "ModeDebug" "true"
(II) intel(0): Integrated Graphics Chipset: Intel(R) G33
(--) intel(0): Chipset: "G33"
(--) intel(0): Linear framebuffer at 0xD0000000
(--) intel(0): IO registers at addr 0xFE980000 size 524288
(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
(II) intel(0): the SDVO device with slave addr 72 is found on DVO 1 port
(II) intel(0): the SDVO device with slave addr 70 is found on DVO 2 port
(II) intel(0): Hardware state on X startup:
(II) intel(0): DumpRegsBegin
(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
(II) intel(0):           PGETBL_CTL: 0x00000001
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II) intel(0):            DPLL_TEST: 0x00010001 ()
(II) intel(0):         CACHE_MODE_0: 0x00006820
(II) intel(0):              D_STATE: 0x00000000
(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
(II) intel(0):       RENCLK_GATE_D1: 0x00000000
(II) intel(0):       RENCLK_GATE_D2: 0x00000000
(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
(II) intel(0):                SDVOC: 0x80300000 (enabled, pipe A, stall disabled, not detected)
(II) intel(0):              SDVOUDI: 0x00000000
(II) intel(0):               DSPARB: 0x00001d9c
(II) intel(0):               DSPFW1: 0x00000000
(II) intel(0):               DSPFW2: 0x00000000
(II) intel(0):               DSPFW3: 0x00000000
(II) intel(0):                 ADPA: 0x80000010 (enabled, pipe A, -hsync, +vsync)
(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOC: 0x80300000 (enabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):          DVOA_SRCDIM: 0x00000000
(II) intel(0):          DVOB_SRCDIM: 0x00000000
(II) intel(0):          DVOC_SRCDIM: 0x00000000
(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
(II) intel(0):         PP_ON_DELAYS: 0x00000000
(II) intel(0):        PP_OFF_DELAYS: 0x00000000
(II) intel(0):           PP_DIVISOR: 0x00000000
(II) intel(0):         PFIT_CONTROL: 0x00000000
(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
(II) intel(0):             DSPACNTR: 0x14000000 (disabled, pipe A)
(II) intel(0):           DSPASTRIDE: 0x00000500 (1280 bytes)
(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPASIZE: 0x018f02cf (720, 400)
(II) intel(0):             DSPABASE: 0x00000000
(II) intel(0):             DSPASURF: 0x00000000
(II) intel(0):          DSPATILEOFF: 0x00000000
(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_A: 0xd4040033 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10, SDVO mult 4)
(II) intel(0):            DPLL_A_MD: 0x00000000
(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_A: 0x00000000
(II) intel(0):         VSYNCSHIFT_A: 0x00000000
(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
(II) intel(0):             DSPBBASE: 0x00000000
(II) intel(0):             DSPBSURF: 0x00000000
(II) intel(0):          DSPBTILEOFF: 0x00000000
(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
(II) intel(0):            DPLL_B_MD: 0x00000000
(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_B: 0x00000000
(II) intel(0):         VSYNCSHIFT_B: 0x00000000
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
(II) intel(0):        VCLK_POST_DIV: 0x00020002
(II) intel(0):             VGACNTRL: 0x0124008e (enabled)
(II) intel(0):               TV_CTL: 0x00000000
(II) intel(0):               TV_DAC: 0x00000000
(II) intel(0):             TV_CSC_Y: 0x00000000
(II) intel(0):            TV_CSC_Y2: 0x00000000
(II) intel(0):             TV_CSC_U: 0x00000000
(II) intel(0):            TV_CSC_U2: 0x00000000
(II) intel(0):             TV_CSC_V: 0x00000000
(II) intel(0):            TV_CSC_V2: 0x00000000
(II) intel(0):         TV_CLR_KNOBS: 0x00000000
(II) intel(0):         TV_CLR_LEVEL: 0x00000000
(II) intel(0):           TV_H_CTL_1: 0x00000000
(II) intel(0):           TV_H_CTL_2: 0x00000000
(II) intel(0):           TV_H_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_1: 0x00000000
(II) intel(0):           TV_V_CTL_2: 0x00000000
(II) intel(0):           TV_V_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_4: 0x00000000
(II) intel(0):           TV_V_CTL_5: 0x00000000
(II) intel(0):           TV_V_CTL_6: 0x00000000
(II) intel(0):           TV_V_CTL_7: 0x00000000
(II) intel(0):          TV_SC_CTL_1: 0x00000000
(II) intel(0):          TV_SC_CTL_2: 0x00000000
(II) intel(0):          TV_SC_CTL_3: 0x00000000
(II) intel(0):           TV_WIN_POS: 0x00000000
(II) intel(0):          TV_WIN_SIZE: 0x00000000
(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
(II) intel(0):        TV_CC_CONTROL: 0x00000000
(II) intel(0):           TV_CC_DATA: 0x00000000
(II) intel(0):          TV_H_LUMA_0: 0x00000000
(II) intel(0):         TV_H_LUMA_59: 0x00000000
(II) intel(0):        TV_H_CHROMA_0: 0x00000000
(II) intel(0):       TV_H_CHROMA_59: 0x00000000
(II) intel(0):         FBC_CFB_BASE: 0xffffffff
(II) intel(0):          FBC_LL_BASE: 0xffffffff
(II) intel(0):          FBC_CONTROL: 0xffffffff
(II) intel(0):          FBC_COMMAND: 0xffffffff
(II) intel(0):           FBC_STATUS: 0xffffffff
(II) intel(0):         FBC_CONTROL2: 0xffffffff
(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
(II) intel(0):          FBC_MOD_NUM: 0xffffffff
(II) intel(0):              MI_MODE: 0x00000200
(II) intel(0):         MI_ARB_STATE: 0x00000040
(II) intel(0):       MI_RDRET_STATE: 0x00000000
(II) intel(0):              ECOSKPD: 0x00000307
(II) intel(0):                 DP_B: 0x00000000
(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_C: 0x00000000
(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_D: 0x00000000
(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
(II) intel(0):             FENCE  0: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  1: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  2: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  3: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  4: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  5: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  6: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  7: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  8: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  9: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  10: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  11: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  12: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  13: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  14: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  15: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
(II) intel(0): DumpRegsEnd
(II) intel(0): 2 display pipes available.
(II) Loading sub module "ddc"
(II) LoadModule: "ddc"
(II) Module "ddc" already built-in
(II) Loading sub module "i2c"
(II) LoadModule: "i2c"
(II) Module "i2c" already built-in
(II) intel(0): Output VGA using monitor section Monitor0
(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x72.
(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
(II) intel(0): SDVOB: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
(II) intel(0): SDVOB: R: 02 47 02 01 01 01 01 00 (Success)
(II) intel(0): SDVOB: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
(II) intel(0): SDVOB: R: 10 12                   (Success)
(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 9E                         (SDVO_CMD_GET_ENCODE)
(II) intel(0): SDVOB: R: 00                      (Success)
(II) intel(0): Output TMDS-1 has no monitor section
(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
(II) intel(0): SDVOB: R: C4 09 74 40             (Success)
(II) intel(0): SDVOB: device VID/DID: 02:47.02, clock range 25.0MHz - 165.0MHz
(II) intel(0): SDVOB: 1 input channel
(II) intel(0): SDVOB: TMDS0 output reported
(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x70.
(II) intel(0): I2C bus "SDVOC DDC Bus" initialized.
(II) intel(0): SDVOC: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
(II) intel(0): SDVOC: R: 02 3C 06 01 01 01 01 00 (Success)
(II) intel(0): SDVOC: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
(II) intel(0): SDVOC: R: 00 00                   (Not supported)
(II) intel(0): Output TMDS-2 has no monitor section
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
(II) intel(0): SDVOC: R: C4 09 20 4E             (Success)
(II) intel(0): SDVOC: device VID/DID: 02:3C.06, clock range 25.0MHz - 200.0MHz
(II) intel(0): SDVOC: 1 input channel
(II) intel(0): SDVOC: TMDS0 output reported
(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
(II) intel(0): SDVOB: R: 01                      (Success)
(II) intel(0): Current clock rate multiplier: 1
(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R: 00 00                   (Success)
(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success)
(II) intel(0): SDVOB: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success)
(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success)
(II) intel(0): SDVOB: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success)
(II) intel(0): SDVOC: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R: 08                      (Success)
(II) intel(0): Current clock rate multiplier: 8
(II) intel(0): SDVOC: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R: 01 00                   (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R: D6 09 80 A0 20 E0 2D 10 (Success)
(II) intel(0): SDVOC: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R: 10 60 A2 00 1C 00 00 00 (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R: D6 09 80 A0 20 E0 2D 10 (Success)
(II) intel(0): SDVOC: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R: 10 60 A2 00 1C 00 00 00 (Success)
(II) intel(0): I2C bus "CRTDDC_A" initialized.
(II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" registered at address 0x60.
(II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
(II) intel(0): I2C device "CRTDDC_A:ddc2" removed.
(II) intel(0): I2C device "CRTDDC_A:E-EDID segment register" removed.
(II) intel(0): I2C bus "CRTDDC_A" removed.
(II) intel(0): I2C bus "CRTDDC_D" initialized.
(II) intel(0): I2C device "CRTDDC_D:E-EDID segment register" registered at address 0x60.
(II) intel(0): I2C device "CRTDDC_D:ddc2" registered at address 0xA0.
(II) intel(0): I2C device "CRTDDC_D:ddc2" removed.
(II) intel(0): I2C device "CRTDDC_D:E-EDID segment register" removed.
(II) intel(0): I2C bus "CRTDDC_D" removed.
(II) intel(0): I2C bus "CRTDDC_E" initialized.
(II) intel(0): I2C device "CRTDDC_E:E-EDID segment register" registered at address 0x60.
(II) intel(0): I2C device "CRTDDC_E:ddc2" registered at address 0xA0.
(II) intel(0): I2C device "CRTDDC_E:ddc2" removed.
(II) intel(0): I2C device "CRTDDC_E:E-EDID segment register" removed.
(II) intel(0): I2C bus "CRTDDC_E" removed.
(II) intel(0): EDID for output VGA
(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x960" (hsync out of range)
(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
(II) intel(0): Not using default mode "1360x768" (monitor doesn't support reduced blanking)
(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1440x900" (hsync out of range)
(II) intel(0): Not using default mode "1600x1024" (hsync out of range)
(II) intel(0): Not using default mode "1680x1050" (hsync out of range)
(II) intel(0): Not using default mode "1680x1050" (hsync out of range)
(II) intel(0): Not using default mode "1680x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1680x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1680x1050" (vrefresh out of range)
(II) intel(0): Not using default mode "1920x1080" (hsync out of range)
(II) intel(0): Not using default mode "1920x1200" (hsync out of range)
(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
(II) intel(0): Not using default mode "2048x1536" (hsync out of range)
(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
(II) intel(0): Not using default mode "2048x1536" (vrefresh out of range)
(II) intel(0): Printing probed modes for output VGA
(II) intel(0): Modeline "1360x768"x59.8   84.75  1360 1432 1568 1776  768 771 781 798 -hsync +vsync (47.7 kHz)
(II) intel(0): Modeline "1152x864"x60.0   81.62  1152 1216 1336 1520  864 865 868 895 -hsync +vsync (53.7 kHz)
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
(II) intel(0): SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
(II) intel(0): SDVOB: R: 00 00                   (Success)
(II) intel(0): EDID for output TMDS-1
(II) intel(0): SDVOC: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
(II) intel(0): SDVOC: R: 01 00                   (Success)
(II) intel(0): I2C device "SDVOC DDC Bus:E-EDID segment register" registered at address 0x60.
(II) intel(0): I2C device "SDVOC DDC Bus:ddc2" registered at address 0xA0.
(II) intel(0): SDVOC: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
(II) intel(0): SDVOC: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
(II) intel(0): EDID for output TMDS-2
(II) intel(0): Manufacturer: MSI  Model: 6462  Serial#: 64627404
(II) intel(0): Year: 2007  Week: 35
(II) intel(0): EDID Version: 1.3
(II) intel(0): Digital Display Input
(II) intel(0): DFP 1.x compatible TMDS
(II) intel(0): Max Image Size [cm]: horiz.: 37  vert.: 30
(II) intel(0): Gamma: 2.64
(II) intel(0): DPMS capabilities: StandBy Suspend Off
(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
(II) intel(0): First detailed timing not preferred mode in violation of standard!
(II) intel(0): redX: 0.632 redY: 0.335   greenX: 0.295 greenY: 0.593
(II) intel(0): blueX: 0.143 blueY: 0.065   whiteX: 0.282 whiteY: 0.297
(II) intel(0): Supported established timings:
(II) intel(0): 720x400@70Hz
(II) intel(0): 640x480@60Hz
(II) intel(0): 640x480@72Hz
(II) intel(0): 640x480@75Hz
(II) intel(0): 800x600@60Hz
(II) intel(0): 800x600@75Hz
(II) intel(0): 1024x768@60Hz
(II) intel(0): 1024x768@70Hz
(II) intel(0): 1024x768@75Hz
(II) intel(0): 1280x1024@75Hz
(II) intel(0): Manufacturer's mask: 0
(II) intel(0): Supported standard timings:
(II) intel(0): #0: hsize: 1280  vsize 960  refresh: 75  vid: 20353
(II) intel(0): #1: hsize: 1024  vsize 768  refresh: 75  vid: 20321
(II) intel(0): #2: hsize: 800  vsize 600  refresh: 75  vid: 20293
(II) intel(0): #3: hsize: 640  vsize 480  refresh: 75  vid: 20273
(II) intel(0): #4: hsize: 1280  vsize 1024  refresh: 75  vid: 36737
(II) intel(0): #5: hsize: 1024  vsize 819  refresh: 75  vid: 36705
(II) intel(0): #6: hsize: 800  vsize 640  refresh: 75  vid: 36677
(II) intel(0): Supported detailed timing:
(II) intel(0): clock: 78.8 MHz   Image Size:  376 x 301 mm
(II) intel(0): h_active: 1024  h_sync: 1040  h_sync_end 1136 h_blank_end 1312 h_border: 0
(II) intel(0): v_active: 768  v_sync: 769  v_sync_end 772 v_blanking: 800 v_border: 0
(II) intel(0): Ranges: V min: 50 V max: 85 Hz, H min: 30 H max: 82 kHz, PixClock max 110 MHz
(II) intel(0): Monitor name: Crystal
(II) intel(0): Serial No: 000001
(II) intel(0): EDID (in hex):
(II) intel(0): 	00ffffffffffff0036696264cc22da03
(II) intel(0): 	2311010381251ea4e8fbb4a1554b9724
(II) intel(0): 	10484cad4f00814f614f454f314f818f
(II) intel(0): 	618f458f0101c31e0020410020301060
(II) intel(0): 	1300782d1100001e000000fd0032551e
(II) intel(0): 	520b000a202020202020000000fc0043
(II) intel(0): 	72797374616c0a0a0a0a0a0a000000ff
(II) intel(0): 	003030303030310a20202020202000e3
(II) intel(0): EDID vendor "MSI", prod id 25698
(II) intel(0): SDVOC: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
(II) intel(0): SDVOC: R: 00 00                   (Not supported)
(II) intel(0): Not using mode "1280x1024" (bad mode clock/interlace/doublescan)
(II) intel(0): Not using mode "1280x960" (bad mode clock/interlace/doublescan)
(II) intel(0): Not using mode "1280x1024" (bad mode clock/interlace/doublescan)
(II) intel(0): Printing probed modes for output TMDS-2
(II) intel(0): Modeline "1024x819"x75.0   88.24  1024 1088 1200 1376  819 820 823 855 -hsync +vsync (64.1 kHz)
(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Modeline "800x640"x75.0   52.98  800 840 928 1056  640 641 644 669 -hsync +vsync (50.2 kHz)
(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
(II) intel(0): Output VGA connected
(II) intel(0): Output TMDS-1 disconnected
(II) intel(0): Output TMDS-2 connected
(II) intel(0): Using fuzzy aspect match for initial modes
(II) intel(0): Output VGA using initial mode 1024x768
(II) intel(0): Output TMDS-2 using initial mode 1024x768
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 17 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 15 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): detected 1024 kB GTT.
(II) intel(0): detected 7164 kB stolen memory.
(==) intel(0): video overlay key set to 0x101fe
(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
(==) intel(0): DPI set to (96, 96)
(II) Loading sub module "fb"
(II) LoadModule: "fb"
(II) Loading /usr/lib/xorg/modules//libfb.so
(II) Module fb: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.0.0
	ABI class: X.Org ANSI C Emulation, version 0.4
(II) intel(0): Comparing regs from server start up to After PreInit
(==) Depth 24 pixmap format is 32 bpp
(II) do I need RAC?  No, I don't.
(II) resource ranges after preInit:
	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
(II) intel(0): Kernel reported 238592 total, 1 used
(II) intel(0): I830CheckAvailableMemory: 954364 kB available
(WW) intel(0): DRI2: failed to open drm device
(**) intel(0): Framebuffer compression disabled
(**) intel(0): Tiling enabled
(**) intel(0): SwapBuffers wait enabled
(EE) intel(0): Failed to initialize kernel memory manager
(==) intel(0): VideoRam: 262144 KB
(II) intel(0): Attempting memory allocation with tiled buffers.
(II) intel(0): Tiled allocation successful.
(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
(II) UXA(0): Driver registered support for the following operations:
(II)         solid
(II)         copy
(II)         composite (RENDER acceleration)
(==) intel(0): Backing store disabled
(==) intel(0): Silken mouse enabled
(II) intel(0): Initializing HW Cursor
(WW) intel(0): drmSetMaster failed: Bad file descriptor
(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
(II) intel(0): SDVOB: R: 01                      (Success)
(II) intel(0): Current clock rate multiplier: 1
(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R: 00 00                   (Success)
(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success)
(II) intel(0): SDVOB: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success)
(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success)
(II) intel(0): SDVOB: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success)
(II) intel(0): SDVOC: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R: 08                      (Success)
(II) intel(0): Current clock rate multiplier: 8
(II) intel(0): SDVOC: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R: 01 00                   (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R: D6 09 80 A0 20 E0 2D 10 (Success)
(II) intel(0): SDVOC: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R: 10 60 A2 00 1C 00 00 00 (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R: D6 09 80 A0 20 E0 2D 10 (Success)
(II) intel(0): SDVOC: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R: 10 60 A2 00 1C 00 00 00 (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x006ff000 (pgoffset 1791)
(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0082a000 (pgoffset 2090)
(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x00c00000 (pgoffset 3072)
(II) intel(0): Fixed memory allocation layout:
(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
(II) intel(0): 0x0002a000-0x00829fff: fake bufmgr (8192 kB)
(II) intel(0): 0x006ff000:            end of stolen memory
(II) intel(0): 0x0082a000-0x0082afff: overlay registers (4 kB)
(II) intel(0): 0x00c00000-0x00ffffff: front buffer (4096 kB) X tiled
(II) intel(0): 0x10000000:            end of aperture
(II) intel(0): BO memory allocation layout:
(WW) intel(0): ESR is 0x00000001, instruction error
(WW) intel(0): Existing errors found in hardware state.
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Mode for pipe A:
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): chosen: dotclock 64800 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 40, p1 4, p2 10))
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Mode for pipe B:
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Adjusted mode for pipe B:
(II) intel(0): Modeline "1024x768"x60.0  130.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (96.7 kHz)
(II) intel(0): chosen: dotclock 129600 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 20, p1 2, p2 10))
(II) intel(0): SDVOC: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 21 02                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): Hardware state at EnterVT:
(II) intel(0): DumpRegsBegin
(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
(II) intel(0):           PGETBL_CTL: 0x00000001
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II) intel(0):            DPLL_TEST: 0x00010001 ()
(II) intel(0):         CACHE_MODE_0: 0x00006820
(II) intel(0):              D_STATE: 0x00000000
(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
(II) intel(0):       RENCLK_GATE_D1: 0x00000000
(II) intel(0):       RENCLK_GATE_D2: 0x00000000
(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
(II) intel(0):                SDVOC: 0xc0480080 (enabled, pipe B, stall disabled, not detected)
(II) intel(0):              SDVOUDI: 0x00000000
(II) intel(0):               DSPARB: 0x00002f2f
(II) intel(0):               DSPFW1: 0x00000000
(II) intel(0):               DSPFW2: 0x00000000
(II) intel(0):               DSPFW3: 0x00000000
(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOC: 0xc0480080 (enabled, pipe B, no stall, -hsync, -vsync)
(II) intel(0):          DVOA_SRCDIM: 0x00000000
(II) intel(0):          DVOB_SRCDIM: 0x00000000
(II) intel(0):          DVOC_SRCDIM: 0x00000000
(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
(II) intel(0):         PP_ON_DELAYS: 0x00000000
(II) intel(0):        PP_OFF_DELAYS: 0x00000000
(II) intel(0):           PP_DIVISOR: 0x00000000
(II) intel(0):         PFIT_CONTROL: 0x00000000
(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
(II) intel(0):             DSPACNTR: 0xd8000000 (enabled, pipe A)
(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPASIZE: 0x02ff03ff (1024, 768)
(II) intel(0):             DSPABASE: 0x00c00000
(II) intel(0):             DSPASURF: 0x00000000
(II) intel(0):          DSPATILEOFF: 0x00000000
(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
(II) intel(0):                 FPA0: 0x00010c09 (n = 1, m1 = 12, m2 = 9)
(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_A: 0x94080000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 4, p2 = 10, SDVO mult 1)
(II) intel(0):            DPLL_A_MD: 0x00000000
(II) intel(0):             HTOTAL_A: 0x053f03ff (1024 active, 1344 total)
(II) intel(0):             HBLANK_A: 0x053f03ff (1024 start, 1344 end)
(II) intel(0):              HSYNC_A: 0x049f0417 (1048 start, 1184 end)
(II) intel(0):             VTOTAL_A: 0x032502ff (768 active, 806 total)
(II) intel(0):             VBLANK_A: 0x032502ff (768 start, 806 end)
(II) intel(0):              VSYNC_A: 0x03080302 (771 start, 777 end)
(II) intel(0):            BCLRPAT_A: 0x00000000
(II) intel(0):         VSYNCSHIFT_A: 0x00000000
(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPBSIZE: 0x02ff03ff (1024, 768)
(II) intel(0):             DSPBBASE: 0x00c00000
(II) intel(0):             DSPBSURF: 0x00000000
(II) intel(0):          DSPBTILEOFF: 0x00000000
(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
(II) intel(0):                 FPB0: 0x00010c09 (n = 1, m1 = 12, m2 = 9)
(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_B: 0xd4020010 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 2)
(II) intel(0):            DPLL_B_MD: 0x00000000
(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
(II) intel(0):            BCLRPAT_B: 0x00000000
(II) intel(0):         VSYNCSHIFT_B: 0x00000000
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
(II) intel(0):        VCLK_POST_DIV: 0x00020002
(II) intel(0):             VGACNTRL: 0x8124008e (disabled)
(II) intel(0):               TV_CTL: 0x00000000
(II) intel(0):               TV_DAC: 0x00000000
(II) intel(0):             TV_CSC_Y: 0x00000000
(II) intel(0):            TV_CSC_Y2: 0x00000000
(II) intel(0):             TV_CSC_U: 0x00000000
(II) intel(0):            TV_CSC_U2: 0x00000000
(II) intel(0):             TV_CSC_V: 0x00000000
(II) intel(0):            TV_CSC_V2: 0x00000000
(II) intel(0):         TV_CLR_KNOBS: 0x00000000
(II) intel(0):         TV_CLR_LEVEL: 0x00000000
(II) intel(0):           TV_H_CTL_1: 0x00000000
(II) intel(0):           TV_H_CTL_2: 0x00000000
(II) intel(0):           TV_H_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_1: 0x00000000
(II) intel(0):           TV_V_CTL_2: 0x00000000
(II) intel(0):           TV_V_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_4: 0x00000000
(II) intel(0):           TV_V_CTL_5: 0x00000000
(II) intel(0):           TV_V_CTL_6: 0x00000000
(II) intel(0):           TV_V_CTL_7: 0x00000000
(II) intel(0):          TV_SC_CTL_1: 0x00000000
(II) intel(0):          TV_SC_CTL_2: 0x00000000
(II) intel(0):          TV_SC_CTL_3: 0x00000000
(II) intel(0):           TV_WIN_POS: 0x00000000
(II) intel(0):          TV_WIN_SIZE: 0x00000000
(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
(II) intel(0):        TV_CC_CONTROL: 0x00000000
(II) intel(0):           TV_CC_DATA: 0x00000000
(II) intel(0):          TV_H_LUMA_0: 0x00000000
(II) intel(0):         TV_H_LUMA_59: 0x00000000
(II) intel(0):        TV_H_CHROMA_0: 0x00000000
(II) intel(0):       TV_H_CHROMA_59: 0x00000000
(II) intel(0):         FBC_CFB_BASE: 0xffffffff
(II) intel(0):          FBC_LL_BASE: 0xffffffff
(II) intel(0):          FBC_CONTROL: 0xffffffff
(II) intel(0):          FBC_COMMAND: 0xffffffff
(II) intel(0):           FBC_STATUS: 0xffffffff
(II) intel(0):         FBC_CONTROL2: 0xffffffff
(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
(II) intel(0):          FBC_MOD_NUM: 0xffffffff
(II) intel(0):              MI_MODE: 0x00000200
(II) intel(0):         MI_ARB_STATE: 0x00000040
(II) intel(0):       MI_RDRET_STATE: 0x00000000
(II) intel(0):              ECOSKPD: 0x00000307
(II) intel(0):                 DP_B: 0x00000000
(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_C: 0x00000000
(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_D: 0x00000000
(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
(II) intel(0):             FENCE  0: 0x00c00231 ( enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb))
(II) intel(0):             FENCE  1: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  2: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  3: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  4: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  5: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  6: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  7: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  8: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  9: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  10: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  11: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  12: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  13: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  14: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  15: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0): pipe A dot 64800 n 1 m1 12 m2 9 p1 4 p2 10
(II) intel(0): pipe B dot 129600 n 1 m1 12 m2 9 p1 2 p2 10
(II) intel(0): DumpRegsEnd
(II) intel(0): Output configuration:
(II) intel(0):   Pipe A is on
(II) intel(0):   Display plane A is now enabled and connected to pipe A.
(II) intel(0):   Pipe B is on
(II) intel(0):   Display plane B is now enabled and connected to pipe B.
(II) intel(0):   Output VGA is connected to pipe A
(II) intel(0):   Output TMDS-1 is connected to pipe none
(II) intel(0):   Output TMDS-2 is connected to pipe B
(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
(II) intel(0): DPMS enabled
(==) intel(0): Intel XvMC decoder disabled
(II) intel(0): Set up textured video
(II) intel(0): Set up overlay video
(II) intel(0): direct rendering: Failed
(--) RandR disabled
(II) Initializing built-in extension Generic Event Extension
(II) Initializing built-in extension SHAPE
(II) Initializing built-in extension MIT-SHM
(II) Initializing built-in extension XInputExtension
(II) Initializing built-in extension XTEST
(II) Initializing built-in extension BIG-REQUESTS
(II) Initializing built-in extension SYNC
(II) Initializing built-in extension XKEYBOARD
(II) Initializing built-in extension XC-MISC
(II) Initializing built-in extension SECURITY
(II) Initializing built-in extension XINERAMA
(II) Initializing built-in extension XFIXES
(II) Initializing built-in extension RENDER
(II) Initializing built-in extension RANDR
(II) Initializing built-in extension COMPOSITE
(II) Initializing built-in extension DAMAGE
(II) AIGLX: Screen 0 is not DRI2 capable
(II) AIGLX: Screen 0 is not DRI capable
(II) AIGLX: Loaded and initialized /usr/lib/dri/swrast_dri.so
(II) GLX: Initialized DRISWRAST GL provider for screen 0
(II) intel(0): Setting screen physical size to 376 x 301
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) config/hal: Adding input device   USB Keyboard
(II) LoadModule: "evdev"
(II) Loading /usr/lib/xorg/modules/input//evdev_drv.so
(II) Module evdev: vendor="X.Org Foundation"
	compiled for 1.6.1.901, module version = 2.2.2
	Module class: X.Org XInput Driver
	ABI class: X.Org XInput driver, version 4.0
(**)   USB Keyboard: always reports core events
(**)   USB Keyboard: Device: "/dev/input/event4"
(II)   USB Keyboard: Found keys
(II)   USB Keyboard: Configuring as keyboard
(II) XINPUT: Adding extended input device "  USB Keyboard" (type: KEYBOARD)
(**) Option "xkb_rules" "evdev"
(**) Option "xkb_model" "pc105"
(**) Option "xkb_layout" "us"
(II) config/hal: Adding input device   USB Keyboard
(**)   USB Keyboard: always reports core events
(**)   USB Keyboard: Device: "/dev/input/event3"
(II)   USB Keyboard: Found keys
(II)   USB Keyboard: Configuring as keyboard
(II) XINPUT: Adding extended input device "  USB Keyboard" (type: KEYBOARD)
(**) Option "xkb_rules" "evdev"
(**) Option "xkb_model" "pc105"
(**) Option "xkb_layout" "us"
(II) config/hal: Adding input device Power Button
(**) Power Button: always reports core events
(**) Power Button: Device: "/dev/input/event1"
(II) Power Button: Found keys
(II) Power Button: Configuring as keyboard
(II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD)
(**) Option "xkb_rules" "evdev"
(**) Option "xkb_model" "pc105"
(**) Option "xkb_layout" "us"
(II) config/hal: Adding input device Power Button
(**) Power Button: always reports core events
(**) Power Button: Device: "/dev/input/event0"
(II) Power Button: Found keys
(II) Power Button: Configuring as keyboard
(II) XINPUT: Adding extended input device "Power Button" (type: KEYBOARD)
(**) Option "xkb_rules" "evdev"
(**) Option "xkb_model" "pc105"
(**) Option "xkb_layout" "us"
(II) config/hal: Adding input device Macintosh mouse button emulation
(**) Macintosh mouse button emulation: always reports core events
(**) Macintosh mouse button emulation: Device: "/dev/input/event2"
(II) Macintosh mouse button emulation: Found 3 mouse buttons
(II) Macintosh mouse button emulation: Found x and y relative axes
(II) Macintosh mouse button emulation: Configuring as mouse
(**) Macintosh mouse button emulation: YAxisMapping: buttons 4 and 5
(**) Macintosh mouse button emulation: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
(II) XINPUT: Adding extended input device "Macintosh mouse button emulation" (type: MOUSE)
(**) Macintosh mouse button emulation: (accel) keeping acceleration scheme 1
(**) Macintosh mouse button emulation: (accel) filter chain progression: 2.00
(**) Macintosh mouse button emulation: (accel) filter stage 0: 20.00 ms
(**) Macintosh mouse button emulation: (accel) set acceleration profile 0
(II) config/hal: Adding input device eGalax Inc. Touch
(II) LoadModule: "synaptics"
(II) Loading /usr/lib/xorg/modules/input//synaptics_drv.so
(II) Module synaptics: vendor="X.Org Foundation"
	compiled for 1.6.3, module version = 1.1.2
	Module class: X.Org XInput Driver
	ABI class: X.Org XInput driver, version 4.0
(II) Synaptics touchpad driver version 1.1.2
(**) Option "Device" "/dev/input/event6"
(--) eGalax Inc. Touch: no supported touchpad found
(EE) eGalax Inc. Touch Unable to query/initialize Synaptics hardware.
(EE) PreInit failed for input device "eGalax Inc. Touch"
(II) UnloadModule: "synaptics"
(EE) config/hal: NewInputDeviceRequest failed (8)
(II) config/hal: Adding input device HID 04d9:1133
(**) HID 04d9:1133: always reports core events
(**) HID 04d9:1133: Device: "/dev/input/event5"
(II) HID 04d9:1133: Found 3 mouse buttons
(II) HID 04d9:1133: Found x and y relative axes
(II) HID 04d9:1133: Found scroll wheel(s)
(II) HID 04d9:1133: Configuring as mouse
(**) HID 04d9:1133: YAxisMapping: buttons 4 and 5
(**) HID 04d9:1133: EmulateWheelButton: 4, EmulateWheelInertia: 10, EmulateWheelTimeout: 200
(II) XINPUT: Adding extended input device "HID 04d9:1133" (type: MOUSE)
(**) HID 04d9:1133: (accel) keeping acceleration scheme 1
(**) HID 04d9:1133: (accel) filter chain progression: 2.00
(**) HID 04d9:1133: (accel) filter stage 0: 20.00 ms
(**) HID 04d9:1133: (accel) set acceleration profile 0
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 17 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 15 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Comparing regs from server start up to After LeaveVT
(WW) intel(0): Register 0x2000 (FENCE  0) changed from 0x00000000 to 0x00c00231
(WW) intel(0): FENCE  0 before: disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb)
(WW) intel(0): FENCE  0 after:  enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb)
(II) intel(0): DumpRegsBegin
(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
(II) intel(0):           PGETBL_CTL: 0x00000001
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II) intel(0):            DPLL_TEST: 0x00010001 ()
(II) intel(0):         CACHE_MODE_0: 0x00006820
(II) intel(0):              D_STATE: 0x00000000
(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
(II) intel(0):       RENCLK_GATE_D1: 0x00000000
(II) intel(0):       RENCLK_GATE_D2: 0x00000000
(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
(II) intel(0):                SDVOC: 0x80300000 (enabled, pipe A, stall disabled, not detected)
(II) intel(0):              SDVOUDI: 0x00000000
(II) intel(0):               DSPARB: 0x00001d9c
(II) intel(0):               DSPFW1: 0x00000000
(II) intel(0):               DSPFW2: 0x00000000
(II) intel(0):               DSPFW3: 0x00000000
(II) intel(0):                 ADPA: 0x80000010 (enabled, pipe A, -hsync, +vsync)
(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOC: 0x80300000 (enabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):          DVOA_SRCDIM: 0x00000000
(II) intel(0):          DVOB_SRCDIM: 0x00000000
(II) intel(0):          DVOC_SRCDIM: 0x00000000
(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
(II) intel(0):         PP_ON_DELAYS: 0x00000000
(II) intel(0):        PP_OFF_DELAYS: 0x00000000
(II) intel(0):           PP_DIVISOR: 0x00000000
(II) intel(0):         PFIT_CONTROL: 0x00000000
(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
(II) intel(0):             DSPACNTR: 0x14000000 (disabled, pipe A)
(II) intel(0):           DSPASTRIDE: 0x00000500 (1280 bytes)
(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPASIZE: 0x018f02cf (720, 400)
(II) intel(0):             DSPABASE: 0x00000000
(II) intel(0):             DSPASURF: 0x00000000
(II) intel(0):          DSPATILEOFF: 0x00000000
(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_A: 0xd4040033 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10, SDVO mult 4)
(II) intel(0):            DPLL_A_MD: 0x00000000
(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_A: 0x00000000
(II) intel(0):         VSYNCSHIFT_A: 0x00000000
(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
(II) intel(0):             DSPBBASE: 0x00000000
(II) intel(0):             DSPBSURF: 0x00000000
(II) intel(0):          DSPBTILEOFF: 0x00000000
(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
(II) intel(0):            DPLL_B_MD: 0x00000000
(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_B: 0x00000000
(II) intel(0):         VSYNCSHIFT_B: 0x00000000
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
(II) intel(0):        VCLK_POST_DIV: 0x00020002
(II) intel(0):             VGACNTRL: 0x0124008e (enabled)
(II) intel(0):               TV_CTL: 0x00000000
(II) intel(0):               TV_DAC: 0x00000000
(II) intel(0):             TV_CSC_Y: 0x00000000
(II) intel(0):            TV_CSC_Y2: 0x00000000
(II) intel(0):             TV_CSC_U: 0x00000000
(II) intel(0):            TV_CSC_U2: 0x00000000
(II) intel(0):             TV_CSC_V: 0x00000000
(II) intel(0):            TV_CSC_V2: 0x00000000
(II) intel(0):         TV_CLR_KNOBS: 0x00000000
(II) intel(0):         TV_CLR_LEVEL: 0x00000000
(II) intel(0):           TV_H_CTL_1: 0x00000000
(II) intel(0):           TV_H_CTL_2: 0x00000000
(II) intel(0):           TV_H_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_1: 0x00000000
(II) intel(0):           TV_V_CTL_2: 0x00000000
(II) intel(0):           TV_V_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_4: 0x00000000
(II) intel(0):           TV_V_CTL_5: 0x00000000
(II) intel(0):           TV_V_CTL_6: 0x00000000
(II) intel(0):           TV_V_CTL_7: 0x00000000
(II) intel(0):          TV_SC_CTL_1: 0x00000000
(II) intel(0):          TV_SC_CTL_2: 0x00000000
(II) intel(0):          TV_SC_CTL_3: 0x00000000
(II) intel(0):           TV_WIN_POS: 0x00000000
(II) intel(0):          TV_WIN_SIZE: 0x00000000
(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
(II) intel(0):        TV_CC_CONTROL: 0x00000000
(II) intel(0):           TV_CC_DATA: 0x00000000
(II) intel(0):          TV_H_LUMA_0: 0x00000000
(II) intel(0):         TV_H_LUMA_59: 0x00000000
(II) intel(0):        TV_H_CHROMA_0: 0x00000000
(II) intel(0):       TV_H_CHROMA_59: 0x00000000
(II) intel(0):         FBC_CFB_BASE: 0xffffffff
(II) intel(0):          FBC_LL_BASE: 0xffffffff
(II) intel(0):          FBC_CONTROL: 0xffffffff
(II) intel(0):          FBC_COMMAND: 0xffffffff
(II) intel(0):           FBC_STATUS: 0xffffffff
(II) intel(0):         FBC_CONTROL2: 0xffffffff
(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
(II) intel(0):          FBC_MOD_NUM: 0xffffffff
(II) intel(0):              MI_MODE: 0x00000200
(II) intel(0):         MI_ARB_STATE: 0x00000040
(II) intel(0):       MI_RDRET_STATE: 0x00000000
(II) intel(0):              ECOSKPD: 0x00000307
(II) intel(0):                 DP_B: 0x00000000
(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_C: 0x00000000
(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_D: 0x00000000
(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
(II) intel(0):             FENCE  0: 0x00c00231 ( enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb))
(II) intel(0):             FENCE  1: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  2: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  3: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  4: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  5: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  6: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  7: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  8: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  9: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  10: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  11: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  12: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  13: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  14: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  15: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
(II) intel(0): DumpRegsEnd
(II) intel(0): xf86UnbindGARTMemory: unbind key 0
(II) intel(0): xf86UnbindGARTMemory: unbind key 1
(II) intel(0): xf86UnbindGARTMemory: unbind key 2
(WW) intel(0): drmDropMaster failed: Bad file descriptor
(II) Open ACPI successful (/var/run/acpid.socket)
(WW) intel(0): drmSetMaster failed: Bad file descriptor
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x006ff000 (pgoffset 1791)
(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0082a000 (pgoffset 2090)
(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x00c00000 (pgoffset 3072)
(II) intel(0): Fixed memory allocation layout:
(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
(II) intel(0): 0x0002a000-0x00829fff: fake bufmgr (8192 kB)
(II) intel(0): 0x006ff000:            end of stolen memory
(II) intel(0): 0x0082a000-0x0082afff: overlay registers (4 kB)
(II) intel(0): 0x00c00000-0x00ffffff: front buffer (4096 kB) X tiled
(II) intel(0): 0x10000000:            end of aperture
(II) intel(0): BO memory allocation layout:
(WW) intel(0): ESR is 0x00000001, instruction error
(WW) intel(0): Existing errors found in hardware state.
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Mode for pipe A:
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): chosen: dotclock 64800 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 40, p1 4, p2 10))
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Mode for pipe B:
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Adjusted mode for pipe B:
(II) intel(0): Modeline "1024x768"x60.0  130.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (96.7 kHz)
(II) intel(0): chosen: dotclock 129600 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 20, p1 2, p2 10))
(II) intel(0): SDVOC: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 21 02                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): Hardware state at EnterVT:
(II) intel(0): DumpRegsBegin
(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
(II) intel(0):           PGETBL_CTL: 0x00000001
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II) intel(0):            DPLL_TEST: 0x00010001 ()
(II) intel(0):         CACHE_MODE_0: 0x00006820
(II) intel(0):              D_STATE: 0x00000000
(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
(II) intel(0):       RENCLK_GATE_D1: 0x00000000
(II) intel(0):       RENCLK_GATE_D2: 0x00000000
(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
(II) intel(0):                SDVOC: 0xc0480080 (enabled, pipe B, stall disabled, not detected)
(II) intel(0):              SDVOUDI: 0x00000000
(II) intel(0):               DSPARB: 0x00002f2f
(II) intel(0):               DSPFW1: 0x00000000
(II) intel(0):               DSPFW2: 0x00000000
(II) intel(0):               DSPFW3: 0x00000000
(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOC: 0xc0480080 (enabled, pipe B, no stall, -hsync, -vsync)
(II) intel(0):          DVOA_SRCDIM: 0x00000000
(II) intel(0):          DVOB_SRCDIM: 0x00000000
(II) intel(0):          DVOC_SRCDIM: 0x00000000
(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
(II) intel(0):         PP_ON_DELAYS: 0x00000000
(II) intel(0):        PP_OFF_DELAYS: 0x00000000
(II) intel(0):           PP_DIVISOR: 0x00000000
(II) intel(0):         PFIT_CONTROL: 0x00000000
(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
(II) intel(0):             DSPACNTR: 0xd8000000 (enabled, pipe A)
(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPASIZE: 0x02ff03ff (1024, 768)
(II) intel(0):             DSPABASE: 0x00c00000
(II) intel(0):             DSPASURF: 0x00000000
(II) intel(0):          DSPATILEOFF: 0x00000000
(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
(II) intel(0):                 FPA0: 0x00010c09 (n = 1, m1 = 12, m2 = 9)
(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_A: 0x94080000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 4, p2 = 10, SDVO mult 1)
(II) intel(0):            DPLL_A_MD: 0x00000000
(II) intel(0):             HTOTAL_A: 0x053f03ff (1024 active, 1344 total)
(II) intel(0):             HBLANK_A: 0x053f03ff (1024 start, 1344 end)
(II) intel(0):              HSYNC_A: 0x049f0417 (1048 start, 1184 end)
(II) intel(0):             VTOTAL_A: 0x032502ff (768 active, 806 total)
(II) intel(0):             VBLANK_A: 0x032502ff (768 start, 806 end)
(II) intel(0):              VSYNC_A: 0x03080302 (771 start, 777 end)
(II) intel(0):            BCLRPAT_A: 0x00000000
(II) intel(0):         VSYNCSHIFT_A: 0x00000000
(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPBSIZE: 0x02ff03ff (1024, 768)
(II) intel(0):             DSPBBASE: 0x00c00000
(II) intel(0):             DSPBSURF: 0x00000000
(II) intel(0):          DSPBTILEOFF: 0x00000000
(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
(II) intel(0):                 FPB0: 0x00010c09 (n = 1, m1 = 12, m2 = 9)
(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_B: 0xd4020010 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 2)
(II) intel(0):            DPLL_B_MD: 0x00000000
(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
(II) intel(0):            BCLRPAT_B: 0x00000000
(II) intel(0):         VSYNCSHIFT_B: 0x00000000
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
(II) intel(0):        VCLK_POST_DIV: 0x00020002
(II) intel(0):             VGACNTRL: 0x8124008e (disabled)
(II) intel(0):               TV_CTL: 0x00000000
(II) intel(0):               TV_DAC: 0x00000000
(II) intel(0):             TV_CSC_Y: 0x00000000
(II) intel(0):            TV_CSC_Y2: 0x00000000
(II) intel(0):             TV_CSC_U: 0x00000000
(II) intel(0):            TV_CSC_U2: 0x00000000
(II) intel(0):             TV_CSC_V: 0x00000000
(II) intel(0):            TV_CSC_V2: 0x00000000
(II) intel(0):         TV_CLR_KNOBS: 0x00000000
(II) intel(0):         TV_CLR_LEVEL: 0x00000000
(II) intel(0):           TV_H_CTL_1: 0x00000000
(II) intel(0):           TV_H_CTL_2: 0x00000000
(II) intel(0):           TV_H_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_1: 0x00000000
(II) intel(0):           TV_V_CTL_2: 0x00000000
(II) intel(0):           TV_V_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_4: 0x00000000
(II) intel(0):           TV_V_CTL_5: 0x00000000
(II) intel(0):           TV_V_CTL_6: 0x00000000
(II) intel(0):           TV_V_CTL_7: 0x00000000
(II) intel(0):          TV_SC_CTL_1: 0x00000000
(II) intel(0):          TV_SC_CTL_2: 0x00000000
(II) intel(0):          TV_SC_CTL_3: 0x00000000
(II) intel(0):           TV_WIN_POS: 0x00000000
(II) intel(0):          TV_WIN_SIZE: 0x00000000
(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
(II) intel(0):        TV_CC_CONTROL: 0x00000000
(II) intel(0):           TV_CC_DATA: 0x00000000
(II) intel(0):          TV_H_LUMA_0: 0x00000000
(II) intel(0):         TV_H_LUMA_59: 0x00000000
(II) intel(0):        TV_H_CHROMA_0: 0x00000000
(II) intel(0):       TV_H_CHROMA_59: 0x00000000
(II) intel(0):         FBC_CFB_BASE: 0xffffffff
(II) intel(0):          FBC_LL_BASE: 0xffffffff
(II) intel(0):          FBC_CONTROL: 0xffffffff
(II) intel(0):          FBC_COMMAND: 0xffffffff
(II) intel(0):           FBC_STATUS: 0xffffffff
(II) intel(0):         FBC_CONTROL2: 0xffffffff
(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
(II) intel(0):          FBC_MOD_NUM: 0xffffffff
(II) intel(0):              MI_MODE: 0x00000200
(II) intel(0):         MI_ARB_STATE: 0x00000040
(II) intel(0):       MI_RDRET_STATE: 0x00000000
(II) intel(0):              ECOSKPD: 0x00000307
(II) intel(0):                 DP_B: 0x00000000
(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_C: 0x00000000
(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_D: 0x00000000
(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
(II) intel(0):             FENCE  0: 0x00c00231 ( enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb))
(II) intel(0):             FENCE  1: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  2: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  3: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  4: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  5: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  6: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  7: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  8: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  9: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  10: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  11: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  12: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  13: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  14: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  15: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0): pipe A dot 64800 n 1 m1 12 m2 9 p1 4 p2 10
(II) intel(0): pipe B dot 129600 n 1 m1 12 m2 9 p1 2 p2 10
(II) intel(0): DumpRegsEnd
(II) intel(0): Output configuration:
(II) intel(0):   Pipe A is on
(II) intel(0):   Display plane A is now enabled and connected to pipe A.
(II) intel(0):   Pipe B is on
(II) intel(0):   Display plane B is now enabled and connected to pipe B.
(II) intel(0):   Output VGA is connected to pipe A
(II) intel(0):   Output TMDS-1 is connected to pipe none
(II) intel(0):   Output TMDS-2 is connected to pipe B
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II)   USB Keyboard: Device reopened after 1 attempts.
(II)   USB Keyboard: Device reopened after 1 attempts.
(II) Power Button: Device reopened after 1 attempts.
(II) Power Button: Device reopened after 1 attempts.
(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
(II) HID 04d9:1133: Device reopened after 1 attempts.
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 17 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 15 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Comparing regs from server start up to After LeaveVT
(WW) intel(0): Register 0x2000 (FENCE  0) changed from 0x00000000 to 0x00c00231
(WW) intel(0): FENCE  0 before: disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb)
(WW) intel(0): FENCE  0 after:  enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb)
(II) intel(0): DumpRegsBegin
(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
(II) intel(0):           PGETBL_CTL: 0x00000001
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II) intel(0):            DPLL_TEST: 0x00010001 ()
(II) intel(0):         CACHE_MODE_0: 0x00006820
(II) intel(0):              D_STATE: 0x00000000
(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
(II) intel(0):       RENCLK_GATE_D1: 0x00000000
(II) intel(0):       RENCLK_GATE_D2: 0x00000000
(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
(II) intel(0):                SDVOC: 0x80300000 (enabled, pipe A, stall disabled, not detected)
(II) intel(0):              SDVOUDI: 0x00000000
(II) intel(0):               DSPARB: 0x00001d9c
(II) intel(0):               DSPFW1: 0x00000000
(II) intel(0):               DSPFW2: 0x00000000
(II) intel(0):               DSPFW3: 0x00000000
(II) intel(0):                 ADPA: 0x80000010 (enabled, pipe A, -hsync, +vsync)
(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOC: 0x80300000 (enabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):          DVOA_SRCDIM: 0x00000000
(II) intel(0):          DVOB_SRCDIM: 0x00000000
(II) intel(0):          DVOC_SRCDIM: 0x00000000
(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
(II) intel(0):         PP_ON_DELAYS: 0x00000000
(II) intel(0):        PP_OFF_DELAYS: 0x00000000
(II) intel(0):           PP_DIVISOR: 0x00000000
(II) intel(0):         PFIT_CONTROL: 0x00000000
(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
(II) intel(0):             DSPACNTR: 0x14000000 (disabled, pipe A)
(II) intel(0):           DSPASTRIDE: 0x00000500 (1280 bytes)
(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPASIZE: 0x018f02cf (720, 400)
(II) intel(0):             DSPABASE: 0x00000000
(II) intel(0):             DSPASURF: 0x00000000
(II) intel(0):          DSPATILEOFF: 0x00000000
(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_A: 0xd4040033 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10, SDVO mult 4)
(II) intel(0):            DPLL_A_MD: 0x00000000
(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_A: 0x00000000
(II) intel(0):         VSYNCSHIFT_A: 0x00000000
(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
(II) intel(0):             DSPBBASE: 0x00000000
(II) intel(0):             DSPBSURF: 0x00000000
(II) intel(0):          DSPBTILEOFF: 0x00000000
(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
(II) intel(0):            DPLL_B_MD: 0x00000000
(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_B: 0x00000000
(II) intel(0):         VSYNCSHIFT_B: 0x00000000
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
(II) intel(0):        VCLK_POST_DIV: 0x00020002
(II) intel(0):             VGACNTRL: 0x0124008e (enabled)
(II) intel(0):               TV_CTL: 0x00000000
(II) intel(0):               TV_DAC: 0x00000000
(II) intel(0):             TV_CSC_Y: 0x00000000
(II) intel(0):            TV_CSC_Y2: 0x00000000
(II) intel(0):             TV_CSC_U: 0x00000000
(II) intel(0):            TV_CSC_U2: 0x00000000
(II) intel(0):             TV_CSC_V: 0x00000000
(II) intel(0):            TV_CSC_V2: 0x00000000
(II) intel(0):         TV_CLR_KNOBS: 0x00000000
(II) intel(0):         TV_CLR_LEVEL: 0x00000000
(II) intel(0):           TV_H_CTL_1: 0x00000000
(II) intel(0):           TV_H_CTL_2: 0x00000000
(II) intel(0):           TV_H_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_1: 0x00000000
(II) intel(0):           TV_V_CTL_2: 0x00000000
(II) intel(0):           TV_V_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_4: 0x00000000
(II) intel(0):           TV_V_CTL_5: 0x00000000
(II) intel(0):           TV_V_CTL_6: 0x00000000
(II) intel(0):           TV_V_CTL_7: 0x00000000
(II) intel(0):          TV_SC_CTL_1: 0x00000000
(II) intel(0):          TV_SC_CTL_2: 0x00000000
(II) intel(0):          TV_SC_CTL_3: 0x00000000
(II) intel(0):           TV_WIN_POS: 0x00000000
(II) intel(0):          TV_WIN_SIZE: 0x00000000
(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
(II) intel(0):        TV_CC_CONTROL: 0x00000000
(II) intel(0):           TV_CC_DATA: 0x00000000
(II) intel(0):          TV_H_LUMA_0: 0x00000000
(II) intel(0):         TV_H_LUMA_59: 0x00000000
(II) intel(0):        TV_H_CHROMA_0: 0x00000000
(II) intel(0):       TV_H_CHROMA_59: 0x00000000
(II) intel(0):         FBC_CFB_BASE: 0xffffffff
(II) intel(0):          FBC_LL_BASE: 0xffffffff
(II) intel(0):          FBC_CONTROL: 0xffffffff
(II) intel(0):          FBC_COMMAND: 0xffffffff
(II) intel(0):           FBC_STATUS: 0xffffffff
(II) intel(0):         FBC_CONTROL2: 0xffffffff
(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
(II) intel(0):          FBC_MOD_NUM: 0xffffffff
(II) intel(0):              MI_MODE: 0x00000200
(II) intel(0):         MI_ARB_STATE: 0x00000040
(II) intel(0):       MI_RDRET_STATE: 0x00000000
(II) intel(0):              ECOSKPD: 0x00000307
(II) intel(0):                 DP_B: 0x00000000
(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_C: 0x00000000
(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_D: 0x00000000
(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
(II) intel(0):             FENCE  0: 0x00c00231 ( enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb))
(II) intel(0):             FENCE  1: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  2: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  3: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  4: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  5: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  6: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  7: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  8: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  9: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  10: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  11: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  12: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  13: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  14: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  15: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
(II) intel(0): DumpRegsEnd
(II) intel(0): xf86UnbindGARTMemory: unbind key 0
(II) intel(0): xf86UnbindGARTMemory: unbind key 1
(II) intel(0): xf86UnbindGARTMemory: unbind key 2
(WW) intel(0): drmDropMaster failed: Bad file descriptor
(II) Open ACPI successful (/var/run/acpid.socket)
(WW) intel(0): drmSetMaster failed: Bad file descriptor
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x006ff000 (pgoffset 1791)
(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0082a000 (pgoffset 2090)
(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x00c00000 (pgoffset 3072)
(II) intel(0): Fixed memory allocation layout:
(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
(II) intel(0): 0x0002a000-0x00829fff: fake bufmgr (8192 kB)
(II) intel(0): 0x006ff000:            end of stolen memory
(II) intel(0): 0x0082a000-0x0082afff: overlay registers (4 kB)
(II) intel(0): 0x00c00000-0x00ffffff: front buffer (4096 kB) X tiled
(II) intel(0): 0x10000000:            end of aperture
(II) intel(0): BO memory allocation layout:
(WW) intel(0): ESR is 0x00000001, instruction error
(WW) intel(0): Existing errors found in hardware state.
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Mode for pipe A:
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): chosen: dotclock 64800 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 40, p1 4, p2 10))
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Mode for pipe B:
(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
(II) intel(0): Adjusted mode for pipe B:
(II) intel(0): Modeline "1024x768"x60.0  130.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (96.7 kHz)
(II) intel(0): chosen: dotclock 129600 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 20, p1 2, p2 10))
(II) intel(0): SDVOC: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 21 02                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): Hardware state at EnterVT:
(II) intel(0): DumpRegsBegin
(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
(II) intel(0):           PGETBL_CTL: 0x00000001
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II) intel(0):            DPLL_TEST: 0x00010001 ()
(II) intel(0):         CACHE_MODE_0: 0x00006820
(II) intel(0):              D_STATE: 0x00000000
(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
(II) intel(0):       RENCLK_GATE_D1: 0x00000000
(II) intel(0):       RENCLK_GATE_D2: 0x00000000
(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
(II) intel(0):                SDVOC: 0xc0480080 (enabled, pipe B, stall disabled, not detected)
(II) intel(0):              SDVOUDI: 0x00000000
(II) intel(0):               DSPARB: 0x00002f2f
(II) intel(0):               DSPFW1: 0x00000000
(II) intel(0):               DSPFW2: 0x00000000
(II) intel(0):               DSPFW3: 0x00000000
(II) intel(0):                 ADPA: 0x80000000 (enabled, pipe A, -hsync, -vsync)
(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOC: 0xc0480080 (enabled, pipe B, no stall, -hsync, -vsync)
(II) intel(0):          DVOA_SRCDIM: 0x00000000
(II) intel(0):          DVOB_SRCDIM: 0x00000000
(II) intel(0):          DVOC_SRCDIM: 0x00000000
(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
(II) intel(0):         PP_ON_DELAYS: 0x00000000
(II) intel(0):        PP_OFF_DELAYS: 0x00000000
(II) intel(0):           PP_DIVISOR: 0x00000000
(II) intel(0):         PFIT_CONTROL: 0x00000000
(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
(II) intel(0):             DSPACNTR: 0xd8000000 (enabled, pipe A)
(II) intel(0):           DSPASTRIDE: 0x00001000 (4096 bytes)
(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPASIZE: 0x02ff03ff (1024, 768)
(II) intel(0):             DSPABASE: 0x00c00000
(II) intel(0):             DSPASURF: 0x00000000
(II) intel(0):          DSPATILEOFF: 0x00000000
(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEASRC: 0x03ff02ff (1024, 768)
(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
(II) intel(0):                 FPA0: 0x00010c09 (n = 1, m1 = 12, m2 = 9)
(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_A: 0x94080000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 4, p2 = 10, SDVO mult 1)
(II) intel(0):            DPLL_A_MD: 0x00000000
(II) intel(0):             HTOTAL_A: 0x053f03ff (1024 active, 1344 total)
(II) intel(0):             HBLANK_A: 0x053f03ff (1024 start, 1344 end)
(II) intel(0):              HSYNC_A: 0x049f0417 (1048 start, 1184 end)
(II) intel(0):             VTOTAL_A: 0x032502ff (768 active, 806 total)
(II) intel(0):             VBLANK_A: 0x032502ff (768 start, 806 end)
(II) intel(0):              VSYNC_A: 0x03080302 (771 start, 777 end)
(II) intel(0):            BCLRPAT_A: 0x00000000
(II) intel(0):         VSYNCSHIFT_A: 0x00000000
(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
(II) intel(0):           DSPBSTRIDE: 0x00001000 (4096 bytes)
(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPBSIZE: 0x02ff03ff (1024, 768)
(II) intel(0):             DSPBBASE: 0x00c00000
(II) intel(0):             DSPBSURF: 0x00000000
(II) intel(0):          DSPBTILEOFF: 0x00000000
(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
(II) intel(0):                 FPB0: 0x00010c09 (n = 1, m1 = 12, m2 = 9)
(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_B: 0xd4020010 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 2)
(II) intel(0):            DPLL_B_MD: 0x00000000
(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
(II) intel(0):            BCLRPAT_B: 0x00000000
(II) intel(0):         VSYNCSHIFT_B: 0x00000000
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
(II) intel(0):        VCLK_POST_DIV: 0x00020002
(II) intel(0):             VGACNTRL: 0x8124008e (disabled)
(II) intel(0):               TV_CTL: 0x00000000
(II) intel(0):               TV_DAC: 0x00000000
(II) intel(0):             TV_CSC_Y: 0x00000000
(II) intel(0):            TV_CSC_Y2: 0x00000000
(II) intel(0):             TV_CSC_U: 0x00000000
(II) intel(0):            TV_CSC_U2: 0x00000000
(II) intel(0):             TV_CSC_V: 0x00000000
(II) intel(0):            TV_CSC_V2: 0x00000000
(II) intel(0):         TV_CLR_KNOBS: 0x00000000
(II) intel(0):         TV_CLR_LEVEL: 0x00000000
(II) intel(0):           TV_H_CTL_1: 0x00000000
(II) intel(0):           TV_H_CTL_2: 0x00000000
(II) intel(0):           TV_H_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_1: 0x00000000
(II) intel(0):           TV_V_CTL_2: 0x00000000
(II) intel(0):           TV_V_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_4: 0x00000000
(II) intel(0):           TV_V_CTL_5: 0x00000000
(II) intel(0):           TV_V_CTL_6: 0x00000000
(II) intel(0):           TV_V_CTL_7: 0x00000000
(II) intel(0):          TV_SC_CTL_1: 0x00000000
(II) intel(0):          TV_SC_CTL_2: 0x00000000
(II) intel(0):          TV_SC_CTL_3: 0x00000000
(II) intel(0):           TV_WIN_POS: 0x00000000
(II) intel(0):          TV_WIN_SIZE: 0x00000000
(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
(II) intel(0):        TV_CC_CONTROL: 0x00000000
(II) intel(0):           TV_CC_DATA: 0x00000000
(II) intel(0):          TV_H_LUMA_0: 0x00000000
(II) intel(0):         TV_H_LUMA_59: 0x00000000
(II) intel(0):        TV_H_CHROMA_0: 0x00000000
(II) intel(0):       TV_H_CHROMA_59: 0x00000000
(II) intel(0):         FBC_CFB_BASE: 0xffffffff
(II) intel(0):          FBC_LL_BASE: 0xffffffff
(II) intel(0):          FBC_CONTROL: 0xffffffff
(II) intel(0):          FBC_COMMAND: 0xffffffff
(II) intel(0):           FBC_STATUS: 0xffffffff
(II) intel(0):         FBC_CONTROL2: 0xffffffff
(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
(II) intel(0):          FBC_MOD_NUM: 0xffffffff
(II) intel(0):              MI_MODE: 0x00000200
(II) intel(0):         MI_ARB_STATE: 0x00000040
(II) intel(0):       MI_RDRET_STATE: 0x00000000
(II) intel(0):              ECOSKPD: 0x00000307
(II) intel(0):                 DP_B: 0x00000000
(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_C: 0x00000000
(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_D: 0x00000000
(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
(II) intel(0):             FENCE  0: 0x00c00231 ( enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb))
(II) intel(0):             FENCE  1: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  2: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  3: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  4: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  5: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  6: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  7: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  8: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  9: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  10: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  11: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  12: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  13: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  14: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  15: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0): pipe A dot 64800 n 1 m1 12 m2 9 p1 4 p2 10
(II) intel(0): pipe B dot 129600 n 1 m1 12 m2 9 p1 2 p2 10
(II) intel(0): DumpRegsEnd
(II) intel(0): Output configuration:
(II) intel(0):   Pipe A is on
(II) intel(0):   Display plane A is now enabled and connected to pipe A.
(II) intel(0):   Pipe B is on
(II) intel(0):   Display plane B is now enabled and connected to pipe B.
(II) intel(0):   Output VGA is connected to pipe A
(II) intel(0):   Output TMDS-1 is connected to pipe none
(II) intel(0):   Output TMDS-2 is connected to pipe B
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II)   USB Keyboard: Device reopened after 1 attempts.
(II)   USB Keyboard: Device reopened after 1 attempts.
(II) Power Button: Device reopened after 1 attempts.
(II) Power Button: Device reopened after 1 attempts.
(II) Macintosh mouse button emulation: Device reopened after 1 attempts.
(II) HID 04d9:1133: Device reopened after 1 attempts.
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOB: R:                         (Success)
(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 16 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 17 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 14 D6 09 80 A0 20 E0 2D 10 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 15 10 60 A2 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
(II) intel(0): SDVOC: R: 01                      (Success)
(II) intel(0): SDVOC: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
(II) intel(0): SDVOC: R:                         (Success)
(II) intel(0): Comparing regs from server start up to After LeaveVT
(WW) intel(0): Register 0x2000 (FENCE  0) changed from 0x00000000 to 0x00c00231
(WW) intel(0): FENCE  0 before: disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb)
(WW) intel(0): FENCE  0 after:  enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb)
(II) intel(0): DumpRegsBegin
(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
(II) intel(0):           PGETBL_CTL: 0x00000001
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
(II) intel(0):            DPLL_TEST: 0x00010001 ()
(II) intel(0):         CACHE_MODE_0: 0x00006820
(II) intel(0):              D_STATE: 0x00000000
(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
(II) intel(0):       RENCLK_GATE_D1: 0x00000000
(II) intel(0):       RENCLK_GATE_D2: 0x00000000
(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
(II) intel(0):                SDVOC: 0x80300000 (enabled, pipe A, stall disabled, not detected)
(II) intel(0):              SDVOUDI: 0x00000000
(II) intel(0):               DSPARB: 0x00001d9c
(II) intel(0):               DSPFW1: 0x00000000
(II) intel(0):               DSPFW2: 0x00000000
(II) intel(0):               DSPFW3: 0x00000000
(II) intel(0):                 ADPA: 0x80000010 (enabled, pipe A, -hsync, +vsync)
(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):                 DVOC: 0x80300000 (enabled, pipe A, no stall, -hsync, -vsync)
(II) intel(0):          DVOA_SRCDIM: 0x00000000
(II) intel(0):          DVOB_SRCDIM: 0x00000000
(II) intel(0):          DVOC_SRCDIM: 0x00000000
(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
(II) intel(0):         PP_ON_DELAYS: 0x00000000
(II) intel(0):        PP_OFF_DELAYS: 0x00000000
(II) intel(0):           PP_DIVISOR: 0x00000000
(II) intel(0):         PFIT_CONTROL: 0x00000000
(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
(II) intel(0):             DSPACNTR: 0x14000000 (disabled, pipe A)
(II) intel(0):           DSPASTRIDE: 0x00000500 (1280 bytes)
(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPASIZE: 0x018f02cf (720, 400)
(II) intel(0):             DSPABASE: 0x00000000
(II) intel(0):             DSPASURF: 0x00000000
(II) intel(0):          DSPATILEOFF: 0x00000000
(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEASTAT: 0x80000203 (status: FIFO_UNDERRUN VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
(II) intel(0):    PIPEA_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEA_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEA_DP_LINK_N: 0x00000000
(II) intel(0):                 FPA0: 0x00021509 (n = 2, m1 = 21, m2 = 9)
(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_A: 0xd4040033 (enabled, dvo, default clock, DAC/serial mode, p1 = 3, p2 = 10, SDVO mult 4)
(II) intel(0):            DPLL_A_MD: 0x00000000
(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_A: 0x031f027f (640 start, 800 end)
(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_A: 0x020c01df (480 start, 525 end)
(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_A: 0x00000000
(II) intel(0):         VSYNCSHIFT_A: 0x00000000
(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
(II) intel(0):             DSPBBASE: 0x00000000
(II) intel(0):             DSPBSURF: 0x00000000
(II) intel(0):          DSPBTILEOFF: 0x00000000
(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
(II) intel(0):            PIPEBSTAT: 0x00000202 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS)
(II) intel(0):    PIPEB_GMCH_DATA_M: 0x00000000
(II) intel(0):    PIPEB_GMCH_DATA_N: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_M: 0x00000000
(II) intel(0):      PIPEB_DP_LINK_N: 0x00000000
(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
(II) intel(0):            DPLL_B_MD: 0x00000000
(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
(II) intel(0):            BCLRPAT_B: 0x00000000
(II) intel(0):         VSYNCSHIFT_B: 0x00000000
(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
(II) intel(0):        VCLK_POST_DIV: 0x00020002
(II) intel(0):             VGACNTRL: 0x0124008e (enabled)
(II) intel(0):               TV_CTL: 0x00000000
(II) intel(0):               TV_DAC: 0x00000000
(II) intel(0):             TV_CSC_Y: 0x00000000
(II) intel(0):            TV_CSC_Y2: 0x00000000
(II) intel(0):             TV_CSC_U: 0x00000000
(II) intel(0):            TV_CSC_U2: 0x00000000
(II) intel(0):             TV_CSC_V: 0x00000000
(II) intel(0):            TV_CSC_V2: 0x00000000
(II) intel(0):         TV_CLR_KNOBS: 0x00000000
(II) intel(0):         TV_CLR_LEVEL: 0x00000000
(II) intel(0):           TV_H_CTL_1: 0x00000000
(II) intel(0):           TV_H_CTL_2: 0x00000000
(II) intel(0):           TV_H_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_1: 0x00000000
(II) intel(0):           TV_V_CTL_2: 0x00000000
(II) intel(0):           TV_V_CTL_3: 0x00000000
(II) intel(0):           TV_V_CTL_4: 0x00000000
(II) intel(0):           TV_V_CTL_5: 0x00000000
(II) intel(0):           TV_V_CTL_6: 0x00000000
(II) intel(0):           TV_V_CTL_7: 0x00000000
(II) intel(0):          TV_SC_CTL_1: 0x00000000
(II) intel(0):          TV_SC_CTL_2: 0x00000000
(II) intel(0):          TV_SC_CTL_3: 0x00000000
(II) intel(0):           TV_WIN_POS: 0x00000000
(II) intel(0):          TV_WIN_SIZE: 0x00000000
(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
(II) intel(0):        TV_CC_CONTROL: 0x00000000
(II) intel(0):           TV_CC_DATA: 0x00000000
(II) intel(0):          TV_H_LUMA_0: 0x00000000
(II) intel(0):         TV_H_LUMA_59: 0x00000000
(II) intel(0):        TV_H_CHROMA_0: 0x00000000
(II) intel(0):       TV_H_CHROMA_59: 0x00000000
(II) intel(0):         FBC_CFB_BASE: 0xffffffff
(II) intel(0):          FBC_LL_BASE: 0xffffffff
(II) intel(0):          FBC_CONTROL: 0xffffffff
(II) intel(0):          FBC_COMMAND: 0xffffffff
(II) intel(0):           FBC_STATUS: 0xffffffff
(II) intel(0):         FBC_CONTROL2: 0xffffffff
(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
(II) intel(0):          FBC_MOD_NUM: 0xffffffff
(II) intel(0):              MI_MODE: 0x00000200
(II) intel(0):         MI_ARB_STATE: 0x00000040
(II) intel(0):       MI_RDRET_STATE: 0x00000000
(II) intel(0):              ECOSKPD: 0x00000307
(II) intel(0):                 DP_B: 0x00000000
(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_C: 0x00000000
(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
(II) intel(0):                 DP_D: 0x00000000
(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
(II) intel(0):             FENCE  0: 0x00c00231 ( enabled, X tiled,   16 pitch, 0x00c00000 - 0x00e00000 (2048kb))
(II) intel(0):             FENCE  1: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  2: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  3: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  4: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  5: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  6: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  7: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  8: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):             FENCE  9: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  10: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  11: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  12: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  13: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  14: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0):            FENCE  15: 0x00000000 (disabled, X tiled,    0 pitch, 0x00000000 - 0x00000000 (0kb))
(II) intel(0): pipe A dot 100800 n 2 m1 21 m2 9 p1 3 p2 10
(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
(II) intel(0): DumpRegsEnd
(II) intel(0): xf86UnbindGARTMemory: unbind key 0
(II) intel(0): xf86UnbindGARTMemory: unbind key 1
(II) intel(0): xf86UnbindGARTMemory: unbind key 2
(WW) intel(0): drmDropMaster failed: Bad file descriptor
(II) HID 04d9:1133: Close
(II) UnloadModule: "evdev"
(II) Macintosh mouse button emulation: Close
(II) UnloadModule: "evdev"
(II) Power Button: Close
(II) UnloadModule: "evdev"
(II) Power Button: Close
(II) UnloadModule: "evdev"
(II)   USB Keyboard: Close
(II) UnloadModule: "evdev"
(II)   USB Keyboard: Close
(II) UnloadModule: "evdev"
 ddxSigGiveUp: Closing log