Attachment 17981 Details for Bug 16517 – Xorg.log with modedebug on, minimum configuration

Xorg.log with modedebug on, minimum configuration

Xorg.0.log (text/plain), 84.55 KB, created by Michael Fu on 2008-07-29 22:07:18 UTC

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Creator: Michael Fu

Created: 2008-07-29 22:07:18 UTC

Size: 84.55 KB

patch

obsolete

>_XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6
>_XSERVTransOpen: transport open failed for inet6/linux-1z6q:0
>_XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6
>
>X Window System Version 7.2.0
>Release Date: Tue Jun  3 00:09:04 UTC 2008
>X Protocol Version 11, Revision 0, Release 7.2
>Build Operating System: openSUSE SUSE LINUX
>Current Operating System: Linux linux-1z6q 2.6.22.17-0.1-default #1 SMP 2008/02/10 20:01:04 UTC i686
>Build Date: 03 June 2008
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Wed Mar 12 06:57:00 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(WW) No Layout section.  Using the first Screen section.
>(**) |-->Screen "Screen[0]" (0)
>(**) |   |-->Monitor "<default monitor>"
>(**) |   |-->Device "Device[0]"
>(WW) No monitor specified for screen "Screen[0]".
>	Using a default monitor configuration.
>(==) |-->Input Device "<default pointer>"
>(==) |-->Input Device "<default keyboard>"
>(WW) The core pointer device wasn't specified explicitly in the layout.
>	Using the default mouse configuration.
>(WW) The core keyboard device wasn't specified explicitly in the layout.
>	Using the default keyboard configuration.
>(WW) No FontPath specified.  Using compiled-in default.
>(WW) The directory "/usr/share/fonts/TTF/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/OTF" does not exist.
>	Entry deleted from font path.
>(==) FontPath set to:
>	/usr/share/fonts/misc/,
>	/usr/share/fonts/Type1/,
>	/usr/share/fonts/100dpi/,
>	/usr/share/fonts/75dpi/
>(==) RgbPath set to "/usr/share/X11/rgb"
>(==) ModulePath set to "/usr/lib/xorg/modules/updates,/usr/lib/xorg/modules"
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81eb560
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 1.2
>	X.Org XInput driver : 0.7
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /usr/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(--) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,29c0 card 1462,7404 rev 10 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 8086,29c2 card 1462,7404 rev 10 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,29c3 card 1462,7404 rev 10 class 03,80,00 hdr 80
>(II) PCI: 00:1b:0: chip 8086,27d8 card 1462,7404 rev 01 class 04,03,00 hdr 00
>(II) PCI: 00:1c:0: chip 8086,27d0 card 0000,0000 rev 01 class 06,04,00 hdr 81
>(II) PCI: 00:1c:1: chip 8086,27d2 card 0000,0000 rev 01 class 06,04,00 hdr 81
>(II) PCI: 00:1c:2: chip 8086,27d4 card 0000,0000 rev 01 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,27c8 card 1462,7404 rev 01 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,27c9 card 1462,7404 rev 01 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,27ca card 1462,7404 rev 01 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:3: chip 8086,27cb card 1462,7404 rev 01 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,27cc card 1462,7404 rev 01 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev e1 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,27b8 card 1462,7404 rev 01 class 06,01,00 hdr 80
>(II) PCI: 00:1f:1: chip 8086,27df card 1462,7404 rev 01 class 01,01,8a hdr 00
>(II) PCI: 00:1f:2: chip 8086,27c0 card 1462,7404 rev 01 class 01,01,8f hdr 00
>(II) PCI: 00:1f:3: chip 8086,27da card 1462,7404 rev 01 class 0c,05,00 hdr 00
>(II) PCI: 02:00:0: chip 10ec,8168 card 1462,4040 rev 01 class 02,00,00 hdr 00
>(II) PCI: 03:00:0: chip 10ec,8168 card 1462,4040 rev 01 class 02,00,00 hdr 00
>(II) PCI: 04:00:0: chip 1131,7146 card 0000,0000 rev 01 class 04,80,00 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,4), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:28:0), (0,1,1), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:1), (0,2,2), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 2 I/O range:
>	[0] -1	0	0x0000d000 - 0x0000dfff (0x1000) IX[B]
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xfe900000 - 0xfe9fffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:28:2), (0,3,3), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 3 I/O range:
>	[0] -1	0	0x0000e000 - 0x0000efff (0x1000) IX[B]
>(II) Bus 3 non-prefetchable memory range:
>	[0] -1	0	0xfea00000 - 0xfeafffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 4: bridge is at (0:30:0), (0,4,4), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 4 non-prefetchable memory range:
>	[0] -1	0	0xfeb00000 - 0xfebfffff (0x100000) MX[B]
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(0:2:0) Intel Corporation Integrated Graphics Controller rev 16, Mem @ 0xfe880000/19, 0xd0000000/28, 0xfe700000/20, I/O @ 0xcc00/3
>(--) PCI: (0:2:1) Intel Corporation Integrated Graphics Controller rev 16, Mem @ 0xfe680000/19
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xfebffc00 - 0xfebffdff (0x200) MX[B]
>	[1] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[2] -1	0	0xfe9ff000 - 0xfe9fffff (0x1000) MX[B]
>	[3] -1	0	0xfe877c00 - 0xfe877fff (0x400) MX[B]
>	[4] -1	0	0xfe878000 - 0xfe87bfff (0x4000) MX[B]
>	[5] -1	0	0xfe680000 - 0xfe6fffff (0x80000) MX[B](B)
>	[6] -1	0	0xfe700000 - 0xfe7fffff (0x100000) MX[B](B)
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xfe880000 - 0xfe8fffff (0x80000) MX[B](B)
>	[9] -1	0	0x0000e800 - 0x0000e8ff (0x100) IX[B]
>	[10] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[11] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[12] -1	0	0x0000b800 - 0x0000b80f (0x10) IX[B]
>	[13] -1	0	0x0000b880 - 0x0000b883 (0x4) IX[B]
>	[14] -1	0	0x0000bc00 - 0x0000bc07 (0x8) IX[B]
>	[15] -1	0	0x0000c000 - 0x0000c003 (0x4) IX[B]
>	[16] -1	0	0x0000c080 - 0x0000c087 (0x8) IX[B]
>	[17] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[18] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[19] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[20] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[21] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[22] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[23] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[24] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[25] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[26] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xfebffc00 - 0xfebffdff (0x200) MX[B]
>	[1] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[2] -1	0	0xfe9ff000 - 0xfe9fffff (0x1000) MX[B]
>	[3] -1	0	0xfe877c00 - 0xfe877fff (0x400) MX[B]
>	[4] -1	0	0xfe878000 - 0xfe87bfff (0x4000) MX[B]
>	[5] -1	0	0xfe680000 - 0xfe6fffff (0x80000) MX[B](B)
>	[6] -1	0	0xfe700000 - 0xfe7fffff (0x100000) MX[B](B)
>	[7] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[8] -1	0	0xfe880000 - 0xfe8fffff (0x80000) MX[B](B)
>	[9] -1	0	0x0000e800 - 0x0000e8ff (0x100) IX[B]
>	[10] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[11] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[12] -1	0	0x0000b800 - 0x0000b80f (0x10) IX[B]
>	[13] -1	0	0x0000b880 - 0x0000b883 (0x4) IX[B]
>	[14] -1	0	0x0000bc00 - 0x0000bc07 (0x8) IX[B]
>	[15] -1	0	0x0000c000 - 0x0000c003 (0x4) IX[B]
>	[16] -1	0	0x0000c080 - 0x0000c087 (0x8) IX[B]
>	[17] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[18] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[19] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[20] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[21] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[22] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[23] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[24] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[25] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[26] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebffc00 - 0xfebffdff (0x200) MX[B]
>	[5] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[6] -1	0	0xfe9ff000 - 0xfe9fffff (0x1000) MX[B]
>	[7] -1	0	0xfe877c00 - 0xfe877fff (0x400) MX[B]
>	[8] -1	0	0xfe878000 - 0xfe87bfff (0x4000) MX[B]
>	[9] -1	0	0xfe680000 - 0xfe6fffff (0x80000) MX[B](B)
>	[10] -1	0	0xfe700000 - 0xfe7fffff (0x100000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xfe880000 - 0xfe8fffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x0000e800 - 0x0000e8ff (0x100) IX[B]
>	[16] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[17] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[18] -1	0	0x0000b800 - 0x0000b80f (0x10) IX[B]
>	[19] -1	0	0x0000b880 - 0x0000b883 (0x4) IX[B]
>	[20] -1	0	0x0000bc00 - 0x0000bc07 (0x8) IX[B]
>	[21] -1	0	0x0000c000 - 0x0000c003 (0x4) IX[B]
>	[22] -1	0	0x0000c080 - 0x0000c087 (0x8) IX[B]
>	[23] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[24] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[25] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[27] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[28] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[29] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[30] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[31] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[32] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) LoadModule: "extmod"
>(II) Loading /usr/lib/xorg/modules//extensions/libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "dbe"
>(II) Loading /usr/lib/xorg/modules//extensions/libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "glx"
>(II) Loading /usr/lib/xorg/modules//extensions/libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX disabled
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>(II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 7.2.0, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "type1"
>(II) Loading /usr/lib/xorg/modules//fonts/libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "record"
>(II) Loading /usr/lib/xorg/modules//extensions/librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "dri"
>(II) Loading /usr/lib/xorg/modules//extensions/libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "intel"
>(II) Loading /usr/lib/xorg/modules//drivers/intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 2.2.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 1.2
>(II) LoadModule: "mouse"
>(II) Loading /usr/lib/xorg/modules//input/mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) LoadModule: "kbd"
>(II) Loading /usr/lib/xorg/modules//input/kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.2.2
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 0.7
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33, Intel Integrated Graphics Device,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43
>(II) Primary Device is: PCI 00:02:0
>(--) Assigning device section with no busID to primary device
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset G33 found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebffc00 - 0xfebffdff (0x200) MX[B]
>	[5] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[6] -1	0	0xfe9ff000 - 0xfe9fffff (0x1000) MX[B]
>	[7] -1	0	0xfe877c00 - 0xfe877fff (0x400) MX[B]
>	[8] -1	0	0xfe878000 - 0xfe87bfff (0x4000) MX[B]
>	[9] -1	0	0xfe680000 - 0xfe6fffff (0x80000) MX[B](B)
>	[10] -1	0	0xfe700000 - 0xfe7fffff (0x100000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xfe880000 - 0xfe8fffff (0x80000) MX[B](B)
>	[13] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[14] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[15] -1	0	0x0000e800 - 0x0000e8ff (0x100) IX[B]
>	[16] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[17] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[18] -1	0	0x0000b800 - 0x0000b80f (0x10) IX[B]
>	[19] -1	0	0x0000b880 - 0x0000b883 (0x4) IX[B]
>	[20] -1	0	0x0000bc00 - 0x0000bc07 (0x8) IX[B]
>	[21] -1	0	0x0000c000 - 0x0000c003 (0x4) IX[B]
>	[22] -1	0	0x0000c080 - 0x0000c087 (0x8) IX[B]
>	[23] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[24] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[25] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[26] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[27] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[28] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[29] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[30] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[31] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[32] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xfebffc00 - 0xfebffdff (0x200) MX[B]
>	[5] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[6] -1	0	0xfe9ff000 - 0xfe9fffff (0x1000) MX[B]
>	[7] -1	0	0xfe877c00 - 0xfe877fff (0x400) MX[B]
>	[8] -1	0	0xfe878000 - 0xfe87bfff (0x4000) MX[B]
>	[9] -1	0	0xfe680000 - 0xfe6fffff (0x80000) MX[B](B)
>	[10] -1	0	0xfe700000 - 0xfe7fffff (0x100000) MX[B](B)
>	[11] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[12] -1	0	0xfe880000 - 0xfe8fffff (0x80000) MX[B](B)
>	[13] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[14] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[15] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[16] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[17] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[18] -1	0	0x0000e800 - 0x0000e8ff (0x100) IX[B]
>	[19] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[20] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[21] -1	0	0x0000b800 - 0x0000b80f (0x10) IX[B]
>	[22] -1	0	0x0000b880 - 0x0000b883 (0x4) IX[B]
>	[23] -1	0	0x0000bc00 - 0x0000bc07 (0x8) IX[B]
>	[24] -1	0	0x0000c000 - 0x0000c003 (0x4) IX[B]
>	[25] -1	0	0x0000c080 - 0x0000c087 (0x8) IX[B]
>	[26] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[27] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[28] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[29] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[30] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[31] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[32] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[33] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[34] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[35] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>	[36] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[37] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /usr/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /usr/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) intel(0): Creating default Display subsection in Screen section
>	"Screen[0]" for depth/fbbpp 24/32
>(==) intel(0): Depth 24, (==) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "YES"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) G33
>(--) intel(0): Chipset: "G33"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xFE880000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x80300080 (enabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x80300080 (enabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x94000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000640 (1600 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x0257031f (800, 600)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x031f0257 (800, 600)
>(II) intel(0):            PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4020033 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x041f031f (800 active, 1056 total)
>(II) intel(0):             HBLANK_A: 0x041f031f (800 start, 1056 end)
>(II) intel(0):              HSYNC_A: 0x03c70347 (840 start, 968 end)
>(II) intel(0):             VTOTAL_A: 0x02730257 (600 active, 628 total)
>(II) intel(0):             VBLANK_A: 0x02730257 (600 start, 628 end)
>(II) intel(0):              VSYNC_A: 0x025c0258 (601 start, 605 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8124008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x01
>(II) intel(0):                 SR02: 0x0f
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x0e
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x06
>(II) intel(0):                 CR0f: 0x66
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 160000 n 1 m1 16 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(==) intel(0): Using EXA for acceleration
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module already built-in
>(II) intel(0): Output VGA has no monitor section
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVOB: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVOB: R: 02 3C 06 01 01 01 01 00 (Success)
>(II) intel(0): Output TMDS-1 has no monitor section
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVOB: R: C4 09 20 4E             (Success)
>(II) intel(0): SDVOB: device VID/DID: 02:3C.06, clock range 25.0MHz - 200.0MHz
>(II) intel(0): SDVOB: 1 input channel
>(II) intel(0): SDVOB: TMDS0 output reported
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): I2C bus "SDVOC DDC Bus" initialized.
>(II) intel(0): SDVOC: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVOC: R: 02 47 02 01 01 01 01 00 (Success)
>(II) intel(0): Output TMDS-2 has no monitor section
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVOC: R: C4 09 74 40             (Success)
>(II) intel(0): SDVOC: device VID/DID: 02:47.02, clock range 25.0MHz - 165.0MHz
>(II) intel(0): SDVOC: 1 input channel
>(II) intel(0): SDVOC: TMDS0 output reported
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R: 01 00                   (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVOC: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R: 00 00                   (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): Output VGA disconnected
>(II) intel(0): EDID for output VGA
>(II) intel(0): SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVOB: R: 01 00                   (Success)
>(II) intel(0): Output TMDS-1 connected
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0.
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" removed.
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Manufacturer: MSI  Model: 6462  Serial#: 64627404
>(II) intel(0): Year: 2007  Week: 35
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): DFP 1.x compatible TMDS
>(II) intel(0): Max H-Image Size [cm]: horiz.: 37  vert.: 30
>(II) intel(0): Gamma: 2.64
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): First detailed timing not preferred mode in violation of standard!(II) intel(0): redX: 0.632 redY: 0.335   greenX: 0.295 greenY: 0.593
>(II) intel(0): blueX: 0.143 blueY: 0.065   whiteX: 0.282 whiteY: 0.297
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 720x400@70Hz
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 640x480@72Hz
>(II) intel(0): 640x480@75Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 800x600@75Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): 1024x768@70Hz
>(II) intel(0): 1024x768@75Hz
>(II) intel(0): 1280x1024@75Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported Future Video Modes:
>(II) intel(0): #0: hsize: 1280  vsize 960  refresh: 75  vid: 20353
>(II) intel(0): #1: hsize: 1024  vsize 768  refresh: 75  vid: 20321
>(II) intel(0): #2: hsize: 800  vsize 600  refresh: 75  vid: 20293
>(II) intel(0): #3: hsize: 640  vsize 480  refresh: 75  vid: 20273
>(II) intel(0): #4: hsize: 1280  vsize 1024  refresh: 75  vid: 36737
>(II) intel(0): #5: hsize: 1024  vsize 819  refresh: 75  vid: 36705
>(II) intel(0): #6: hsize: 800  vsize 640  refresh: 75  vid: 36677
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 78.8 MHz   Image Size:  376 x 301 mm
>(II) intel(0): h_active: 1024  h_sync: 1040  h_sync_end 1136 h_blank_end 1312 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 769  v_sync_end 772 v_blanking: 800 v_border: 0
>(II) intel(0): Ranges: V min: 50  V max: 85 Hz, H min: 30  H max: 82 kHz, PixClock max 110 MHz
>(II) intel(0): Monitor name: Crystal
>(II) intel(0): Serial No: 000001
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0036696264cc22da03
>(II) intel(0): 	2311010381251ea4e8fbb4a1554b9724
>(II) intel(0): 	10484cad4f00814f614f454f314f818f
>(II) intel(0): 	618f458f0101c31e0020410020301060
>(II) intel(0): 	1300782d1100001e000000fd0032551e
>(II) intel(0): 	520b000a202020202020000000fc0043
>(II) intel(0): 	72797374616c0a0a0a0a0a0a000000ff
>(II) intel(0): 	003030303030310a20202020202000e3
>(II) intel(0): EDID vendor "MSI", prod id 25698
>(II) intel(0): Not using default mode "640x350" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "720x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x864" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "832x624" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (bad mode clock/interlace/doublescan)
>(II) intel(0): Printing probed modes for output TMDS-1
>(II) intel(0): Modeline "1280x1024"x74.9  138.75  1280 1368 1504 1728  1024 1027 1034 1072 -hsync +vsync (80.3 kHz)
>(II) intel(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1280x960"x74.9  130.00  1280 1368 1504 1728  960 963 967 1005 -hsync +vsync (75.2 kHz)
>(II) intel(0): Modeline "1024x819"x74.8   87.25  1024 1088 1192 1360  819 822 832 858 -hsync +vsync (64.2 kHz)
>(II) intel(0): Modeline "1024x768"x74.9   82.00  1024 1088 1192 1360  768 771 775 805 -hsync +vsync (60.3 kHz)
>(II) intel(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x640"x74.9   52.25  800 840 920 1040  640 643 650 671 -hsync +vsync (50.2 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x74.9   49.00  800 840 920 1040  600 603 607 629 -hsync +vsync (47.1 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x74.8   30.75  640 664 728 816  480 483 487 504 -hsync +vsync (37.7 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): SDVOC: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVOC: R: 00 00                   (Success)
>(II) intel(0): Output TMDS-2 disconnected
>(II) intel(0): EDID for output TMDS-2
>(II) intel(0): Output VGA disconnected
>(II) intel(0): Output TMDS-1 connected
>(II) intel(0): Output TMDS-2 disconnected
>(II) intel(0): Output TMDS-1 using initial mode 1280x1024
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 17 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 15 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOC: R: 01                      (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): detected 1024 kB GTT.
>(II) intel(0): detected 7164 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Intel XvMC decoder disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (75, 75)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 2.1.0
>	ABI class: X.Org Video Driver, version 1.2
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xfe700000 - 0xfe7fffff (0x100000) MS[B]
>	[1] 0	0	0xd0000000 - 0xdfffffff (0x10000000) MS[B]
>	[2] 0	0	0xfe880000 - 0xfe8fffff (0x80000) MS[B]
>	[3] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[4] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[5] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[6] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[7] -1	0	0xfebffc00 - 0xfebffdff (0x200) MX[B]
>	[8] -1	0	0xfeaff000 - 0xfeafffff (0x1000) MX[B]
>	[9] -1	0	0xfe9ff000 - 0xfe9fffff (0x1000) MX[B]
>	[10] -1	0	0xfe877c00 - 0xfe877fff (0x400) MX[B]
>	[11] -1	0	0xfe878000 - 0xfe87bfff (0x4000) MX[B]
>	[12] -1	0	0xfe680000 - 0xfe6fffff (0x80000) MX[B](B)
>	[13] -1	0	0xfe700000 - 0xfe7fffff (0x100000) MX[B](B)
>	[14] -1	0	0xd0000000 - 0xdfffffff (0x10000000) MX[B](B)
>	[15] -1	0	0xfe880000 - 0xfe8fffff (0x80000) MX[B](B)
>	[16] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[17] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[18] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[19] 0	0	0x0000cc00 - 0x0000cc07 (0x8) IS[B]
>	[20] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[21] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[22] -1	0	0x0000e800 - 0x0000e8ff (0x100) IX[B]
>	[23] -1	0	0x0000d800 - 0x0000d8ff (0x100) IX[B]
>	[24] -1	0	0x00000400 - 0x0000041f (0x20) IX[B]
>	[25] -1	0	0x0000b800 - 0x0000b80f (0x10) IX[B]
>	[26] -1	0	0x0000b880 - 0x0000b883 (0x4) IX[B]
>	[27] -1	0	0x0000bc00 - 0x0000bc07 (0x8) IX[B]
>	[28] -1	0	0x0000c000 - 0x0000c003 (0x4) IX[B]
>	[29] -1	0	0x0000c080 - 0x0000c087 (0x8) IX[B]
>	[30] -1	0	0x0000ffa0 - 0x0000ffaf (0x10) IX[B]
>	[31] -1	0	0x00000374 - 0x00000374 (0x1) IX[B]
>	[32] -1	0	0x00000170 - 0x00000177 (0x8) IX[B]
>	[33] -1	0	0x000001f0 - 0x000001f0 (0x1) IX[B]
>	[34] -1	0	0x000001f0 - 0x000001f7 (0x8) IX[B]
>	[35] -1	0	0x0000c400 - 0x0000c41f (0x20) IX[B]
>	[36] -1	0	0x0000c480 - 0x0000c49f (0x20) IX[B]
>	[37] -1	0	0x0000c800 - 0x0000c81f (0x20) IX[B]
>	[38] -1	0	0x0000c880 - 0x0000c89f (0x20) IX[B]
>	[39] -1	0	0x0000cc00 - 0x0000cc07 (0x8) IX[B](B)
>	[40] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[41] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 110080 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 440316 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 9, (OK)
>drmOpenByBusid: drmOpenMinor returns 9
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) intel(0): [drm] DRM interface version 1.3
>(II) intel(0): [drm] created "i915" driver at busid "pci:0000:00:02.0"
>(II) intel(0): [drm] added 8192 byte SAREA at 0xe042b000
>(II) intel(0): [drm] mapped SAREA 0xe042b000 to 0xb7ba3000
>(II) intel(0): [drm] framebuffer handle = 0xd0000000
>(II) intel(0): [drm] added 1 reserved context for kernel
>(WW) intel(0): Removed DRI frontbuffer mapping in compatibility mode.
>(WW) intel(0): DRIGetDeviceInfo will report incorrect frontbuffer handle.
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xfe880000
>(II) intel(0): [drm] ring buffer = 0x2a000000
>(II) intel(0): [drm] mapped front buffer at 0xd1000000, handle = 0xd1000000
>(II) intel(0): [drm] mapped back buffer at 0xd4000000, handle = 0xd4000000
>(II) intel(0): [drm] mapped depth buffer at 0xd5000000, handle = 0xd5000000
>(II) intel(0): [drm] mapped classic textures at 0xd6000000, handle = 0xd6000000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(==) intel(0): Write-combining range (0xd0000000,0x10000000)
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(WW) intel(0): EXA compatibility mode.  Output rotation rendering performance may suffer
>(II) EXA(0): Offscreen pixmap area of 31457280 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(II) intel(0): [DRI] installation complete
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R: 01 00                   (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVOC: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R: 00 00                   (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01000000 (pgoffset 4096)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x02000000 (pgoffset 8192)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04000000 (pgoffset 16384)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x05000000 (pgoffset 20480)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x06000000 (pgoffset 24576)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00032fff: overlay registers (4 kB)
>(II) intel(0): 0x00033000-0x00033fff: HW status (4 kB)
>(II) intel(0): 0x006ff000:            end of stolen memory
>(II) intel(0): 0x01000000-0x01ffffff: front buffer (10240 kB) X tiled
>(II) intel(0): 0x02000000-0x03dfffff: exa offscreen (30720 kB)
>(II) intel(0): 0x04000000-0x04ffffff: back buffer (10240 kB) X tiled
>(II) intel(0): 0x05000000-0x05ffffff: depth buffer (10240 kB) X tiled
>(II) intel(0): 0x06000000-0x07ffffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "1280x1024"x74.9  138.75  1280 1368 1504 1728  1024 1027 1034 1072 -hsync +vsync (80.3 kHz)
>(II) intel(0): chosen: dotclock 139200 vco 2784000 ((m 87, m1 14, m2 5), n 1, (p 20, p1 2, p2 10))
>(II) intel(0): SDVOB: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 33 36 00 C0 51 00 30 40 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 17 58 88 37 00 1C 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 33 36 00 C0 51 00 30 40 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 15 58 88 37 00 1C 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOB: R: 00                      (Success)
>(EE) intel(0): First SDVOB output reported failure to sync
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x80480084 (enabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00300080 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00002fb0
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x80480084 (enabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00300080 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0xd8000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x03ff04ff (1280, 1024)
>(II) intel(0):             DSPABASE: 0x01000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x04ff03ff (1280, 1024)
>(II) intel(0):            PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00010e05 (n = 1, m1 = 14, m2 = 5)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4020000 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x06bf04ff (1280 active, 1728 total)
>(II) intel(0):             HBLANK_A: 0x06bf04ff (1280 start, 1728 end)
>(II) intel(0):              HSYNC_A: 0x05df0557 (1368 start, 1504 end)
>(II) intel(0):             VTOTAL_A: 0x042f03ff (1024 active, 1072 total)
>(II) intel(0):             VBLANK_A: 0x042f03ff (1024 start, 1072 end)
>(II) intel(0):              VSYNC_A: 0x04090402 (1027 start, 1034 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x01
>(II) intel(0):                 SR02: 0x0f
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x0e
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x06
>(II) intel(0):                 CR0f: 0x66
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 139200 n 1 m1 14 m2 5 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is off
>(II) intel(0):   Display plane B is now disabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe none
>(II) intel(0):   Output TMDS-1 is connected to pipe A
>(II) intel(0):   Output TMDS-2 is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: Enabled
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>(II) Loading local sub module "GLcore"
>(II) LoadModule: "GLcore"
>(II) Loading /usr/lib/xorg/modules//extensions/libGLcore.so
>(II) Module GLcore: vendor="X.Org Foundation"
>	compiled for 7.2.0, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) GLX: Initialized MESA-PROXY GL provider for screen 0
>(II) intel(0): Setting screen physical size to 376 x 301
>(WW) <default pointer>: No Device specified, looking for one...
>(II) <default pointer>: Setting Device option to "/dev/input/mice"
>(--) <default pointer>: Device: "/dev/input/mice"
>(==) <default pointer>: Protocol: "Auto"
>(**) Option "CorePointer"
>(**) <default pointer>: Core Pointer
>(==) <default pointer>: Emulate3Buttons, Emulate3Timeout: 50
>(**) <default pointer>: ZAxisMapping: buttons 4 and 5
>(**) <default pointer>: Buttons: 9
>(**) <default pointer>: Sensitivity: 1
>(**) Option "CoreKeyboard"
>(**) <default keyboard>: Core Keyboard
>(**) Option "Protocol" "standard"
>(**) <default keyboard>: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) <default keyboard>: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) <default keyboard>: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) <default keyboard>: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) <default keyboard>: CustomKeycodes disabled
>(II) XINPUT: Adding extended input device "<default keyboard>" (type: KEYBOARD)
>(II) XINPUT: Adding extended input device "<default pointer>" (type: MOUSE)
>(--) <default pointer>: PnP-detected protocol: "ExplorerPS/2"
>(II) <default pointer>: ps2EnableDataReporting: succeeded
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOB: R: 00                      (Success)
>(EE) intel(0): First SDVOB output reported failure to sync
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOB: R: 00                      (Success)
>(EE) intel(0): First SDVOB output reported failure to sync
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 17 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 15 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOC: R: 01                      (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x80300080 (enabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x00008c18 (disabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x80300080 (enabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x94000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000640 (1600 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x0257031f (800, 600)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x031f0257 (800, 600)
>(II) intel(0):            PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4020033 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x041f031f (800 active, 1056 total)
>(II) intel(0):             HBLANK_A: 0x041f031f (800 start, 1056 end)
>(II) intel(0):              HSYNC_A: 0x03c70347 (840 start, 968 end)
>(II) intel(0):             VTOTAL_A: 0x02730257 (600 active, 628 total)
>(II) intel(0):             VBLANK_A: 0x02730257 (600 start, 628 end)
>(II) intel(0):              VSYNC_A: 0x025c0258 (601 start, 605 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000000 (status:)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8124008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x01
>(II) intel(0):                 SR02: 0x0f
>(II) intel(0):                 SR03: 0x00
>(II) intel(0):                 SR04: 0x0e
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x14
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x38
>(II) intel(0):                 AR09: 0x39
>(II) intel(0):                 AR0a: 0x3a
>(II) intel(0):                 AR0b: 0x3b
>(II) intel(0):                 AR0c: 0x3c
>(II) intel(0):                 AR0d: 0x3d
>(II) intel(0):                 AR0e: 0x3e
>(II) intel(0):                 AR0f: 0x3f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x0f
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x06
>(II) intel(0):                 CR0f: 0x66
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 160000 n 1 m1 16 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): [drm] removed 1 reserved context for kernel
>(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xe042b000 at 0xb7ba3000
>FreeFontPath: FPE "/usr/share/fonts/misc/" refcount is 2, should be 1; fixing.

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Attachments on bug 16517: 17374 | 17471 | 17480 | 17631 | 17979 | 17980 | 17981 | 17982 | 17984 | 18783 | 18784

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