The display bandwidth calculation code has a small bug when looking at
the memory controller setup on r300 chips. Hui from ATI confirmed that
this was the right fix.

Index: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
===================================================================
--- xc.orig/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c     2004-12-05 19:41:48.182971616 +1100
+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c  2004-12-05 19:41:53.022235936 +1100
@@ -6220,7 +6220,7 @@
       */
       temp = INREG(RADEON_MEM_CNTL);
       data = (R300_MEM_NUM_CHANNELS_MASK & temp);
-       if (data == 2) {
+       if (data == 1) {
           if (R300_MEM_USE_CD_CH_ONLY & temp) {
               temp  = INREG(R300_MC_IND_INDEX);
               temp &= ~R300_MC_IND_ADDR_MASK;