From a567178b87452ee1bc20ca3cf7d5d6e659e94a65 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Tapani=20P=C3=A4lli?= Date: Thu, 8 Feb 2018 11:43:38 +0200 Subject: [PATCH] i965: workaround for freedesktop bug #103746 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When you blorp, don't forget to flush! Signed-off-by: Tapani Pälli --- src/mesa/drivers/dri/i965/brw_draw.c | 2 +- src/mesa/drivers/dri/i965/genX_blorp_exec.c | 2 +- src/mesa/drivers/dri/i965/intel_fbo.c | 6 +++--- src/mesa/drivers/dri/i965/intel_fbo.h | 2 +- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c index 50cf8b12c7..9bca627929 100644 --- a/src/mesa/drivers/dri/i965/brw_draw.c +++ b/src/mesa/drivers/dri/i965/brw_draw.c @@ -561,7 +561,7 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw, aux_usage); brw_cache_flush_for_render(brw, irb->mt->bo, - isl_format, aux_usage); + isl_format, aux_usage, false); } } diff --git a/src/mesa/drivers/dri/i965/genX_blorp_exec.c b/src/mesa/drivers/dri/i965/genX_blorp_exec.c index 062171af60..0974be3ee0 100644 --- a/src/mesa/drivers/dri/i965/genX_blorp_exec.c +++ b/src/mesa/drivers/dri/i965/genX_blorp_exec.c @@ -242,7 +242,7 @@ genX(blorp_exec)(struct blorp_batch *batch, if (params->dst.enabled) { brw_cache_flush_for_render(brw, params->dst.addr.buffer, params->dst.view.format, - params->dst.aux_usage); + params->dst.aux_usage, true); } if (params->depth.enabled) brw_cache_flush_for_depth(brw, params->depth.addr.buffer); diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c index ca4008f8a0..692247ec21 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.c +++ b/src/mesa/drivers/dri/i965/intel_fbo.c @@ -1032,10 +1032,10 @@ format_aux_tuple(enum isl_format format, enum isl_aux_usage aux_usage) void brw_cache_flush_for_render(struct brw_context *brw, struct brw_bo *bo, enum isl_format format, - enum isl_aux_usage aux_usage) + enum isl_aux_usage aux_usage, bool force) { - if (_mesa_set_search(brw->depth_cache, bo)) - flush_depth_and_render_caches(brw, bo); + if (_mesa_set_search(brw->depth_cache, bo) || force) + flush_depth_and_render_caches(brw, bo); /* Check to see if this bo has been used by a previous rendering operation * but with a different format or aux usage. If it has, flush the render diff --git a/src/mesa/drivers/dri/i965/intel_fbo.h b/src/mesa/drivers/dri/i965/intel_fbo.h index 88a5b6732b..01f0546887 100644 --- a/src/mesa/drivers/dri/i965/intel_fbo.h +++ b/src/mesa/drivers/dri/i965/intel_fbo.h @@ -238,7 +238,7 @@ void brw_cache_sets_clear(struct brw_context *brw); void brw_cache_flush_for_read(struct brw_context *brw, struct brw_bo *bo); void brw_cache_flush_for_render(struct brw_context *brw, struct brw_bo *bo, enum isl_format format, - enum isl_aux_usage aux_usage); + enum isl_aux_usage aux_usage, bool force); void brw_cache_flush_for_depth(struct brw_context *brw, struct brw_bo *bo); void brw_render_cache_add_bo(struct brw_context *brw, struct brw_bo *bo, enum isl_format format, -- 2.14.3