[   52.393266] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:68:DP-2] keeps [ENCODER:67:DDI B], now on [CRTC:39:pipe A]
[   52.393271] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:73:HDMI-A-1]
[   52.393275] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] keeps [ENCODER:72:DDI C], now on [CRTC:52:pipe B]
[   52.393309] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:27:plane 1A] with fb 108
[   52.393329] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
[   52.393385] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:40:plane 1B] with fb 108
[   52.393405] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
[   52.393441] [drm:drm_atomic_commit [drm]] committing ffff88046c755400
[   52.408081] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046c755400
[   52.408101] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046c755400
[   52.435147] [drm:drm_mode_addfb2 [drm]] [FB:75]
[   52.435878] [drm:intel_framebuffer_init [i915]] No Y tiling for legacy addfb
[   52.435889] [drm:drm_internal_framebuffer_create [drm]] could not create framebuffer
[   52.435914] [drm:drm_mode_addfb2 [drm]] [FB:75]
[   52.435932] [drm:drm_mode_addfb2 [drm]] [FB:75]
[   52.436124] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046c755400
[   52.436135] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:cursor A] ffff88046bceb400 state to ffff88046c755400
[   52.436144] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046bceb400 to [NOCRTC]
[   52.436154] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88046bceb400
[   52.436162] [drm:drm_atomic_check_only [drm]] checking ffff88046c755400
[   52.436175] [drm:drm_atomic_commit [drm]] committing ffff88046c755400
[   52.436191] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046c755400
[   52.436200] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046c755400
[   52.436238] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046c755400
[   52.436248] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:cursor B] ffff88046bceb200 state to ffff88046c755400
[   52.436256] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046bceb200 to [NOCRTC]
[   52.436265] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88046bceb200
[   52.436274] [drm:drm_atomic_check_only [drm]] checking ffff88046c755400
[   52.436283] [drm:drm_atomic_commit [drm]] committing ffff88046c755400
[   52.436294] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046c755400
[   52.436303] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046c755400
[   52.436336] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046c755400
[   52.436346] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:59:cursor C] ffff88046b6e9300 state to ffff88046c755400
[   52.436355] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046b6e9300 to [NOCRTC]
[   52.436363] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88046b6e9300
[   52.436372] [drm:drm_atomic_check_only [drm]] checking ffff88046c755400
[   52.436381] [drm:drm_atomic_commit [drm]] committing ffff88046c755400
[   52.436392] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046c755400
[   52.436401] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046c755400
[   52.472103] [drm:drm_mode_addfb2 [drm]] [FB:75]
[   52.473252] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880469cf7000
[   52.473268] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:39:pipe A] ffff88046e46b000 state to ffff880469cf7000
[   52.473277] [drm:drm_atomic_check_only [drm]] checking ffff880469cf7000
[   52.473298] [drm:drm_atomic_commit [drm]] committing ffff880469cf7000
[   52.474272] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880469cf7000
[   52.474283] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880469cf7000
[   52.474335] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff880469cf7000
[   52.474349] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:52:pipe B] ffff88046c911800 state to ffff880469cf7000
[   52.474358] [drm:drm_atomic_check_only [drm]] checking ffff880469cf7000
[   52.474373] [drm:drm_atomic_commit [drm]] committing ffff880469cf7000
[   52.474724] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff880469cf7000
[   52.474735] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff880469cf7000
[   52.580155] [drm:drm_mode_setcrtc [drm]] [CRTC:39:pipe A]
[   52.580176] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:68:DP-2]
[   52.580187] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046d90b800
[   52.580201] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:39:pipe A] ffff88046e73c800 state to ffff88046d90b800
[   52.580218] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:27:plane 1A] ffff88046bb50c00 state to ffff88046d90b800
[   52.580229] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff88046e73c800
[   52.580253] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046bb50c00 to [CRTC:39:pipe A]
[   52.580262] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:75] for plane state ffff88046bb50c00
[   52.580271] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:39:pipe A] to ffff88046d90b800
[   52.580282] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:68:DP-2] ffff88046c735080 state to ffff88046d90b800
[   52.580291] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88046c735080 to [NOCRTC]
[   52.580300] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88046c735080 to [CRTC:39:pipe A]
[   52.580311] [drm:drm_atomic_check_only [drm]] checking ffff88046d90b800
[   52.580320] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:68:DP-2]
[   52.580325] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:68:DP-2] keeps [ENCODER:67:DDI B], now on [CRTC:39:pipe A]
[   52.580359] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:27:plane 1A] with fb 75
[   52.580379] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:27:plane 1A] visible 1 -> 1, off 0, on 0, ms 0
[   52.580396] [drm:drm_atomic_commit [drm]] committing ffff88046d90b800
[   52.590957] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046d90b800
[   52.590969] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046d90b800
[   52.591005] [drm:drm_mode_setcrtc [drm]] [CRTC:52:pipe B]
[   52.591017] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:73:HDMI-A-1]
[   52.591026] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046d90b800
[   52.591037] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:52:pipe B] ffff88046e46b000 state to ffff88046d90b800
[   52.591046] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:40:plane 1B] ffff88046c851e00 state to ffff88046d90b800
[   52.591056] [drm:drm_atomic_set_mode_for_crtc [drm]] Set [MODE:1920x1080] for CRTC state ffff88046e46b000
[   52.591064] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046c851e00 to [CRTC:52:pipe B]
[   52.591073] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:75] for plane state ffff88046c851e00
[   52.591082] [drm:drm_atomic_add_affected_connectors [drm]] Adding all current connectors for [CRTC:52:pipe B] to ffff88046d90b800
[   52.591092] [drm:drm_atomic_get_connector_state [drm]] Added [CONNECTOR:73:HDMI-A-1] ffff88046e701300 state to ffff88046d90b800
[   52.591100] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88046e701300 to [NOCRTC]
[   52.591109] [drm:drm_atomic_set_crtc_for_connector [drm]] Link connector state ffff88046e701300 to [CRTC:52:pipe B]
[   52.591119] [drm:drm_atomic_check_only [drm]] checking ffff88046d90b800
[   52.591126] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] Updating routing for [CONNECTOR:73:HDMI-A-1]
[   52.591131] [drm:drm_atomic_helper_check_modeset [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] keeps [ENCODER:72:DDI C], now on [CRTC:52:pipe B]
[   52.591159] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:40:plane 1B] with fb 75
[   52.591179] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:40:plane 1B] visible 1 -> 1, off 0, on 0, ms 0
[   52.591192] [drm:drm_atomic_commit [drm]] committing ffff88046d90b800
[   52.591403] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046d90b800
[   52.591414] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046d90b800
[   54.439258] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:64:DP-1]
[   54.439287] [drm:intel_dp_detect [i915]] [CONNECTOR:64:DP-1]
[   54.439308] [drm:intel_power_well_enable [i915]] enabling dpio-common-a
[   54.439412] [drm:intel_power_well_disable [i915]] disabling dpio-common-a
[   54.439424] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:64:DP-1] disconnected
[   54.439447] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:68:DP-2]
[   54.439472] [drm:intel_dp_detect [i915]] [CONNECTOR:68:DP-2]
[   54.439786] [drm:lspcon_wake_native_aux_ch [i915]] Native AUX CH up, DPCD version: 1.2
[   54.439805] [drm:lspcon_resume [i915]] LSPCON recovering in PCON mode after 0 ms
[   54.440284] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.441457] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.442684] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.443979] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.445201] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.446005] [drm:lspcon_wait_mode [i915]] Current LSPCON mode PCON
[   54.446419] [drm:intel_dp_read_dpcd [i915]] DPCD: 12 14 c4 01 01 15 00 01 00 00 04 00 0f 00 00
[   54.447151] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
[   54.447186] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 243000, 270000, 324000, 432000, 540000
[   54.447204] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
[   54.447223] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
[   54.447601] [drm:drm_dp_read_desc [drm_kms_helper]] DP branch: OUI 00-60-ad dev-ID MC2800 HW-rev 2.2 SW-rev 1.56 quirks 0x0000
[   54.447902] [drm:intel_dp_detect [i915]] Sink is not MST capable
[   54.448642] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.449858] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.451068] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.452228] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.453488] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.454680] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.455885] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.457196] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.458390] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.459731] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.461027] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.462387] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.463732] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.465059] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.466390] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.467688] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.469044] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.470237] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.471439] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.472658] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.473862] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.475192] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.476520] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.477817] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.479108] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.480452] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.481795] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.483123] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.484412] [drm:drm_dp_i2c_do_msg [drm_kms_helper]] native defer
[   54.485192] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
[   54.485511] [drm:drm_add_edid_modes [drm]] HDMI: DVI dual 0, max TMDS clock 0 kHz
[   54.485659] [drm:drm_edid_to_eld [drm]] ELD monitor
[   54.485668] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
[   54.485677] [drm:drm_edid_to_eld [drm]] ELD size 32, SAD count 1
[   54.485786] [drm:drm_mode_debug_printmodeline [drm]] Modeline 163:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a
[   54.485795] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: H_ILLEGAL
[   54.485805] [drm:drm_mode_debug_printmodeline [drm]] Modeline 165:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a
[   54.485813] [drm:drm_mode_prune_invalid [drm]] Not using 720x576i mode: H_ILLEGAL
[   54.485823] [drm:drm_mode_debug_printmodeline [drm]] Modeline 177:"720x480i" 60 13514 720 739 801 858 480 488 494 525 0x40 0x101a
[   54.485831] [drm:drm_mode_prune_invalid [drm]] Not using 720x480i mode: H_ILLEGAL
[   54.485841] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:68:DP-2] probed modes :
[   54.485850] [drm:drm_mode_debug_printmodeline [drm]] Modeline 77:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[   54.485860] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[   54.485870] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
[   54.485879] [drm:drm_mode_debug_printmodeline [drm]] Modeline 113:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
[   54.485889] [drm:drm_mode_debug_printmodeline [drm]] Modeline 82:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[   54.485898] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[   54.485908] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
[   54.485917] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
[   54.485926] [drm:drm_mode_debug_printmodeline [drm]] Modeline 85:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
[   54.485936] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
[   54.485945] [drm:drm_mode_debug_printmodeline [drm]] Modeline 84:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
[   54.485955] [drm:drm_mode_debug_printmodeline [drm]] Modeline 96:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[   54.485964] [drm:drm_mode_debug_printmodeline [drm]] Modeline 114:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[   54.485974] [drm:drm_mode_debug_printmodeline [drm]] Modeline 80:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
[   54.485983] [drm:drm_mode_debug_printmodeline [drm]] Modeline 83:"1152x720" 60 67282 1152 1208 1328 1504 720 721 724 746 0x0 0x6
[   54.485993] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
[   54.486002] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
[   54.486012] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
[   54.486021] [drm:drm_mode_debug_printmodeline [drm]] Modeline 81:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
[   54.486031] [drm:drm_mode_debug_printmodeline [drm]] Modeline 115:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
[   54.486040] [drm:drm_mode_debug_printmodeline [drm]] Modeline 97:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
[   54.486049] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"640x480" 67 30240 640 704 768 864 480 483 486 525 0x40 0xa
[   54.486059] [drm:drm_mode_debug_printmodeline [drm]] Modeline 111:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
[   54.486068] [drm:drm_mode_debug_printmodeline [drm]] Modeline 92:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
[   54.486169] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1]
[   54.486200] [drm:intel_hdmi_detect [i915]] [CONNECTOR:73:HDMI-A-1]
[   54.557304] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
[   54.557322] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
[   54.559416] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
[   54.559442] [drm:drm_dp_dual_mode_detect [drm_kms_helper]] DP dual mode HDMI ID:  (err -6)
[   54.559475] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
[   54.559519] [drm:drm_add_edid_modes [drm]] HDMI: DVI dual 0, max TMDS clock 225000 kHz
[   54.559667] [drm:drm_edid_to_eld [drm]] ELD monitor
[   54.559676] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
[   54.559684] [drm:drm_edid_to_eld [drm]] ELD size 44, SAD count 3
[   54.559843] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:73:HDMI-A-1] probed modes :
[   54.559853] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
[   54.559862] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[   54.559871] [drm:drm_mode_debug_printmodeline [drm]] Modeline 99:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
[   54.559881] [drm:drm_mode_debug_printmodeline [drm]] Modeline 132:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
[   54.559890] [drm:drm_mode_debug_printmodeline [drm]] Modeline 118:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[   54.559899] [drm:drm_mode_debug_printmodeline [drm]] Modeline 122:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
[   54.559908] [drm:drm_mode_debug_printmodeline [drm]] Modeline 128:"1920x1080" 30 74250 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[   54.559917] [drm:drm_mode_debug_printmodeline [drm]] Modeline 142:"1920x1080" 30 74176 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
[   54.559926] [drm:drm_mode_debug_printmodeline [drm]] Modeline 127:"1920x1080" 25 74250 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
[   54.559935] [drm:drm_mode_debug_printmodeline [drm]] Modeline 126:"1920x1080" 24 74250 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
[   54.559944] [drm:drm_mode_debug_printmodeline [drm]] Modeline 141:"1920x1080" 24 74176 1920 2558 2602 2750 1080 1084 1089 1125 0x40 0x5
[   54.559953] [drm:drm_mode_debug_printmodeline [drm]] Modeline 107:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
[   54.559963] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"1360x768" 60 85500 1360 1424 1536 1792 768 771 777 795 0x40 0x5
[   54.559972] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"1152x864" 60 81579 1152 1216 1336 1520 864 865 868 895 0x0 0x6
[   54.559981] [drm:drm_mode_debug_printmodeline [drm]] Modeline 100:"1280x720" 60 74250 1280 1390 1526 1664 720 725 730 746 0x40 0x9
[   54.559990] [drm:drm_mode_debug_printmodeline [drm]] Modeline 119:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[   54.560028] [drm:drm_mode_debug_printmodeline [drm]] Modeline 137:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
[   54.560037] [drm:drm_mode_debug_printmodeline [drm]] Modeline 120:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
[   54.560047] [drm:drm_mode_debug_printmodeline [drm]] Modeline 105:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
[   54.560057] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
[   54.560067] [drm:drm_mode_debug_printmodeline [drm]] Modeline 125:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
[   54.560097] [drm:drm_mode_debug_printmodeline [drm]] Modeline 129:"720x576i" 50 13500 720 732 795 864 576 580 586 625 0x40 0x101a
[   54.560107] [drm:drm_mode_debug_printmodeline [drm]] Modeline 139:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
[   54.560135] [drm:drm_mode_debug_printmodeline [drm]] Modeline 123:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
[   54.560145] [drm:drm_mode_debug_printmodeline [drm]] Modeline 134:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
[   54.560154] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
[   54.560164] [drm:drm_mode_debug_printmodeline [drm]] Modeline 112:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
[   60.941298] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046c683800
[   60.941311] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:cursor A] ffff88046b5ba900 state to ffff88046c683800
[   60.941323] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:39:pipe A] ffff88045d8c7000 state to ffff88046c683800
[   60.941332] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046b5ba900 to [CRTC:39:pipe A]
[   60.941342] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:78] for plane state ffff88046b5ba900
[   60.941351] [drm:drm_atomic_check_only [drm]] checking ffff88046c683800
[   60.941386] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:36:cursor A] with fb 78
[   60.941408] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:36:cursor A] visible 0 -> 1, off 0, on 1, ms 0
[   60.941430] [drm:drm_atomic_commit [drm]] committing ffff88046c683800
[   60.941489] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046c683800
[   60.941500] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046c683800
[   60.941523] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046c683800
[   60.941533] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:cursor B] ffff88046bceb400 state to ffff88046c683800
[   60.941544] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:52:pipe B] ffff88046e73c800 state to ffff88046c683800
[   60.941553] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046bceb400 to [CRTC:52:pipe B]
[   60.941563] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for plane state ffff88046bceb400
[   60.941572] [drm:drm_atomic_check_only [drm]] checking ffff88046c683800
[   60.941595] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:49:cursor B] with fb 116
[   60.941616] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:49:cursor B] visible 0 -> 1, off 0, on 1, ms 0
[   60.941630] [drm:drm_atomic_commit [drm]] committing ffff88046c683800
[   60.941657] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046c683800
[   60.941667] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046c683800
[   61.043714] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046d99ec00
[   61.043741] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:cursor A] ffff88047dac4800 state to ffff88046d99ec00
[   61.043753] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:39:pipe A] ffff88046d993800 state to ffff88046d99ec00
[   61.043762] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88047dac4800 to [NOCRTC]
[   61.043771] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88047dac4800
[   61.043780] [drm:drm_atomic_check_only [drm]] checking ffff88046d99ec00
[   61.043814] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:36:cursor A] with fb -1
[   61.043870] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:36:cursor A] visible 1 -> 0, off 1, on 0, ms 0
[   61.043891] [drm:drm_atomic_commit [drm]] committing ffff88046d99ec00
[   61.043934] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046d99ec00
[   61.043945] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046d99ec00
[   61.043961] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046d99ec00
[   61.043971] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:cursor B] ffff88046b5ba900 state to ffff88046d99ec00
[   61.043982] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:52:pipe B] ffff88045d8c7000 state to ffff88046d99ec00
[   61.043991] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046b5ba900 to [NOCRTC]
[   61.044000] [drm:drm_atomic_set_fb_for_plane [drm]] Set [NOFB] for plane state ffff88046b5ba900
[   61.044009] [drm:drm_atomic_check_only [drm]] checking ffff88046d99ec00
[   61.044034] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:49:cursor B] with fb -1
[   61.044056] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:49:cursor B] visible 1 -> 0, off 1, on 0, ms 0
[   61.044069] [drm:drm_atomic_commit [drm]] committing ffff88046d99ec00
[   61.044093] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046d99ec00
[   61.044104] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046d99ec00
[   61.044242] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046d99ec00
[   61.044253] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:36:cursor A] ffff88046b4f1d00 state to ffff88046d99ec00
[   61.044263] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:39:pipe A] ffff88046e73c800 state to ffff88046d99ec00
[   61.044273] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88046b4f1d00 to [CRTC:39:pipe A]
[   61.044292] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:78] for plane state ffff88046b4f1d00
[   61.044301] [drm:drm_atomic_check_only [drm]] checking ffff88046d99ec00
[   61.044332] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:36:cursor A] with fb 78
[   61.044354] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:36:cursor A] visible 0 -> 1, off 0, on 1, ms 0
[   61.044369] [drm:drm_atomic_commit [drm]] committing ffff88046d99ec00
[   61.044400] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046d99ec00
[   61.044410] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046d99ec00
[   61.044426] [drm:drm_atomic_state_init [drm]] Allocated atomic state ffff88046d99ec00
[   61.044436] [drm:drm_atomic_get_plane_state [drm]] Added [PLANE:49:cursor B] ffff88047dac4800 state to ffff88046d99ec00
[   61.044446] [drm:drm_atomic_get_crtc_state [drm]] Added [CRTC:52:pipe B] ffff88046d993800 state to ffff88046d99ec00
[   61.044455] [drm:drm_atomic_set_crtc_for_plane [drm]] Link plane state ffff88047dac4800 to [CRTC:52:pipe B]
[   61.044465] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for plane state ffff88047dac4800
[   61.044474] [drm:drm_atomic_check_only [drm]] checking ffff88046d99ec00
[   61.044497] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:49:cursor B] with fb 116
[   61.044519] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:49:cursor B] visible 0 -> 1, off 0, on 1, ms 0
[   61.044532] [drm:drm_atomic_commit [drm]] committing ffff88046d99ec00
[   61.044555] [drm:drm_atomic_state_default_clear [drm]] Clearing atomic state ffff88046d99ec00
[   61.044565] [drm:__drm_atomic_state_free [drm]] Freeing atomic state ffff88046d99ec00
[   61.047870] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:78] for plane state ffff88046b4d9d00
[   61.047906] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:36:cursor A] with fb 78
[   61.047928] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:36:cursor A] visible 1 -> 1, off 0, on 0, ms 0
[   61.048062] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for plane state ffff88046b4d9d00
[   61.048092] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:49:cursor B] with fb 116
[   61.048113] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:49:cursor B] visible 1 -> 1, off 0, on 0, ms 0
[   61.053157] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:78] for plane state ffff88046ba75900
[   61.053191] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:36:cursor A] with fb 78
[   61.053213] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:36:cursor A] visible 1 -> 1, off 0, on 0, ms 0
[   61.053237] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for plane state ffff88046ba75900
[   61.053259] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:49:cursor B] with fb 116
[   61.053280] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:49:cursor B] visible 1 -> 1, off 0, on 0, ms 0
[   61.057967] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:78] for plane state ffff88046f52de00
[   61.058002] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:36:cursor A] with fb 78
[   61.058050] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:36:cursor A] visible 1 -> 1, off 0, on 0, ms 0
[   61.058350] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for plane state ffff88046f52de00
[   61.058381] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:49:cursor B] with fb 116
[   61.058402] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:49:cursor B] visible 1 -> 1, off 0, on 0, ms 0
[   61.090716] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:78] for plane state ffff880469e12a00
[   61.090750] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:39:pipe A] has [PLANE:36:cursor A] with fb 78
[   61.090772] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:36:cursor A] visible 1 -> 1, off 0, on 0, ms 0
[   61.090797] [drm:drm_atomic_set_fb_for_plane [drm]] Set [FB:116] for plane state ffff880469e12a00
[   61.090819] [drm:intel_plane_atomic_calc_changes [i915]] [CRTC:52:pipe B] has [PLANE:49:cursor B] with fb 116
[   61.090840] [drm:intel_plane_atomic_calc_changes [i915]] [PLANE:49:cursor B] visible 1 -> 1, off 0, on 0, ms 0
[   61.398167] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   61.398189] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
[   61.398217] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   61.398239] [drm:i915_audio_component_get_eld [i915]] Not valid for port C
[   61.398260] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   61.398283] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   61.398304] [drm:i915_audio_component_get_eld [i915]] Not valid for port D
[   61.400239] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 5625
[   61.514742] [drm:hsw_audio_config_update [i915]] using Maud 784, Naud 5625
[   61.551828] Bluetooth: RFCOMM TTY layer initialized
[   61.551839] Bluetooth: RFCOMM socket layer initialized
[   61.551840] Bluetooth: RFCOMM ver 1.11