From cda96700cbf8bbc647b63c0c5aad2684f7c56f3d Mon Sep 17 00:00:00 2001 From: Manasi Navare Date: Mon, 19 Jun 2017 17:30:25 -0700 Subject: [PATCH 2/3] drm/i915/dp: Set panel power cycle delay to 800ms instead of current 400ms Also fix the hW readout to fix pps mismatch warning Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_dp.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 22f7014..957db8c 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -5188,8 +5188,8 @@ intel_pps_readout_hw_state(struct drm_i915_private *dev_priv, else seq->t11_t12 = 0; } else { - seq->t11_t12 = ((pp_div & PANEL_POWER_CYCLE_DELAY_MASK) >> - PANEL_POWER_CYCLE_DELAY_SHIFT) * 1000; + seq->t11_t12 = (((pp_div & PANEL_POWER_CYCLE_DELAY_MASK) >> + PANEL_POWER_CYCLE_DELAY_SHIFT) - 1) * 1000; } } @@ -5262,7 +5262,8 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, assign_final(t8); assign_final(t9); assign_final(t10); - assign_final(t11_t12); + //assign_final(t11_t12); + final->t11_t12 = 7000; #undef assign_final #define get_delay(field) (DIV_ROUND_UP(final->field, 10)) @@ -5345,7 +5346,7 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev, << BXT_POWER_CYCLE_DELAY_SHIFT); } else { pp_div = ((100 * div)/2 - 1) << PP_REFERENCE_DIVIDER_SHIFT; - pp_div |= (DIV_ROUND_UP(seq->t11_t12, 1000) + pp_div |= (DIV_ROUND_UP((seq->t11_t12 + 3000), 1000) << PANEL_POWER_CYCLE_DELAY_SHIFT); } -- 2.1.4