From 04a99c643760e477c00634851e150b2cf7cd54cb Mon Sep 17 00:00:00 2001 From: Manasi Navare Date: Thu, 15 Jun 2017 16:55:27 -0700 Subject: [PATCH] Add Debug prints Print out HPD live status before and after edp_panel_on and before starting link train Signed-off-by: Manasi Navare --- drivers/gpu/drm/i915/intel_ddi.c | 12 +++++++++++- drivers/gpu/drm/i915/intel_dp.c | 10 +++++++--- 2 files changed, 18 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index db80938..c011d74 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -2005,13 +2005,19 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); enum port port = intel_ddi_get_encoder_port(encoder); struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base); + bool test = false; WARN_ON(link_mst && (port == PORT_A || port == PORT_E)); intel_dp_set_link_params(intel_dp, link_rate, lane_count, link_mst); - if (encoder->type == INTEL_OUTPUT_EDP) + if (encoder->type == INTEL_OUTPUT_EDP) { + test = intel_digital_port_connected(dev_priv, dig_port); + DRM_DEBUG_KMS("\nManasi Debug: HPD Live status before turning Panel On = %d", test); intel_edp_panel_on(intel_dp); + test = intel_digital_port_connected(dev_priv, dig_port); + DRM_DEBUG_KMS("\nManasi Debug: HPD Live status after turning Panel On = %d", test); + } intel_ddi_clk_select(encoder, pll); @@ -2019,7 +2025,11 @@ static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder, intel_prepare_dp_ddi_buffers(encoder); intel_ddi_init_dp_buf_reg(encoder); + test = intel_digital_port_connected(dev_priv, dig_port); + DRM_DEBUG_KMS("\nManasi Debug: HPD Live status = %d", test); intel_dp_sink_dpms(intel_dp, DRM_MODE_DPMS_ON); + test = intel_digital_port_connected(dev_priv, dig_port); + DRM_DEBUG_KMS("\nManasi Debug: HPD Live status = %d", test); intel_dp_start_link_train(intel_dp); if (port != PORT_A || INTEL_GEN(dev_priv) >= 9) intel_dp_stop_link_train(intel_dp); diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index bca4ac1..22f7014 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -1969,9 +1969,11 @@ static void wait_panel_power_cycle(struct intel_dp *intel_dp) /* When we disable the VDD override bit last we have to do the manual * wait. */ - if (panel_power_off_duration < (s64)intel_dp->panel_power_cycle_delay) + if (panel_power_off_duration < (s64)intel_dp->panel_power_cycle_delay) { + DRM_DEBUG_KMS("\nManasi Debug: Waiting t11_t12 time"); wait_remaining_ms_from_jiffies(jiffies, intel_dp->panel_power_cycle_delay - panel_power_off_duration); + } wait_panel_status(intel_dp, IDLE_CYCLE_MASK, IDLE_CYCLE_VALUE); } @@ -2213,6 +2215,7 @@ static void edp_panel_on(struct intel_dp *intel_dp) wait_panel_on(intel_dp); intel_dp->last_power_on = jiffies; + DRM_DEBUG_KMS("\nManasi: Last Power On for eDp at %ld", intel_dp->last_power_on); if (IS_GEN5(dev_priv)) { pp |= PANEL_POWER_RESET; /* restore panel reset bit */ @@ -5231,6 +5234,7 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, intel_pps_readout_hw_state(dev_priv, intel_dp, &cur); + DRM_DEBUG_KMS("\nManasi Debug: PPS Values to be programmed at init_panel_power time "); intel_pps_dump_state("cur", &cur); vbt = dev_priv->vbt.edp.pps; @@ -5269,7 +5273,7 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, intel_dp->panel_power_cycle_delay = get_delay(t11_t12); #undef get_delay - DRM_DEBUG_KMS("panel power up delay %d, power down delay %d, power cycle delay %d\n", + DRM_DEBUG_KMS("Manasi Debug final delay values: panel power up delay %d, power down delay %d, power cycle delay %d\n", intel_dp->panel_power_up_delay, intel_dp->panel_power_down_delay, intel_dp->panel_power_cycle_delay); @@ -5365,7 +5369,7 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev, else I915_WRITE(regs.pp_div, pp_div); - DRM_DEBUG_KMS("panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n", + DRM_DEBUG_KMS("Manasi Debug at edp_init panel power sequencer register settings: PP_ON %#x, PP_OFF %#x, PP_DIV %#x\n", I915_READ(regs.pp_on), I915_READ(regs.pp_off), (IS_GEN9_LP(dev_priv) || HAS_PCH_CNP(dev_priv)) ? -- 2.1.4