Bugzilla – Attachment 116512 Details for
Bug 90963
[DP] i915:No display with Display port [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up
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full dmesg with debug
i915_debug.dmesg (text/plain), 1.01 MB, created by
Eong Chen
on 2015-06-15 14:23:17 UTC
(
hide
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Description:
full dmesg with debug
Filename:
MIME Type:
Creator:
Eong Chen
Created:
2015-06-15 14:23:17 UTC
Size:
1.01 MB
patch
obsolete
>[ 0.000000] Initializing cgroup subsys cpuset >[ 0.000000] Initializing cgroup subsys cpu >[ 0.000000] Initializing cgroup subsys cpuacct >[ 0.000000] Linux version 4.0.5-gentoo (root@localhost) (gcc version 4.8.3 (Gentoo 4.8.3 p1.1, pie-0.5.9) ) #1 SMP Mon Jun 8 10:44:07 CST 2015 >[ 0.000000] Command line: BOOT_IMAGE=/kernel-gentoo root=/dev/sda4 ro init=/usr/lib/systemd/systemd drm.debug=0xe log_buf_len=4M >[ 0.000000] e820: BIOS-provided physical RAM map: >[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009d3ff] usable >[ 0.000000] BIOS-e820: [mem 0x000000000009d400-0x000000000009ffff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000000e0000-0x00000000000fffff] reserved >[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x00000000cf610fff] usable >[ 0.000000] BIOS-e820: [mem 0x00000000cf611000-0x00000000cf617fff] ACPI NVS >[ 0.000000] BIOS-e820: [mem 0x00000000cf618000-0x00000000d0000fff] usable >[ 0.000000] BIOS-e820: [mem 0x00000000d0001000-0x00000000d04e4fff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000d04e5000-0x00000000d7db3fff] usable >[ 0.000000] BIOS-e820: [mem 0x00000000d7db4000-0x00000000d7ffffff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000d8000000-0x00000000d8759fff] usable >[ 0.000000] BIOS-e820: [mem 0x00000000d875a000-0x00000000d87fffff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000d8800000-0x00000000d8fadfff] usable >[ 0.000000] BIOS-e820: [mem 0x00000000d8fae000-0x00000000d8ffffff] ACPI data >[ 0.000000] BIOS-e820: [mem 0x00000000d9000000-0x00000000da71bfff] usable >[ 0.000000] BIOS-e820: [mem 0x00000000da71c000-0x00000000da7fffff] ACPI NVS >[ 0.000000] BIOS-e820: [mem 0x00000000da800000-0x00000000dbcebfff] usable >[ 0.000000] BIOS-e820: [mem 0x00000000dbcec000-0x00000000dbffffff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000dd000000-0x00000000df1fffff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000f8000000-0x00000000fbffffff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000fec00000-0x00000000fec00fff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000fed00000-0x00000000fed03fff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000fed1c000-0x00000000fed1ffff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000fee00000-0x00000000fee00fff] reserved >[ 0.000000] BIOS-e820: [mem 0x00000000ff000000-0x00000000ffffffff] reserved >[ 0.000000] BIOS-e820: [mem 0x0000000100000000-0x000000041edfffff] usable >[ 0.000000] NX (Execute Disable) protection: active >[ 0.000000] SMBIOS 2.7 present. >[ 0.000000] DMI: Dell Inc. Latitude E7440/07F3F4, BIOS A15 05/19/2015 >[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved >[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable >[ 0.000000] e820: last_pfn = 0x41ee00 max_arch_pfn = 0x400000000 >[ 0.000000] MTRR default type: uncachable >[ 0.000000] MTRR fixed ranges enabled: >[ 0.000000] 00000-9FFFF write-back >[ 0.000000] A0000-BFFFF uncachable >[ 0.000000] C0000-CFFFF write-protect >[ 0.000000] D0000-E7FFF uncachable >[ 0.000000] E8000-FFFFF write-protect >[ 0.000000] MTRR variable ranges enabled: >[ 0.000000] 0 base 0000000000 mask 7C00000000 write-back >[ 0.000000] 1 base 0400000000 mask 7FE0000000 write-back >[ 0.000000] 2 base 00E0000000 mask 7FE0000000 uncachable >[ 0.000000] 3 base 00DE000000 mask 7FFE000000 uncachable >[ 0.000000] 4 base 00DD000000 mask 7FFF000000 uncachable >[ 0.000000] 5 base 041F000000 mask 7FFF000000 uncachable >[ 0.000000] 6 base 041EE00000 mask 7FFFE00000 uncachable >[ 0.000000] 7 disabled >[ 0.000000] 8 disabled >[ 0.000000] 9 disabled >[ 0.000000] PAT configuration [0-7]: WB WC UC- UC WB WC UC- UC >[ 0.000000] e820: update [mem 0xdd000000-0xffffffff] usable ==> reserved >[ 0.000000] e820: last_pfn = 0xdbcec max_arch_pfn = 0x400000000 >[ 0.000000] found SMP MP-table at [mem 0x000fd980-0x000fd98f] mapped at [ffff8800000fd980] >[ 0.000000] Scanning 1 areas for low memory corruption >[ 0.000000] Base memory trampoline at [ffff880000097000] 97000 size 24576 >[ 0.000000] Using GB pages for direct mapping >[ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff] >[ 0.000000] [mem 0x00000000-0x000fffff] page 4k >[ 0.000000] BRK [0x02726000, 0x02726fff] PGTABLE >[ 0.000000] BRK [0x02727000, 0x02727fff] PGTABLE >[ 0.000000] BRK [0x02728000, 0x02728fff] PGTABLE >[ 0.000000] init_memory_mapping: [mem 0x41ec00000-0x41edfffff] >[ 0.000000] [mem 0x41ec00000-0x41edfffff] page 2M >[ 0.000000] BRK [0x02729000, 0x02729fff] PGTABLE >[ 0.000000] init_memory_mapping: [mem 0x400000000-0x41ebfffff] >[ 0.000000] [mem 0x400000000-0x41ebfffff] page 2M >[ 0.000000] init_memory_mapping: [mem 0x3e0000000-0x3ffffffff] >[ 0.000000] [mem 0x3e0000000-0x3ffffffff] page 1G >[ 0.000000] init_memory_mapping: [mem 0x00100000-0xcf610fff] >[ 0.000000] [mem 0x00100000-0x001fffff] page 4k >[ 0.000000] [mem 0x00200000-0x3fffffff] page 2M >[ 0.000000] [mem 0x40000000-0xbfffffff] page 1G >[ 0.000000] [mem 0xc0000000-0xcf5fffff] page 2M >[ 0.000000] [mem 0xcf600000-0xcf610fff] page 4k >[ 0.000000] init_memory_mapping: [mem 0xcf618000-0xd0000fff] >[ 0.000000] [mem 0xcf618000-0xcf7fffff] page 4k >[ 0.000000] [mem 0xcf800000-0xcfffffff] page 2M >[ 0.000000] [mem 0xd0000000-0xd0000fff] page 4k >[ 0.000000] BRK [0x0272a000, 0x0272afff] PGTABLE >[ 0.000000] init_memory_mapping: [mem 0xd04e5000-0xd7db3fff] >[ 0.000000] [mem 0xd04e5000-0xd05fffff] page 4k >[ 0.000000] [mem 0xd0600000-0xd7bfffff] page 2M >[ 0.000000] [mem 0xd7c00000-0xd7db3fff] page 4k >[ 0.000000] BRK [0x0272b000, 0x0272bfff] PGTABLE >[ 0.000000] init_memory_mapping: [mem 0xd8000000-0xd8759fff] >[ 0.000000] [mem 0xd8000000-0xd85fffff] page 2M >[ 0.000000] [mem 0xd8600000-0xd8759fff] page 4k >[ 0.000000] init_memory_mapping: [mem 0xd8800000-0xd8fadfff] >[ 0.000000] [mem 0xd8800000-0xd8dfffff] page 2M >[ 0.000000] [mem 0xd8e00000-0xd8fadfff] page 4k >[ 0.000000] init_memory_mapping: [mem 0xd9000000-0xda71bfff] >[ 0.000000] [mem 0xd9000000-0xda5fffff] page 2M >[ 0.000000] [mem 0xda600000-0xda71bfff] page 4k >[ 0.000000] init_memory_mapping: [mem 0xda800000-0xdbcebfff] >[ 0.000000] [mem 0xda800000-0xdbbfffff] page 2M >[ 0.000000] [mem 0xdbc00000-0xdbcebfff] page 4k >[ 0.000000] init_memory_mapping: [mem 0x100000000-0x3dfffffff] >[ 0.000000] [mem 0x100000000-0x3dfffffff] page 1G >[ 0.000000] log_buf_len: 4194304 bytes >[ 0.000000] early log buf free: 255532(97%) >[ 0.000000] ACPI: Early table checksum verification disabled >[ 0.000000] ACPI: RSDP 0x00000000000EED50 000024 (v02 DELL ) >[ 0.000000] ACPI: XSDT 0x00000000D8FEB088 00008C (v01 DELL CBX3 01072009 AMI 00010013) >[ 0.000000] ACPI: FACP 0x00000000D8FFCA40 00010C (v05 DELL CBX3 01072009 AMI 00010013) >[ 0.000000] ACPI: DSDT 0x00000000D8FEB1A0 01189F (v02 DELL CBX3 00000014 INTL 20120711) >[ 0.000000] ACPI: FACS 0x00000000DA7FE080 000040 >[ 0.000000] ACPI: APIC 0x00000000D8FFCB50 000072 (v03 DELL CBX3 01072009 AMI 00010013) >[ 0.000000] ACPI: FPDT 0x00000000D8FFCBC8 000044 (v01 DELL CBX3 01072009 AMI 00010013) >[ 0.000000] ACPI: SLIC 0x00000000D8FFCC10 000176 (v03 DELL CBX3 01072009 MSFT 00010013) >[ 0.000000] ACPI: LPIT 0x00000000D8FFCD88 00005C (v01 DELL CBX3 00000000 AMI. 00000005) >[ 0.000000] ACPI: SSDT 0x00000000D8FFCDE8 000228 (v01 INTEL sensrhub 00000000 INTL 20120711) >[ 0.000000] ACPI: SSDT 0x00000000D8FFD010 00051F (v01 PmRef Cpu0Ist 00003000 INTL 20120711) >[ 0.000000] ACPI: SSDT 0x00000000D8FFD530 000AD8 (v01 PmRef CpuPm 00003000 INTL 20120711) >[ 0.000000] ACPI: HPET 0x00000000D8FFE008 000038 (v01 DELL CBX3 01072009 AMI. 00000005) >[ 0.000000] ACPI: SSDT 0x00000000D8FFE040 000455 (v01 SataRe SataTabl 00001000 INTL 20120711) >[ 0.000000] ACPI: MCFG 0x00000000D8FFE498 00003C (v01 DELL CBX3 01072009 MSFT 00000097) >[ 0.000000] ACPI: ASF! 0x00000000D8FFE4D8 0000A5 (v32 INTEL HCG 00000001 TFSM 000F4240) >[ 0.000000] ACPI: DMAR 0x00000000D8FFE580 0000B0 (v01 INTEL HSW 00000001 INTL 00000001) >[ 0.000000] ACPI: Local APIC address 0xfee00000 >[ 0.000000] No NUMA configuration found >[ 0.000000] Faking a node at [mem 0x0000000000000000-0x000000041edfffff] >[ 0.000000] NODE_DATA(0) allocated [mem 0x41e9f5000-0x41e9f8fff] >[ 0.000000] [ffffea0000000000-ffffea00107fffff] PMD -> [ffff88040e000000-ffff88041dffffff] on node 0 >[ 0.000000] Zone ranges: >[ 0.000000] DMA [mem 0x0000000000001000-0x0000000000ffffff] >[ 0.000000] DMA32 [mem 0x0000000001000000-0x00000000ffffffff] >[ 0.000000] Normal [mem 0x0000000100000000-0x000000041edfffff] >[ 0.000000] Movable zone start for each node >[ 0.000000] Early memory node ranges >[ 0.000000] node 0: [mem 0x0000000000001000-0x000000000009cfff] >[ 0.000000] node 0: [mem 0x0000000000100000-0x00000000cf610fff] >[ 0.000000] node 0: [mem 0x00000000cf618000-0x00000000d0000fff] >[ 0.000000] node 0: [mem 0x00000000d04e5000-0x00000000d7db3fff] >[ 0.000000] node 0: [mem 0x00000000d8000000-0x00000000d8759fff] >[ 0.000000] node 0: [mem 0x00000000d8800000-0x00000000d8fadfff] >[ 0.000000] node 0: [mem 0x00000000d9000000-0x00000000da71bfff] >[ 0.000000] node 0: [mem 0x00000000da800000-0x00000000dbcebfff] >[ 0.000000] node 0: [mem 0x0000000100000000-0x000000041edfffff] >[ 0.000000] Initmem setup node 0 [mem 0x0000000000001000-0x000000041edfffff] >[ 0.000000] On node 0 totalpages: 4170101 >[ 0.000000] DMA zone: 64 pages used for memmap >[ 0.000000] DMA zone: 21 pages reserved >[ 0.000000] DMA zone: 3996 pages, LIFO batch:0 >[ 0.000000] DMA32 zone: 13968 pages used for memmap >[ 0.000000] DMA32 zone: 893913 pages, LIFO batch:31 >[ 0.000000] Normal zone: 51128 pages used for memmap >[ 0.000000] Normal zone: 3272192 pages, LIFO batch:31 >[ 0.000000] Reserving Intel graphics stolen memory at 0xdd200000-0xdf1fffff >[ 0.000000] ACPI: PM-Timer IO Port: 0x1808 >[ 0.000000] ACPI: Local APIC address 0xfee00000 >[ 0.000000] ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled) >[ 0.000000] ACPI: LAPIC (acpi_id[0x02] lapic_id[0x02] enabled) >[ 0.000000] ACPI: LAPIC (acpi_id[0x03] lapic_id[0x01] enabled) >[ 0.000000] ACPI: LAPIC (acpi_id[0x04] lapic_id[0x03] enabled) >[ 0.000000] ACPI: LAPIC_NMI (acpi_id[0xff] high edge lint[0x1]) >[ 0.000000] ACPI: IOAPIC (id[0x08] address[0xfec00000] gsi_base[0]) >[ 0.000000] IOAPIC[0]: apic_id 8, version 32, address 0xfec00000, GSI 0-39 >[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 dfl dfl) >[ 0.000000] ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level) >[ 0.000000] ACPI: IRQ0 used by override. >[ 0.000000] ACPI: IRQ9 used by override. >[ 0.000000] Using ACPI (MADT) for SMP configuration information >[ 0.000000] ACPI: HPET id: 0x8086a701 base: 0xfed00000 >[ 0.000000] smpboot: Allowing 4 CPUs, 0 hotplug CPUs >[ 0.000000] PM: Registered nosave memory: [mem 0x00000000-0x00000fff] >[ 0.000000] PM: Registered nosave memory: [mem 0x0009d000-0x0009dfff] >[ 0.000000] PM: Registered nosave memory: [mem 0x0009e000-0x0009ffff] >[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000dffff] >[ 0.000000] PM: Registered nosave memory: [mem 0x000e0000-0x000fffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xcf611000-0xcf617fff] >[ 0.000000] PM: Registered nosave memory: [mem 0xd0001000-0xd04e4fff] >[ 0.000000] PM: Registered nosave memory: [mem 0xd7db4000-0xd7ffffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xd875a000-0xd87fffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xd8fae000-0xd8ffffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xda71c000-0xda7fffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xdbcec000-0xdbffffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xdc000000-0xdcffffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xdd000000-0xdf1fffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xdf200000-0xf7ffffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xf8000000-0xfbffffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfc000000-0xfebfffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfec00000-0xfec00fff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfec01000-0xfecfffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfed00000-0xfed03fff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfed04000-0xfed1bfff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfed1c000-0xfed1ffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfed20000-0xfedfffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfee00000-0xfee00fff] >[ 0.000000] PM: Registered nosave memory: [mem 0xfee01000-0xfeffffff] >[ 0.000000] PM: Registered nosave memory: [mem 0xff000000-0xffffffff] >[ 0.000000] e820: [mem 0xdf200000-0xf7ffffff] available for PCI devices >[ 0.000000] setup_percpu: NR_CPUS:64 nr_cpumask_bits:64 nr_cpu_ids:4 nr_node_ids:1 >[ 0.000000] PERCPU: Embedded 30 pages/cpu @ffff88041e600000 s85016 r8192 d29672 u524288 >[ 0.000000] pcpu-alloc: s85016 r8192 d29672 u524288 alloc=1*2097152 >[ 0.000000] pcpu-alloc: [0] 0 1 2 3 >[ 0.000000] Built 1 zonelists in Node order, mobility grouping on. Total pages: 4104920 >[ 0.000000] Policy zone: Normal >[ 0.000000] Kernel command line: BOOT_IMAGE=/kernel-gentoo root=/dev/sda4 ro init=/usr/lib/systemd/systemd drm.debug=0xe log_buf_len=4M >[ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) >[ 0.000000] xsave: enabled xstate_bv 0x7, cntxt size 0x340 using standard form >[ 0.000000] Calgary: detecting Calgary via BIOS EBDA area >[ 0.000000] Calgary: Unable to locate Rio Grande table in EBDA - bailing! >[ 0.000000] Memory: 16323620K/16680404K available (12482K kernel code, 1077K rwdata, 4760K rodata, 1156K init, 932K bss, 356784K reserved, 0K cma-reserved) >[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 >[ 0.000000] Hierarchical RCU implementation. >[ 0.000000] RCU restricting CPUs from NR_CPUS=64 to nr_cpu_ids=4. >[ 0.000000] RCU: Adjusting geometry for rcu_fanout_leaf=16, nr_cpu_ids=4 >[ 0.000000] NR_IRQS:4352 nr_irqs:728 16 >[ 0.000000] spurious 8259A interrupt: IRQ7. >[ 0.000000] Console: colour VGA+ 80x25 >[ 0.000000] console [tty0] enabled >[ 0.000000] hpet clockevent registered >[ 0.000000] tsc: Fast TSC calibration using PIT >[ 0.000000] tsc: Detected 2693.671 MHz processor >[ 0.000001] Calibrating delay loop (skipped), value calculated using timer frequency.. 5387.34 BogoMIPS (lpj=2693671) >[ 0.000180] pid_max: default: 32768 minimum: 301 >[ 0.000262] ACPI: Core revision 20150204 >[ 0.009619] ACPI: All ACPI Tables successfully acquired >[ 0.015144] Security Framework initialized >[ 0.015227] SELinux: Initializing. >[ 0.015308] SELinux: Starting in permissive mode >[ 0.015953] Dentry cache hash table entries: 2097152 (order: 12, 16777216 bytes) >[ 0.018425] Inode-cache hash table entries: 1048576 (order: 11, 8388608 bytes) >[ 0.019561] Mount-cache hash table entries: 32768 (order: 6, 262144 bytes) >[ 0.019659] Mountpoint-cache hash table entries: 32768 (order: 6, 262144 bytes) >[ 0.019940] Initializing cgroup subsys freezer >[ 0.020036] CPU: Physical Processor ID: 0 >[ 0.020116] CPU: Processor Core ID: 0 >[ 0.020215] ENERGY_PERF_BIAS: Set to 'normal', was 'performance' >[ 0.020299] ENERGY_PERF_BIAS: View and update with x86_energy_perf_policy(8) >[ 0.021228] mce: CPU supports 7 MCE banks >[ 0.021317] CPU0: Thermal monitoring enabled (TM1) >[ 0.021404] process: using mwait in idle threads >[ 0.021488] Last level iTLB entries: 4KB 1024, 2MB 1024, 4MB 1024 >[ 0.021570] Last level dTLB entries: 4KB 1024, 2MB 1024, 4MB 1024, 1GB 4 >[ 0.021762] Freeing SMP alternatives memory: 44K (ffffffff82630000 - ffffffff8263b000) >[ 0.022413] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0 >[ 0.032497] TSC deadline timer enabled >[ 0.032499] smpboot: CPU0: Intel(R) Core(TM) i7-4600U CPU @ 2.10GHz (fam: 06, model: 45, stepping: 01) >[ 0.033575] Performance Events: PEBS fmt2+, 16-deep LBR, Haswell events, full-width counters, Intel PMU driver. >[ 0.033898] ... version: 3 >[ 0.033977] ... bit width: 48 >[ 0.034056] ... generic registers: 4 >[ 0.034135] ... value mask: 0000ffffffffffff >[ 0.034216] ... max period: 0000ffffffffffff >[ 0.034297] ... fixed-purpose events: 3 >[ 0.034376] ... event mask: 000000070000000f >[ 0.034630] x86: Booting SMP configuration: >[ 0.034712] .... node #0, CPUs: #1 #2 #3 >[ 0.076980] x86: Booted up 1 node, 4 CPUs >[ 0.077135] smpboot: Total of 4 processors activated (21549.36 BogoMIPS) >[ 0.080163] devtmpfs: initialized >[ 0.080385] PM: Registering ACPI NVS region [mem 0xcf611000-0xcf617fff] (28672 bytes) >[ 0.080507] PM: Registering ACPI NVS region [mem 0xda71c000-0xda7fffff] (933888 bytes) >[ 0.080701] kworker/u8:0 (26) used greatest stack depth: 14040 bytes left >[ 0.080737] xor: automatically using best checksumming function: >[ 0.090054] avx : 26608.000 MB/sec >[ 0.090164] RTC time: 14:14:06, date: 06/15/15 >[ 0.090324] NET: Registered protocol family 16 >[ 0.096094] cpuidle: using governor ladder >[ 0.104108] cpuidle: using governor menu >[ 0.104244] ACPI FADT declares the system doesn't support PCIe ASPM, so disable it >[ 0.104375] ACPI: bus type PCI registered >[ 0.104504] PCI: MMCONFIG for domain 0000 [bus 00-3f] at [mem 0xf8000000-0xfbffffff] (base 0xf8000000) >[ 0.104640] PCI: MMCONFIG at [mem 0xf8000000-0xfbffffff] reserved in E820 >[ 0.104786] PCI: Using configuration type 1 for base access >[ 0.104883] dmi type 0xB1 record - unknown flag >[ 0.107600] kworker/u8:1 (392) used greatest stack depth: 13928 bytes left >[ 0.132137] raid6: sse2x1 9347 MB/s >[ 0.149141] raid6: sse2x2 11972 MB/s >[ 0.166143] raid6: sse2x4 13964 MB/s >[ 0.183150] raid6: avx2x1 18558 MB/s >[ 0.200157] raid6: avx2x2 21226 MB/s >[ 0.217164] raid6: avx2x4 25003 MB/s >[ 0.217243] raid6: using algorithm avx2x4 (25003 MB/s) >[ 0.217325] raid6: using avx2x2 recovery algorithm >[ 0.217445] ACPI: Added _OSI(Module Device) >[ 0.217526] ACPI: Added _OSI(Processor Device) >[ 0.217606] ACPI: Added _OSI(3.0 _SCP Extensions) >[ 0.217687] ACPI: Added _OSI(Processor Aggregator Device) >[ 0.220767] ACPI: Executed 1 blocks of module-level executable AML code >[ 0.222993] [Firmware Bug]: ACPI: BIOS _OSI(Linux) query ignored >[ 0.226389] ACPI: Dynamic OEM Table Load: >[ 0.226549] ACPI: SSDT 0xFFFF88040B458800 0003D3 (v01 PmRef Cpu0Cst 00003001 INTL 20120711) >[ 0.227264] ACPI: Dynamic OEM Table Load: >[ 0.227422] ACPI: SSDT 0xFFFF88040B480000 0005AA (v01 PmRef ApIst 00003000 INTL 20120711) >[ 0.228161] ACPI: Dynamic OEM Table Load: >[ 0.228320] ACPI: SSDT 0xFFFF88040BF24A00 000119 (v01 PmRef ApCst 00003000 INTL 20120711) >[ 0.230793] ACPI: Interpreter enabled >[ 0.230887] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20150204/hwxface-580) >[ 0.231104] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20150204/hwxface-580) >[ 0.231340] ACPI: (supports S0 S3 S4 S5) >[ 0.231426] ACPI: Using IOAPIC for interrupt routing >[ 0.231545] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug >[ 0.244585] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-3e]) >[ 0.244679] acpi PNP0A08:00: _OSC: OS supports [ExtendedConfig ASPM ClockPM Segments MSI] >[ 0.244986] acpi PNP0A08:00: _OSC: platform does not support [PCIeHotplug PME] >[ 0.245215] acpi PNP0A08:00: _OSC: OS now controls [AER PCIeCapability] >[ 0.245491] PCI host bridge to bus 0000:00 >[ 0.245578] pci_bus 0000:00: root bus resource [bus 00-3e] >[ 0.245670] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7 window] >[ 0.245754] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff window] >[ 0.245839] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff window] >[ 0.245959] pci_bus 0000:00: root bus resource [mem 0x000d0000-0x000d3fff window] >[ 0.246080] pci_bus 0000:00: root bus resource [mem 0x000d4000-0x000d7fff window] >[ 0.246200] pci_bus 0000:00: root bus resource [mem 0x000d8000-0x000dbfff window] >[ 0.246320] pci_bus 0000:00: root bus resource [mem 0x000dc000-0x000dffff window] >[ 0.246441] pci_bus 0000:00: root bus resource [mem 0x000e0000-0x000e3fff window] >[ 0.246562] pci_bus 0000:00: root bus resource [mem 0x000e4000-0x000e7fff window] >[ 0.246691] pci_bus 0000:00: root bus resource [mem 0xdf200000-0xfeafffff window] >[ 0.246815] pci 0000:00:00.0: [8086:0a04] type 00 class 0x060000 >[ 0.246889] pci 0000:00:02.0: [8086:0a16] type 00 class 0x030000 >[ 0.246898] pci 0000:00:02.0: reg 0x10: [mem 0xf7800000-0xf7bfffff 64bit] >[ 0.246903] pci 0000:00:02.0: reg 0x18: [mem 0xe0000000-0xefffffff 64bit pref] >[ 0.246907] pci 0000:00:02.0: reg 0x20: [io 0xf000-0xf03f] >[ 0.246968] pci 0000:00:03.0: [8086:0a0c] type 00 class 0x040300 >[ 0.246974] pci 0000:00:03.0: reg 0x10: [mem 0xf7e34000-0xf7e37fff 64bit] >[ 0.247055] pci 0000:00:14.0: [8086:9c31] type 00 class 0x0c0330 >[ 0.247069] pci 0000:00:14.0: reg 0x10: [mem 0xf7e20000-0xf7e2ffff 64bit] >[ 0.247117] pci 0000:00:14.0: PME# supported from D3hot D3cold >[ 0.247148] pci 0000:00:14.0: System wakeup disabled by ACPI >[ 0.247259] pci 0000:00:16.0: [8086:9c3a] type 00 class 0x078000 >[ 0.247276] pci 0000:00:16.0: reg 0x10: [mem 0xf7e3f000-0xf7e3f01f 64bit] >[ 0.247335] pci 0000:00:16.0: PME# supported from D0 D3hot D3cold >[ 0.247396] pci 0000:00:19.0: [8086:155a] type 00 class 0x020000 >[ 0.247409] pci 0000:00:19.0: reg 0x10: [mem 0xf7e00000-0xf7e1ffff] >[ 0.247414] pci 0000:00:19.0: reg 0x14: [mem 0xf7e3c000-0xf7e3cfff] >[ 0.247423] pci 0000:00:19.0: reg 0x18: [io 0xf080-0xf09f] >[ 0.247471] pci 0000:00:19.0: PME# supported from D0 D3hot D3cold >[ 0.247646] pci 0000:00:19.0: System wakeup disabled by ACPI >[ 0.247761] pci 0000:00:1b.0: [8086:9c20] type 00 class 0x040300 >[ 0.247773] pci 0000:00:1b.0: reg 0x10: [mem 0xf7e30000-0xf7e33fff 64bit] >[ 0.247829] pci 0000:00:1b.0: PME# supported from D0 D3hot D3cold >[ 0.247860] pci 0000:00:1b.0: System wakeup disabled by ACPI >[ 0.247975] pci 0000:00:1c.0: [8086:9c10] type 01 class 0x060400 >[ 0.248040] pci 0000:00:1c.0: PME# supported from D0 D3hot D3cold >[ 0.248073] pci 0000:00:1c.0: System wakeup disabled by ACPI >[ 0.248189] pci 0000:00:1c.3: [8086:9c16] type 01 class 0x060400 >[ 0.248256] pci 0000:00:1c.3: PME# supported from D0 D3hot D3cold >[ 0.248291] pci 0000:00:1c.3: System wakeup disabled by ACPI >[ 0.248403] pci 0000:00:1c.4: [8086:9c18] type 01 class 0x060400 >[ 0.248473] pci 0000:00:1c.4: PME# supported from D0 D3hot D3cold >[ 0.248508] pci 0000:00:1c.4: System wakeup disabled by ACPI >[ 0.248623] pci 0000:00:1d.0: [8086:9c26] type 00 class 0x0c0320 >[ 0.248641] pci 0000:00:1d.0: reg 0x10: [mem 0xf7e3b000-0xf7e3b3ff] >[ 0.248718] pci 0000:00:1d.0: PME# supported from D0 D3hot D3cold >[ 0.248752] pci 0000:00:1d.0: System wakeup disabled by ACPI >[ 0.248863] pci 0000:00:1f.0: [8086:9c43] type 00 class 0x060100 >[ 0.249012] pci 0000:00:1f.2: [8086:9c03] type 00 class 0x010601 >[ 0.249024] pci 0000:00:1f.2: reg 0x10: [io 0xf0d0-0xf0d7] >[ 0.249029] pci 0000:00:1f.2: reg 0x14: [io 0xf0c0-0xf0c3] >[ 0.249034] pci 0000:00:1f.2: reg 0x18: [io 0xf0b0-0xf0b7] >[ 0.249039] pci 0000:00:1f.2: reg 0x1c: [io 0xf0a0-0xf0a3] >[ 0.249044] pci 0000:00:1f.2: reg 0x20: [io 0xf060-0xf07f] >[ 0.249050] pci 0000:00:1f.2: reg 0x24: [mem 0xf7e3a000-0xf7e3a7ff] >[ 0.249079] pci 0000:00:1f.2: PME# supported from D3hot >[ 0.249128] pci 0000:00:1f.3: [8086:9c22] type 00 class 0x0c0500 >[ 0.249138] pci 0000:00:1f.3: reg 0x10: [mem 0xf7e39000-0xf7e390ff 64bit] >[ 0.249154] pci 0000:00:1f.3: reg 0x20: [io 0xf040-0xf05f] >[ 0.249262] pci 0000:00:1c.0: PCI bridge to [bus 01] >[ 0.249521] pci 0000:02:00.0: [8086:08b1] type 00 class 0x028000 >[ 0.249556] pci 0000:02:00.0: reg 0x10: [mem 0xf7d00000-0xf7d01fff 64bit] >[ 0.249782] pci 0000:02:00.0: PME# supported from D0 D3hot D3cold >[ 0.249809] pci 0000:02:00.0: System wakeup disabled by ACPI >[ 0.251526] pci 0000:00:1c.3: PCI bridge to [bus 02] >[ 0.251623] pci 0000:00:1c.3: bridge window [mem 0xf7d00000-0xf7dfffff] >[ 0.253513] pci 0000:03:00.0: [1217:8520] type 00 class 0x080501 >[ 0.253533] pci 0000:03:00.0: reg 0x10: [mem 0xf7c01000-0xf7c01fff] >[ 0.253545] pci 0000:03:00.0: reg 0x14: [mem 0xf7c00000-0xf7c007ff] >[ 0.253679] pci 0000:03:00.0: PME# supported from D3hot D3cold >[ 0.253701] pci 0000:03:00.0: System wakeup disabled by ACPI >[ 0.259354] pci 0000:00:1c.4: PCI bridge to [bus 03] >[ 0.259445] pci 0000:00:1c.4: bridge window [mem 0xf7c00000-0xf7cfffff] >[ 0.259520] acpi PNP0A08:00: Disabling ASPM (FADT indicates it is unsupported) >[ 0.260913] ACPI: PCI Interrupt Link [LNKA] (IRQs 3 4 5 6 10 *11 12 14 15) >[ 0.261430] ACPI: PCI Interrupt Link [LNKB] (IRQs 3 4 5 6 *10 11 12 14 15) >[ 0.261948] ACPI: PCI Interrupt Link [LNKC] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled. >[ 0.262599] ACPI: PCI Interrupt Link [LNKD] (IRQs 3 4 5 6 *10 11 12 14 15) >[ 0.263138] ACPI: PCI Interrupt Link [LNKE] (IRQs 3 4 *5 6 10 11 12 14 15) >[ 0.263661] ACPI: PCI Interrupt Link [LNKF] (IRQs 3 4 5 6 10 *11 12 14 15) >[ 0.264167] ACPI: PCI Interrupt Link [LNKG] (IRQs *3 4 5 6 10 11 12 14 15) >[ 0.264675] ACPI: PCI Interrupt Link [LNKH] (IRQs 3 4 5 6 10 11 12 14 15) *0, disabled. >[ 0.266666] ACPI: Enabled 2 GPEs in block 00 to 7F >[ 0.266865] ACPI : EC: GPE = 0x27, I/O: command/status = 0x934, data = 0x930 >[ 0.267030] vgaarb: setting as boot device: PCI:0000:00:02.0 >[ 0.267118] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none >[ 0.267247] vgaarb: loaded >[ 0.267328] vgaarb: bridge control possible 0000:00:02.0 >[ 0.267478] SCSI subsystem initialized >[ 0.267602] libata version 3.00 loaded. >[ 0.267649] ACPI: bus type USB registered >[ 0.267755] usbcore: registered new interface driver usbfs >[ 0.267849] usbcore: registered new interface driver hub >[ 0.267949] usbcore: registered new device driver usb >[ 0.268062] media: Linux media interface: v0.10 >[ 0.268149] Linux video capture interface: v2.00 >[ 0.268235] pps_core: LinuxPPS API ver. 1 registered >[ 0.268317] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it> >[ 0.268448] PTP clock support registered >[ 0.268606] Advanced Linux Sound Architecture Driver Initialized. >[ 0.268692] PCI: Using ACPI for IRQ routing >[ 0.269875] PCI: pci_cache_line_size set to 64 bytes >[ 0.269907] e820: reserve RAM buffer [mem 0x0009d400-0x0009ffff] >[ 0.269908] e820: reserve RAM buffer [mem 0xcf611000-0xcfffffff] >[ 0.269909] e820: reserve RAM buffer [mem 0xd0001000-0xd3ffffff] >[ 0.269910] e820: reserve RAM buffer [mem 0xd7db4000-0xd7ffffff] >[ 0.269910] e820: reserve RAM buffer [mem 0xd875a000-0xdbffffff] >[ 0.269911] e820: reserve RAM buffer [mem 0xd8fae000-0xdbffffff] >[ 0.269912] e820: reserve RAM buffer [mem 0xda71c000-0xdbffffff] >[ 0.269913] e820: reserve RAM buffer [mem 0xdbcec000-0xdbffffff] >[ 0.269914] e820: reserve RAM buffer [mem 0x41ee00000-0x41fffffff] >[ 0.269999] Bluetooth: Core ver 2.20 >[ 0.270081] NET: Registered protocol family 31 >[ 0.270159] Bluetooth: HCI device and connection manager initialized >[ 0.270242] Bluetooth: HCI socket layer initialized >[ 0.270322] Bluetooth: L2CAP socket layer initialized >[ 0.270404] Bluetooth: SCO socket layer initialized >[ 0.270538] cfg80211: Calling CRDA to update world regulatory domain >[ 0.270629] NetLabel: Initializing >[ 0.270706] NetLabel: domain hash size = 128 >[ 0.270784] NetLabel: protocols = UNLABELED CIPSOv4 >[ 0.270871] NetLabel: unlabeled traffic allowed by default >[ 0.271013] hpet0: at MMIO 0xfed00000, IRQs 2, 8, 0, 0, 0, 0, 0, 0 >[ 0.271422] hpet0: 8 comparators, 64-bit 14.318180 MHz counter >[ 0.273520] Switched to clocksource hpet >[ 0.278874] FS-Cache: Loaded >[ 0.280188] pnp: PnP ACPI init >[ 0.280328] system 00:00: [mem 0xfed40000-0xfed44fff] has been reserved >[ 0.280413] system 00:00: Plug and Play ACPI device, IDs PNP0c01 (active) >[ 0.280597] system 00:01: [io 0x0680-0x069f] has been reserved >[ 0.280681] system 00:01: [io 0xffff] has been reserved >[ 0.280762] system 00:01: [io 0xffff] has been reserved >[ 0.280842] system 00:01: [io 0xffff] has been reserved >[ 0.280923] system 00:01: [io 0x1c00-0x1cfe] has been reserved >[ 0.281004] system 00:01: [io 0x1d00-0x1dfe] has been reserved >[ 0.281086] system 00:01: [io 0x1e00-0x1efe] has been reserved >[ 0.281167] system 00:01: [io 0x1f00-0x1ffe] has been reserved >[ 0.281249] system 00:01: [io 0x1800-0x18fe] could not be reserved >[ 0.281332] system 00:01: [io 0x164e-0x164f] has been reserved >[ 0.281414] system 00:01: Plug and Play ACPI device, IDs PNP0c02 (active) >[ 0.281434] pnp 00:02: Plug and Play ACPI device, IDs PNP0b00 (active) >[ 0.281463] system 00:03: [io 0x1854-0x1857] has been reserved >[ 0.281556] system 00:03: Plug and Play ACPI device, IDs INT3f0d PNP0c02 (active) >[ 0.281586] system 00:04: [io 0x04d0-0x04d1] has been reserved >[ 0.281670] system 00:04: Plug and Play ACPI device, IDs PNP0c02 (active) >[ 0.281692] pnp 00:05: Plug and Play ACPI device, IDs PNP0303 (active) >[ 0.281707] pnp 00:06: Plug and Play ACPI device, IDs DLL05cb PNP0f13 (active) >[ 0.282162] pnp 00:07: Plug and Play ACPI device, IDs PNP0401 (disabled) >[ 0.282337] system 00:08: Plug and Play ACPI device, IDs PNP0c02 (active) >[ 0.282502] system 00:09: [mem 0xfed1c000-0xfed1ffff] has been reserved >[ 0.282599] system 00:09: [mem 0xfed10000-0xfed17fff] has been reserved >[ 0.282682] system 00:09: [mem 0xfed18000-0xfed18fff] has been reserved >[ 0.282765] system 00:09: [mem 0xfed19000-0xfed19fff] has been reserved >[ 0.282848] system 00:09: [mem 0xf8000000-0xfbffffff] has been reserved >[ 0.282931] system 00:09: [mem 0xfed20000-0xfed3ffff] has been reserved >[ 0.283013] system 00:09: [mem 0xfed90000-0xfed93fff] has been reserved >[ 0.283096] system 00:09: [mem 0xfed45000-0xfed8ffff] has been reserved >[ 0.283179] system 00:09: [mem 0xff000000-0xffffffff] has been reserved >[ 0.283263] system 00:09: [mem 0xfee00000-0xfeefffff] could not be reserved >[ 0.283355] system 00:09: [mem 0xf7fdf000-0xf7fdffff] has been reserved >[ 0.283439] system 00:09: [mem 0xf7fe0000-0xf7feffff] has been reserved >[ 0.283532] system 00:09: Plug and Play ACPI device, IDs PNP0c02 (active) >[ 0.286665] pnp: PnP ACPI: found 10 devices >[ 0.291415] pci 0000:00:1c.0: PCI bridge to [bus 01] >[ 0.292337] pci 0000:00:1c.3: PCI bridge to [bus 02] >[ 0.292419] pci 0000:00:1c.3: bridge window [mem 0xf7d00000-0xf7dfffff] >[ 0.292506] pci 0000:00:1c.4: PCI bridge to [bus 03] >[ 0.292596] pci 0000:00:1c.4: bridge window [mem 0xf7c00000-0xf7cfffff] >[ 0.292684] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7 window] >[ 0.292686] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff window] >[ 0.292687] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff window] >[ 0.292688] pci_bus 0000:00: resource 7 [mem 0x000d0000-0x000d3fff window] >[ 0.292689] pci_bus 0000:00: resource 8 [mem 0x000d4000-0x000d7fff window] >[ 0.292690] pci_bus 0000:00: resource 9 [mem 0x000d8000-0x000dbfff window] >[ 0.292691] pci_bus 0000:00: resource 10 [mem 0x000dc000-0x000dffff window] >[ 0.292692] pci_bus 0000:00: resource 11 [mem 0x000e0000-0x000e3fff window] >[ 0.292693] pci_bus 0000:00: resource 12 [mem 0x000e4000-0x000e7fff window] >[ 0.292694] pci_bus 0000:00: resource 13 [mem 0xdf200000-0xfeafffff window] >[ 0.292696] pci_bus 0000:02: resource 1 [mem 0xf7d00000-0xf7dfffff] >[ 0.292697] pci_bus 0000:03: resource 1 [mem 0xf7c00000-0xf7cfffff] >[ 0.292717] NET: Registered protocol family 2 >[ 0.292936] TCP established hash table entries: 131072 (order: 8, 1048576 bytes) >[ 0.293201] TCP bind hash table entries: 65536 (order: 8, 1048576 bytes) >[ 0.293375] TCP: Hash tables configured (established 131072 bind 65536) >[ 0.293471] TCP: reno registered >[ 0.293573] UDP hash table entries: 8192 (order: 6, 262144 bytes) >[ 0.293697] UDP-Lite hash table entries: 8192 (order: 6, 262144 bytes) >[ 0.293835] NET: Registered protocol family 1 >[ 0.293961] RPC: Registered named UNIX socket transport module. >[ 0.294045] RPC: Registered udp transport module. >[ 0.294125] RPC: Registered tcp transport module. >[ 0.294206] RPC: Registered tcp NFSv4.1 backchannel transport module. >[ 0.294296] pci 0000:00:02.0: Video device with shadowed ROM >[ 0.294928] pci 0000:00:14.0: CONFIG_USB_XHCI_HCD is turned off, defaulting to EHCI. >[ 0.295053] pci 0000:00:14.0: USB 3.0 devices will work at USB 2.0 speeds. >[ 0.310607] PCI: CLS 64 bytes, default 64 >[ 0.310655] dmar: Host address width 39 >[ 0.310739] dmar: DRHD base: 0x000000fed90000 flags: 0x0 >[ 0.310832] dmar: IOMMU 0: reg_base_addr fed90000 ver 1:0 cap c0000020660462 ecap f0101a >[ 0.310961] dmar: DRHD base: 0x000000fed91000 flags: 0x1 >[ 0.311052] dmar: IOMMU 1: reg_base_addr fed91000 ver 1:0 cap d2008020660462 ecap f010da >[ 0.311181] dmar: RMRR base: 0x000000d7f19000 end: 0x000000d7f27fff >[ 0.311269] dmar: RMRR base: 0x000000dd000000 end: 0x000000df1fffff >[ 0.311364] PCI-DMA: Using software bounce buffering for IO (SWIOTLB) >[ 0.311453] software IO TLB [mem 0xd3db4000-0xd7db4000] (64MB) mapped at [ffff8800d3db4000-ffff8800d7db3fff] >[ 0.311776] RAPL PMU detected, hw unit 2^-14 Joules, API unit is 2^-32 Joules, 4 fixed counters 655360 ms ovfl timer >[ 0.311943] microcode: CPU0 sig=0x40651, pf=0x40, revision=0x1c >[ 0.312037] microcode: CPU1 sig=0x40651, pf=0x40, revision=0x1c >[ 0.312126] microcode: CPU2 sig=0x40651, pf=0x40, revision=0x1c >[ 0.312215] microcode: CPU3 sig=0x40651, pf=0x40, revision=0x1c >[ 0.312331] microcode: Microcode Update Driver: v2.00 <tigran@aivazian.fsnet.co.uk>, Peter Oruba >[ 0.312655] Scanning for low memory corruption every 60 seconds >[ 0.313028] AVX2 version of gcm_enc/dec engaged. >[ 0.313108] AES CTR mode by8 optimization enabled >[ 0.313408] sha1_ssse3: Using AVX2 optimized SHA-1 implementation >[ 0.313514] sha256_ssse3: Using AVX2 optimized SHA-256 implementation >[ 0.313628] sha512_ssse3: Using AVX2 optimized SHA-512 implementation >[ 0.314344] futex hash table entries: 1024 (order: 4, 65536 bytes) >[ 0.314444] audit: initializing netlink subsys (disabled) >[ 0.314543] audit: type=2000 audit(1434377646.303:1): initialized >[ 0.314791] HugeTLB registered 2 MB page size, pre-allocated 0 pages >[ 0.316013] VFS: Disk quotas dquot_6.5.2 >[ 0.316113] VFS: Dquot-cache hash table entries: 512 (order 0, 4096 bytes) >[ 0.316610] NFS: Registering the id_resolver key type >[ 0.316695] Key type id_resolver registered >[ 0.316773] Key type id_legacy registered >[ 0.316854] nfs4filelayout_init: NFSv4 File Layout Driver Registering... >[ 0.316976] FS-Cache: Netfs 'cifs' registered for caching >[ 0.317095] ntfs: driver 2.1.31 [Flags: R/W]. >[ 0.317230] fuse init (API version 7.23) >[ 0.317389] JFS: nTxBlock = 8192, nTxLock = 65536 >[ 0.318318] SGI XFS with security attributes, no debug enabled >[ 0.318625] SELinux: Registering netfilter hooks >[ 0.319144] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250) >[ 0.319268] io scheduler noop registered >[ 0.319346] io scheduler deadline registered >[ 0.319445] io scheduler cfq registered (default) >[ 0.319842] pci_hotplug: PCI Hot Plug PCI Core version: 0.5 >[ 0.319957] Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled >[ 0.320346] Non-volatile memory driver v1.3 >[ 0.320444] Linux agpgart interface v0.103 >[ 0.320578] intel_idle: MWAIT substates: 0x11142120 >[ 0.320580] intel_idle: v0.4 model 0x45 >[ 0.320581] intel_idle: lapic_timer_reliable_states 0xffffffff >[ 0.321576] ACPI: AC Adapter [AC] (on-line) >[ 0.321755] input: Lid Switch as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0D:00/input/input0 >[ 0.322463] ACPI: Lid Switch [LID0] >[ 0.322597] input: Power Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0C:00/input/input1 >[ 0.322742] ACPI: Power Button [PBTN] >[ 0.322878] input: Sleep Button as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0C0E:00/input/input2 >[ 0.323021] ACPI: Sleep Button [SBTN] >[ 0.323138] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input3 >[ 0.323270] ACPI: Power Button [PWRF] >[ 0.324154] thermal LNXTHERM:00: registered as thermal_zone0 >[ 0.324236] ACPI: Thermal Zone [THM] (25 C) >[ 0.324339] [drm] Initialized drm 1.1.0 20060810 >[ 0.324809] [drm:i915_dump_device_info] i915 device info: gen=7, pciid=0x0a16 rev=0x0b flags=is_mobile,need_gfx_hws,is_haswell,has_fbc,has_hotplug,has_llc,has_ddi,has_fpga_dbg, >[ 0.324817] [drm:intel_detect_pch] Found LynxPoint LP PCH >[ 0.324916] [drm] Memory usable by graphics device = 2048M >[ 0.324998] [drm:i915_gem_gtt_init] GMADR size = 256M >[ 0.324999] [drm:i915_gem_gtt_init] GTT stolen size = 32M >[ 0.324999] [drm:i915_gem_gtt_init] ppgtt mode: 1 >[ 0.325001] [drm] Replacing VGA console driver >[ 0.325753] Console: switching to colour dummy device 80x25 >[ 0.326222] [drm:intel_opregion_setup] graphic opregion physical addr: 0xda7f9018 >[ 0.326228] [drm:intel_opregion_setup] Public ACPI methods supported >[ 0.326228] [drm:intel_opregion_setup] SWSCI supported >[ 0.339761] ACPI: Battery Slot [BAT0] (battery present) >[ 0.340420] ACPI: Battery Slot [BAT1] (battery absent) >[ 0.377536] [drm:swsci] SWSCI request timed out >[ 0.377540] [drm:swsci] SWSCI request already in progress >[ 0.377541] [drm:swsci_setup] SWSCI GBDA callbacks 00000001, SBCB callbacks 00000001 >[ 0.377543] [drm:intel_opregion_setup] ASLE supported >[ 0.377600] [drm] Supports vblank timestamp caching Rev 2 (21.10.2013). >[ 0.377605] [drm] Driver supports precise vblank timestamp query. >[ 0.377609] [drm:init_vbt_defaults] Set default to SSC at 120000 kHz >[ 0.377611] [drm:validate_vbt] Using VBT from OpRegion: $VBT HASWELL d >[ 0.377613] [drm:parse_general_features] BDB_GENERAL_FEATURES int_tv_support 0 int_crt_support 0 lvds_use_ssc 1 lvds_ssc_freq 120000 display_clock_mode 0 fdi_rx_polarity_inverted 0 >[ 0.377615] [drm:parse_general_definitions] crt_ddc_bus_pin: 0 >[ 0.377617] [drm:parse_lfp_panel_data] DRRS supported mode is seamless >[ 0.377619] [drm:parse_lfp_panel_data] Found panel mode in BIOS VBT tables: >[ 0.377622] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x8 0xa >[ 0.377623] [drm:parse_lfp_panel_data] VBT initial LVDS value 20033c >[ 0.377625] [drm:parse_lfp_backlight] VBT backlight PWM modulation frequency 200 Hz, active high, min brightness 10, level 255 >[ 0.377627] [drm:parse_sdvo_panel_data] Found SDVO panel mode in BIOS VBT tables: >[ 0.377629] [drm:drm_mode_debug_printmodeline] Modeline 0:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x8 0xa >[ 0.377630] [drm:parse_sdvo_device_mapping] No SDVO device info is found in VBT >[ 0.377632] [drm:parse_driver_features] DRRS State Enabled:0 >[ 0.377634] [drm:parse_ddi_port] Port A VBT info: DP:1 HDMI:0 DVI:0 EDP:1 CRT:0 >[ 0.377636] [drm:parse_ddi_port] VBT HDMI level shift for port A: 0 >[ 0.377637] [drm:parse_ddi_port] Port B VBT info: DP:0 HDMI:1 DVI:1 EDP:0 CRT:0 >[ 0.377638] [drm:parse_ddi_port] VBT HDMI level shift for port B: 6 >[ 0.377639] [drm:parse_ddi_port] Port C VBT info: DP:1 HDMI:1 DVI:1 EDP:0 CRT:0 >[ 0.377640] [drm:parse_ddi_port] VBT HDMI level shift for port C: 6 >[ 0.377652] [drm:intel_dsm_pci_probe] no _DSM method for intel device >[ 0.377658] [drm:i915_gem_init_stolen] found 33554432 bytes of stolen memory at dd200000 >[ 0.377660] [drm:intel_display_power_get] enabling always-on >[ 0.377661] [drm:intel_display_power_get] enabling display >[ 0.377703] [drm:intel_print_wm_latency] Primary WM0 latency 20 (2.0 usec) >[ 0.377704] [drm:intel_print_wm_latency] Primary WM1 latency 4 (2.0 usec) >[ 0.377706] [drm:intel_print_wm_latency] Primary WM2 latency 36 (18.0 usec) >[ 0.377707] [drm:intel_print_wm_latency] Primary WM3 latency 90 (45.0 usec) >[ 0.377708] [drm:intel_print_wm_latency] Primary WM4 latency 160 (80.0 usec) >[ 0.377709] [drm:intel_print_wm_latency] Sprite WM0 latency 20 (2.0 usec) >[ 0.377711] [drm:intel_print_wm_latency] Sprite WM1 latency 4 (2.0 usec) >[ 0.377712] [drm:intel_print_wm_latency] Sprite WM2 latency 36 (18.0 usec) >[ 0.377713] [drm:intel_print_wm_latency] Sprite WM3 latency 90 (45.0 usec) >[ 0.377714] [drm:intel_print_wm_latency] Sprite WM4 latency 160 (80.0 usec) >[ 0.377715] [drm:intel_print_wm_latency] Cursor WM0 latency 20 (2.0 usec) >[ 0.377716] [drm:intel_print_wm_latency] Cursor WM1 latency 4 (2.0 usec) >[ 0.377717] [drm:intel_print_wm_latency] Cursor WM2 latency 36 (18.0 usec) >[ 0.377718] [drm:intel_print_wm_latency] Cursor WM3 latency 90 (45.0 usec) >[ 0.377720] [drm:intel_print_wm_latency] Cursor WM4 latency 160 (80.0 usec) >[ 0.377722] [drm:intel_modeset_init] 3 display pipes available. >[ 0.377738] [drm:intel_ddi_pll_init] CDCLK running at 450000KHz >[ 0.377740] vgaarb: device changed decodes: PCI:0000:00:02.0,olddecodes=io+mem,decodes=io+mem:owns=io+mem >[ 0.378053] [drm:intel_dp_init_connector] Adding eDP connector on port A >[ 0.378100] [drm:intel_dp_init_panel_power_sequencer] cur t1_t3 2000 t8 0 t9 2000 t10 500 t11_t12 6000 >[ 0.378102] [drm:intel_dp_init_panel_power_sequencer] vbt t1_t3 2000 t8 10 t9 2000 t10 500 t11_t12 5000 >[ 0.378103] [drm:intel_dp_init_panel_power_sequencer] panel power up delay 200, power down delay 50, power cycle delay 600 >[ 0.378104] [drm:intel_dp_init_panel_power_sequencer] backlight on delay 1, off delay 200 >[ 0.378106] [drm:intel_dp_aux_init] registering DPDDC-A bus for card0-eDP-1 >[ 0.378157] [drm:edp_panel_vdd_on] Turning eDP port A VDD on >[ 0.378165] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f >[ 0.378573] [drm:intel_dp_get_dpcd] DPCD: 11 0a 82 41 00 00 01 80 02 00 00 00 0f 0b 00 >[ 0.378869] [drm:intel_dp_get_dpcd] Detected EDP PSR Panel. >[ 0.378879] [drm:intel_dp_init_panel_power_sequencer_registers] panel power sequencer register settings: PP_ON 0x7d00001, PP_OFF 0x1f40001, PP_DIV 0x4af06 >[ 0.398180] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 0.398181] [drm:intel_dp_drrs_init] VBT doesn't support DRRS >[ 0.398185] [drm:intel_panel_setup_backlight] Connector eDP-1 backlight initialized, enabled, brightness 937/937 >[ 0.398240] [drm:intel_dp_init_connector] Adding DP connector on port C >[ 0.398261] [drm:intel_dp_aux_init] registering DPDDC-C bus for card0-DP-1 >[ 0.407540] [drm:intel_modeset_readout_hw_state] [CRTC:20] hw state readout: enabled >[ 0.407544] [drm:intel_modeset_readout_hw_state] [CRTC:24] hw state readout: disabled >[ 0.407546] [drm:intel_modeset_readout_hw_state] [CRTC:28] hw state readout: disabled >[ 0.407548] [drm:intel_modeset_readout_hw_state] WRPLL 1 hw state readout: crtc_mask 0x00000001, on 1 >[ 0.407550] [drm:intel_modeset_readout_hw_state] WRPLL 2 hw state readout: crtc_mask 0x00000000, on 0 >[ 0.407555] [drm:intel_modeset_readout_hw_state] [ENCODER:30:TMDS-30] hw state readout: enabled, pipe A >[ 0.407556] [drm:intel_modeset_readout_hw_state] [ENCODER:39:TMDS-39] hw state readout: disabled, pipe A >[ 0.407558] [drm:intel_modeset_readout_hw_state] [ENCODER:42:TMDS-42] hw state readout: disabled, pipe A >[ 0.407559] [drm:intel_modeset_readout_hw_state] [ENCODER:44:DP MST-44] hw state readout: disabled, pipe A >[ 0.407561] [drm:intel_modeset_readout_hw_state] [ENCODER:45:DP MST-45] hw state readout: disabled, pipe B >[ 0.407562] [drm:intel_modeset_readout_hw_state] [ENCODER:46:DP MST-46] hw state readout: disabled, pipe C >[ 0.407564] [drm:intel_modeset_readout_hw_state] [CONNECTOR:31:eDP-1] hw state readout: enabled >[ 0.407566] [drm:intel_modeset_readout_hw_state] [CONNECTOR:40:HDMI-A-1] hw state readout: disabled >[ 0.407567] [drm:intel_modeset_readout_hw_state] [CONNECTOR:43:DP-1] hw state readout: disabled >[ 0.407569] [drm:intel_modeset_readout_hw_state] [CONNECTOR:47:HDMI-A-2] hw state readout: disabled >[ 0.407572] [drm:intel_dump_pipe_config] [CRTC:20][setup_hw_state] config for pipe A >[ 0.407574] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 0.407575] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 0 >[ 0.407576] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 0.407578] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4860009, gmch_n: 8388608, link_m: 270000, link_n: 524288, tu: 64 >[ 0.407579] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 0.407580] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 0.407581] [drm:intel_dump_pipe_config] requested mode: >[ 0.407584] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 720 0 0 0 400 0 0 0 0x0 0x0 >[ 0.407585] [drm:intel_dump_pipe_config] adjusted mode: >[ 0.407586] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x9 >[ 0.407589] [drm:intel_dump_crtc_timings] crtc timings: 139045 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x0 flags: 0x9 >[ 0.407590] [drm:intel_dump_pipe_config] port clock: 270000 >[ 0.407591] [drm:intel_dump_pipe_config] pipe src size: 720x400 >[ 0.407592] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 0.407593] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x07800438, enabled >[ 0.407594] [drm:intel_dump_pipe_config] ips: 0 >[ 0.407595] [drm:intel_dump_pipe_config] double wide: 0 >[ 0.407598] [drm:i915_get_vblank_timestamp] crtc 1 is disabled >[ 0.407599] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B >[ 0.407600] [drm:i915_get_vblank_timestamp] crtc 1 is disabled >[ 0.407602] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe B >[ 0.407603] [drm:intel_dump_pipe_config] [CRTC:24][setup_hw_state] config for pipe B >[ 0.407604] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 0.407605] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0 >[ 0.407607] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 0.407608] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 0.407610] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 0.407611] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 0.407611] [drm:intel_dump_pipe_config] requested mode: >[ 0.407613] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 >[ 0.407614] [drm:intel_dump_pipe_config] adjusted mode: >[ 0.407616] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 >[ 0.407618] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 >[ 0.407619] [drm:intel_dump_pipe_config] port clock: 0 >[ 0.407620] [drm:intel_dump_pipe_config] pipe src size: 0x0 >[ 0.407621] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 0.407622] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 0.407623] [drm:intel_dump_pipe_config] ips: 0 >[ 0.407624] [drm:intel_dump_pipe_config] double wide: 0 >[ 0.407625] [drm:i915_get_vblank_timestamp] crtc 2 is disabled >[ 0.407627] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C >[ 0.407628] [drm:i915_get_vblank_timestamp] crtc 2 is disabled >[ 0.407629] [drm:gm45_get_vblank_counter] trying to get vblank count for disabled pipe C >[ 0.407630] [drm:intel_dump_pipe_config] [CRTC:28][setup_hw_state] config for pipe C >[ 0.407631] [drm:intel_dump_pipe_config] cpu_transcoder: C >[ 0.407632] [drm:intel_dump_pipe_config] pipe bpp: 0, dithering: 0 >[ 0.407634] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 0.407635] [drm:intel_dump_pipe_config] dp: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 0.407636] [drm:intel_dump_pipe_config] dp: 0, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 0.407637] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 0.407638] [drm:intel_dump_pipe_config] requested mode: >[ 0.407640] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 >[ 0.407641] [drm:intel_dump_pipe_config] adjusted mode: >[ 0.407642] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 >[ 0.407644] [drm:intel_dump_crtc_timings] crtc timings: 0 0 0 0 0 0 0 0 0, type: 0x0 flags: 0x0 >[ 0.407645] [drm:intel_dump_pipe_config] port clock: 0 >[ 0.407646] [drm:intel_dump_pipe_config] pipe src size: 0x0 >[ 0.407647] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 0.407648] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 0.407649] [drm:intel_dump_pipe_config] ips: 0 >[ 0.407650] [drm:intel_dump_pipe_config] double wide: 0 >[ 0.407655] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1] >[ 0.407658] [drm:check_encoder_state] [ENCODER:30:TMDS-30] >[ 0.407659] [drm:check_encoder_state] [ENCODER:39:TMDS-39] >[ 0.407661] [drm:check_encoder_state] [ENCODER:42:TMDS-42] >[ 0.407662] [drm:check_encoder_state] [ENCODER:44:DP MST-44] >[ 0.407663] [drm:check_encoder_state] [ENCODER:45:DP MST-45] >[ 0.407664] [drm:check_encoder_state] [ENCODER:46:DP MST-46] >[ 0.407665] [drm:check_crtc_state] [CRTC:20] >[ 0.407671] [drm:check_crtc_state] [CRTC:24] >[ 0.407673] [drm:check_crtc_state] [CRTC:28] >[ 0.407674] [drm:check_shared_dpll_state] WRPLL 1 >[ 0.407676] [drm:check_shared_dpll_state] WRPLL 2 >[ 0.407740] [drm:i915_gem_setup_global_gtt] clearing unused GTT space: [0, 7ffff000] >[ 0.409376] [drm:gen6_ppgtt_init] Allocated pde space (2M) at GTT entry: 7fdf0 >[ 0.409401] [drm:i915_gem_context_init] HW context support initialized >[ 0.409406] [drm:init_status_page] render ring hws offset: 0x00011000 >[ 0.409440] [drm:intel_init_pipe_control] render ring pipe control offset: 0x00032000 >[ 0.409443] [drm:init_status_page] bsd ring hws offset: 0x00033000 >[ 0.409470] [drm:init_status_page] blitter ring hws offset: 0x00054000 >[ 0.409499] [drm:init_status_page] video enhancement ring hws offset: 0x00075000 >[ 0.411665] [drm:intel_backlight_device_register] Connector eDP-1 backlight sysfs interface registered >[ 0.411694] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 0.411697] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 0.412009] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 0.412316] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 0.412321] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] status updated from 3 to 1 >[ 0.412329] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 0.412332] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 0.412335] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 0.412336] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 0.412338] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 0.412493] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 0.412495] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 0.412497] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] status updated from 3 to 2 >[ 0.412499] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 0.412500] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 0.412501] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 0.413446] [drm:intel_dp_get_dpcd] DPCD: 12 14 c4 01 01 01 01 81 02 00 06 00 00 00 00 >[ 0.413448] [drm:intel_dp_get_dpcd] Displayport TPS3 supported >[ 0.414174] ACPI: Video Device [GFX0] (multi-head: yes rom: no post: no) >[ 0.414516] input: Video Bus as /devices/LNXSYSTM:00/LNXSYBUS:00/PNP0A08:00/LNXVIDEO:00/input/input4 >[ 0.414541] [drm] Initialized i915 1.6.0 20150130 for 0000:00:02.0 on minor 0 >[ 0.415378] loop: module loaded >[ 0.415454] ahci 0000:00:1f.2: version 3.0 >[ 0.415567] ahci 0000:00:1f.2: SSS flag set, parallel bus scan disabled >[ 0.416119] [drm:intel_dp_probe_oui] Sink OUI: 00e04c >[ 0.416961] [drm:intel_dp_probe_oui] Branch OUI: 00e04c >[ 0.417786] [drm:intel_dp_probe_mst] Sink is MST capable >[ 0.426520] ahci 0000:00:1f.2: AHCI 0001.0300 32 slots 3 ports 6 Gbps 0x3 impl SATA mode >[ 0.426528] ahci 0000:00:1f.2: flags: 64bit ncq ilck stag led clo only pio slum part sxs deso sadm sds apst >[ 0.426844] scsi host0: ahci >[ 0.426961] scsi host1: ahci >[ 0.427043] scsi host2: ahci >[ 0.427084] ata1: SATA max UDMA/133 abar m2048@0xf7e3a000 port 0xf7e3a100 irq 41 >[ 0.427090] ata2: SATA max UDMA/133 abar m2048@0xf7e3a000 port 0xf7e3a180 irq 41 >[ 0.427095] ata3: DUMMY >[ 0.427181] tun: Universal TUN/TAP device driver, 1.6 >[ 0.427185] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com> >[ 0.427249] e100: Intel(R) PRO/100 Network Driver, 3.5.24-k2-NAPI >[ 0.427253] e100: Copyright(c) 1999-2006 Intel Corporation >[ 0.427276] e1000: Intel(R) PRO/1000 Network Driver - version 7.3.21-k8-NAPI >[ 0.427279] e1000: Copyright (c) 1999-2006 Intel Corporation. >[ 0.427300] e1000e: Intel(R) PRO/1000 Network Driver - 2.3.2-k >[ 0.427303] e1000e: Copyright(c) 1999 - 2014 Intel Corporation. >[ 0.427432] e1000e 0000:00:19.0: Interrupt Throttling Rate (ints/sec) set to dynamic conservative mode >[ 0.443391] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] status updated from 3 to 2 >[ 0.443394] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 0.443396] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 0.443397] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 0.443559] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 0.443562] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 0.443564] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] status updated from 3 to 2 >[ 0.443566] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 0.443570] [drm:drm_setup_crtcs] >[ 0.443572] [drm:drm_enable_connectors] connector 31 enabled? yes >[ 0.443574] [drm:drm_enable_connectors] connector 40 enabled? no >[ 0.443575] [drm:drm_enable_connectors] connector 43 enabled? no >[ 0.443576] [drm:drm_enable_connectors] connector 47 enabled? no >[ 0.443579] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1 >[ 0.443580] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0 >[ 0.443583] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080 >[ 0.443584] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping >[ 0.443586] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping >[ 0.443587] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping >[ 0.443589] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0) >[ 0.443592] [drm:intelfb_create] no BIOS fb, allocating a new one >[ 0.443594] [drm:i915_gem_object_create_stolen] creating stolen object: size=7e9000 >[ 0.443597] [drm:i915_pages_create_for_stolen] offset=0x0, size=8294400 >[ 0.444257] [drm:intelfb_create] allocated 1920x1080 fb: 0x00096000, bo ffff88040b759500 >[ 0.444286] [drm:drm_fb_helper_hotplug_event] >[ 0.444288] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 0.444290] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 0.444334] fbcon: inteldrmfb (fb0) is primary device >[ 0.444596] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 0.444895] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 0.444901] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 0.444903] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 0.444904] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 0.444905] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 0.444905] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 0.445058] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 0.445059] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 0.445059] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 0.445060] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 0.445060] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 0.445061] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 0.445061] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 0.445061] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 0.445248] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 0.445248] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 0.445259] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 0.445263] [drm:drm_setup_crtcs] >[ 0.445264] [drm:drm_enable_connectors] connector 31 enabled? yes >[ 0.445265] [drm:drm_enable_connectors] connector 40 enabled? no >[ 0.445265] [drm:drm_enable_connectors] connector 43 enabled? no >[ 0.445265] [drm:drm_enable_connectors] connector 47 enabled? no >[ 0.445266] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1 >[ 0.445277] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0 >[ 0.445278] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080 >[ 0.445278] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping >[ 0.445279] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping >[ 0.445279] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping >[ 0.445280] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0) >[ 0.445282] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445284] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800dba00300 state to ffff88040bf4e540 >[ 0.445285] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445286] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445287] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445288] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445288] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445289] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800dba003c0 state to ffff88040bf4e540 >[ 0.445290] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445290] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445291] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445291] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445292] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445292] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800dba00480 state to ffff88040bf4e540 >[ 0.445293] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445293] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445294] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445294] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445295] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445296] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800dba00540 state to ffff88040bf4e540 >[ 0.445296] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445297] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445297] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445297] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445298] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445299] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800dba00600 state to ffff88040bf4e540 >[ 0.445299] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445300] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445300] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445300] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445301] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445302] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800dba006c0 state to ffff88040bf4e540 >[ 0.445302] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445303] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445303] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445304] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445304] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445305] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800dba00780 state to ffff88040bf4e540 >[ 0.445305] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445306] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445306] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445307] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445307] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445308] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800dba00840 state to ffff88040bf4e540 >[ 0.445308] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445309] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445309] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445310] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445310] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e540 >[ 0.445311] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8800dba00900 state to ffff88040bf4e540 >[ 0.445311] [drm:drm_atomic_check_only] checking ffff88040bf4e540 >[ 0.445312] [drm:drm_atomic_commit] commiting ffff88040bf4e540 >[ 0.445312] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e540 >[ 0.445313] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e540 >[ 0.445314] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 0.445315] [drm:intel_set_config_compute_mode_changes] crtc has no fb, will flip >[ 0.445315] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set >[ 0.445316] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 >[ 0.445318] [drm:drm_mode_debug_printmodeline] Modeline 33:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 0.445318] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1 >[ 0.445319] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 0.445320] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 0.445321] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 0.445322] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 0.445323] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 0.445324] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 0.445324] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 0.445325] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 0.445326] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 0.445327] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 0.445327] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 0.445328] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 0.445328] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 0.445329] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 0.445329] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 0.445330] [drm:intel_dump_pipe_config] requested mode: >[ 0.445331] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 0.445331] [drm:intel_dump_pipe_config] adjusted mode: >[ 0.445332] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 0.445333] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 0.445333] [drm:intel_dump_pipe_config] port clock: 270000 >[ 0.445334] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 0.445334] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 0.445335] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 0.445335] [drm:intel_dump_pipe_config] ips: 1 >[ 0.445335] [drm:intel_dump_pipe_config] double wide: 0 >[ 0.445340] [drm:intel_edp_backlight_off] >[ 0.645440] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 >[ 0.647602] [drm:edp_panel_off] Turn eDP port A panel power off >[ 0.647605] [drm:wait_panel_off] Wait for panel power off time >[ 0.647609] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 >[ 0.702438] [drm:wait_panel_status] Wait complete >[ 0.702443] [drm:intel_fbc_update] no output, disabling >[ 0.702445] [drm:intel_disable_shared_dpll] disable WRPLL 1 (active 1, on? 1) for crtc 20 >[ 0.702447] [drm:intel_disable_shared_dpll] disabling WRPLL 1 >[ 0.702452] [drm:intel_display_power_put] disabling display >[ 0.702453] [drm:hsw_set_power_well] Requesting to disable the power well >[ 0.702456] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff8800dba00a80 >[ 0.702473] [drm:edp_panel_on] Turn eDP port A panel power on >[ 0.702475] [drm:wait_panel_power_cycle] Wait for panel power cycle >[ 0.731435] ata1: SATA link down (SStatus 0 SControl 300) >[ 0.846884] e1000e 0000:00:19.0 eth0: registered PHC clock >[ 0.846886] e1000e 0000:00:19.0 eth0: (PCI Express:2.5GT/s:Width x1) f0:1f:af:4b:a2:b4 >[ 0.846888] e1000e 0000:00:19.0 eth0: Intel(R) PRO/1000 Network Connection >[ 0.846923] e1000e 0000:00:19.0 eth0: MAC: 11, PHY: 12, PBA No: FFFFFF-0FF >[ 0.846948] igb: Intel(R) Gigabit Ethernet Network Driver - version 5.2.15-k >[ 0.846949] igb: Copyright (c) 2007-2014 Intel Corporation. >[ 0.846969] igbvf: Intel(R) Gigabit Virtual Function Network Driver - version 2.0.2-k >[ 0.846969] igbvf: Copyright (c) 2009 - 2012 Intel Corporation. >[ 0.846986] ixgbe: Intel(R) 10 Gigabit PCI Express Network Driver - version 4.0.1-k >[ 0.846986] ixgbe: Copyright (c) 1999-2014 Intel Corporation. >[ 0.847011] ixgbevf: Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver - version 2.12.1-k >[ 0.847011] ixgbevf: Copyright (c) 2009 - 2012 Intel Corporation. >[ 0.847029] ixgb: Intel(R) PRO/10GbE Network Driver - version 1.0.135-k2-NAPI >[ 0.847030] ixgb: Copyright (c) 1999-2008 Intel Corporation. >[ 0.847049] sky2: driver version 1.30 >[ 0.847098] PPP generic driver version 2.4.2 >[ 0.847141] PPP BSD Compression module registered >[ 0.847144] PPP Deflate Compression module registered >[ 0.847153] PPP MPPE Compression module registered >[ 0.847158] NET: Registered protocol family 24 >[ 0.847166] Intel(R) Wireless WiFi driver for Linux >[ 0.847166] Copyright(c) 2003- 2014 Intel Corporation >[ 0.847512] iwlwifi 0000:02:00.0: loaded firmware version 25.16.12.0 op_mode iwlmvm >[ 0.847554] iwlwifi 0000:02:00.0: Detected Intel(R) Dual Band Wireless AC 7260, REV=0x144 >[ 0.847603] iwlwifi 0000:02:00.0: L1 Disabled - LTR Enabled >[ 0.847821] iwlwifi 0000:02:00.0: L1 Disabled - LTR Enabled >[ 1.050021] ieee80211 phy0: Selected rate control algorithm 'iwl-mvm-rs' >[ 1.050176] usbcore: registered new interface driver asix >[ 1.050191] usbcore: registered new interface driver ax88179_178a >[ 1.050202] usbcore: registered new interface driver cdc_ether >[ 1.050212] usbcore: registered new interface driver cdc_eem >[ 1.050222] usbcore: registered new interface driver net1080 >[ 1.050236] usbcore: registered new interface driver rndis_host >[ 1.050260] usbcore: registered new interface driver cdc_subset >[ 1.050274] usbcore: registered new interface driver zaurus >[ 1.050291] usbcore: registered new interface driver kalmia >[ 1.050302] usbcore: registered new interface driver cdc_ncm >[ 1.050389] ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver >[ 1.050392] ehci-pci: EHCI PCI platform driver >[ 1.050519] ehci-pci 0000:00:1d.0: EHCI Host Controller >[ 1.050560] ehci-pci 0000:00:1d.0: new USB bus registered, assigned bus number 1 >[ 1.050571] ehci-pci 0000:00:1d.0: debug port 2 >[ 1.054473] ehci-pci 0000:00:1d.0: cache line size of 64 is not supported >[ 1.054484] ehci-pci 0000:00:1d.0: irq 21, io mem 0xf7e3b000 >[ 1.060268] ehci-pci 0000:00:1d.0: USB 2.0 started, EHCI 1.00 >[ 1.060295] usb usb1: New USB device found, idVendor=1d6b, idProduct=0002 >[ 1.060297] usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1 >[ 1.060298] usb usb1: Product: EHCI Host Controller >[ 1.060299] usb usb1: Manufacturer: Linux 4.0.5-gentoo ehci_hcd >[ 1.060299] usb usb1: SerialNumber: 0000:00:1d.0 >[ 1.060432] hub 1-0:1.0: USB hub found >[ 1.060436] hub 1-0:1.0: 2 ports detected >[ 1.060545] ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver >[ 1.060551] ohci-pci: OHCI PCI platform driver >[ 1.060564] uhci_hcd: USB Universal Host Controller Interface driver >[ 1.060596] usbcore: registered new interface driver usblp >[ 1.060618] usbcore: registered new interface driver usb-storage >[ 1.060650] i8042: PNP: PS/2 Controller [PNP0303:PS2K,PNP0f13:PS2M] at 0x60,0x64 irq 1,12 >[ 1.061179] i8042: Warning: Keylock active >[ 1.063573] serio: i8042 KBD port at 0x60,0x64 irq 1 >[ 1.063575] serio: i8042 AUX port at 0x60,0x64 irq 12 >[ 1.063689] mousedev: PS/2 mouse device common for all mice >[ 1.063931] rtc_cmos 00:02: RTC can wake from S4 >[ 1.064036] rtc_cmos 00:02: rtc core: registered rtc_cmos as rtc0 >[ 1.064062] rtc_cmos 00:02: alarms up to one month, y3k, 242 bytes nvram, hpet irqs >[ 1.064129] ACPI Warning: SystemIO range 0x000000000000F040-0x000000000000F05F conflicts with OpRegion 0x000000000000F040-0x000000000000F04F (\_SB_.PCI0.SBUS.SMBI) (20150204/utaddress-254) >[ 1.064130] ACPI: If an ACPI driver is available for this device, you should use it instead of the native driver >[ 1.064198] device-mapper: ioctl: 4.30.0-ioctl (2014-12-22) initialised: dm-devel@redhat.com >[ 1.064214] usbcore: registered new interface driver btusb >[ 1.064216] Bluetooth: Generic Bluetooth SDIO driver ver 0.1 >[ 1.064229] Intel P-state driver initializing. >[ 1.064355] Driver 'mmcblk' needs updating - please use bus_type methods >[ 1.064375] sdhci: Secure Digital Host Controller Interface driver >[ 1.064376] sdhci: Copyright(c) Pierre Ossman >[ 1.064413] sdhci-pci 0000:03:00.0: SDHCI controller found [1217:8520] (rev 1) >[ 1.064613] mmc0: Unknown controller version (3). You may experience problems. >[ 1.064625] sdhci-pci 0000:03:00.0: No vmmc regulator found >[ 1.064627] sdhci-pci 0000:03:00.0: No vqmmc regulator found >[ 1.065436] input: AT Translated Set 2 keyboard as /devices/platform/i8042/serio0/input/input5 >[ 1.066259] mmc0: SDHCI controller on PCI [0000:03:00.0] using ADMA >[ 1.066374] usbcore: registered new interface driver ushc >[ 1.066380] sdhci-pltfm: SDHCI platform and OF driver helper >[ 1.066489] dcdbas dcdbas: Dell Systems Management Base Driver (version 5.6.0-3.2) >[ 1.066549] hidraw: raw HID events driver (C) Jiri Kosina >[ 1.067291] usbcore: registered new interface driver usbhid >[ 1.067292] usbhid: USB HID core driver >[ 1.085426] Netfilter messages via NETLINK v0.30. >[ 1.085431] nf_conntrack version 0.5.0 (65536 buckets, 262144 max) >[ 1.085533] ctnetlink v0.93: registering with nfnetlink. >[ 1.085602] ip_tables: (C) 2000-2006 Netfilter Core Team >[ 1.085614] TCP: cubic registered >[ 1.085615] Initializing XFRM netlink socket >[ 1.085717] NET: Registered protocol family 10 >[ 1.085781] snd_hda_intel 0000:00:03.0: bound 0000:00:02.0 (ops 0xffffffff81efd5e0) >[ 1.085845] [drm:intel_display_power_get] enabling display >[ 1.085847] [drm:hsw_set_power_well] Enabling power well >[ 1.085921] ip6_tables: (C) 2000-2006 Netfilter Core Team >[ 1.085946] sit: IPv6 over IPv4 tunneling driver >[ 1.086035] NET: Registered protocol family 17 >[ 1.086056] Bluetooth: RFCOMM TTY layer initialized >[ 1.086058] Bluetooth: RFCOMM socket layer initialized >[ 1.086065] Bluetooth: RFCOMM ver 1.11 >[ 1.086080] Key type dns_resolver registered >[ 1.086339] registered taskstats version 1 >[ 1.086669] Btrfs loaded >[ 1.086965] Magic number: 3:778:232 >[ 1.086999] acpi device:4c: hash matches >[ 1.087003] acpi NTRG0001:00: hash matches >[ 1.093716] sound hdaudioC1D0: autoconfig for ALC3226: line_outs=1 (0x16/0x0/0x0/0x0/0x0) type:line >[ 1.093717] sound hdaudioC1D0: speaker_outs=1 (0x14/0x0/0x0/0x0/0x0) >[ 1.093717] sound hdaudioC1D0: hp_outs=1 (0x15/0x0/0x0/0x0/0x0) >[ 1.093718] sound hdaudioC1D0: mono: mono_out=0x0 >[ 1.093718] sound hdaudioC1D0: inputs: >[ 1.093719] sound hdaudioC1D0: Dock Mic=0x19 >[ 1.093720] sound hdaudioC1D0: Headset Mic=0x1a >[ 1.093721] sound hdaudioC1D0: Internal Mic=0x12 >[ 1.099153] snd_hda_intel 0000:00:03.0: Too many HDMI devices >[ 1.099153] snd_hda_intel 0000:00:03.0: Consider building the kernel with CONFIG_SND_DYNAMIC_MINORS=y >[ 1.099438] input: HDA Intel HDMI HDMI/DP,pcm=3 as /devices/pci0000:00/0000:00:03.0/sound/card0/input11 >[ 1.099472] input: HDA Intel HDMI HDMI/DP,pcm=7 as /devices/pci0000:00/0000:00:03.0/sound/card0/input12 >[ 1.099504] input: HDA Intel HDMI HDMI/DP as /devices/pci0000:00/0000:00:03.0/sound/card0/input13 >[ 1.099730] input: HDA Intel PCH Dock Mic as /devices/pci0000:00/0000:00:1b.0/sound/card1/input8 >[ 1.099763] input: HDA Intel PCH Dock Line Out as /devices/pci0000:00/0000:00:1b.0/sound/card1/input9 >[ 1.099795] input: HDA Intel PCH Front Headphone as /devices/pci0000:00/0000:00:1b.0/sound/card1/input10 >[ 1.172836] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.172837] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.172856] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.248245] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 >[ 1.248247] [drm:wait_panel_status] Wait complete >[ 1.248250] [drm:wait_panel_on] Wait for panel power on >[ 1.248253] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 >[ 1.313222] tsc: Refined TSC clocksource calibration: 2693.764 MHz >[ 1.362215] usb 1-1: new high-speed USB device number 2 using ehci-pci >[ 1.457168] [drm:wait_panel_status] Wait complete >[ 1.457176] [drm:edp_panel_vdd_on] Turning eDP port A VDD on >[ 1.457182] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b >[ 1.458201] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.458514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.461488] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.462506] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.462507] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.462885] [drm:intel_dp_start_link_train] clock recovery OK >[ 1.463325] [drm:intel_dp_check_mst_status] got esi2 41 10 00 >[ 1.463326] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.464381] [drm:drm_dp_send_link_address] link address reply: 3 >[ 1.464383] [drm:drm_dp_send_link_address] port 0: input 1, pdt: 1, pn: 0, dpcd_rev: 00, mcs: 1, ddps: 1, ldps 0, sdp 0/0 >[ 1.464384] [drm:drm_dp_send_link_address] port 1: input 0, pdt: 3, pn: 8, dpcd_rev: 12, mcs: 0, ddps: 1, ldps 0, sdp 1/1 >[ 1.464385] [drm:drm_dp_send_link_address] port 2: input 0, pdt: 0, pn: 1, dpcd_rev: 00, mcs: 0, ddps: 0, ldps 0, sdp 0/0 >[ 1.466161] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful >[ 1.467009] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.467009] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.467012] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.467155] [drm:intel_edp_backlight_on] >[ 1.467156] [drm:intel_panel_enable_backlight] pipe A >[ 1.467163] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 1.467989] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.467996] [drm:intel_psr_match_conditions] PSR disable by flag >[ 1.467997] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS >[ 1.468000] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 1.476579] usb 1-1: New USB device found, idVendor=8087, idProduct=8000 >[ 1.476580] usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0 >[ 1.476936] hub 1-1:1.0: USB hub found >[ 1.476996] hub 1-1:1.0: 8 ports detected >[ 1.489071] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.489072] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.489095] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.489971] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.490524] [drm:drm_dp_send_enum_path_resources] enum path resources 8: 2560 2560 >[ 1.492741] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.492742] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.501155] [drm:intel_fbc_update] disabled per chip default >[ 1.501163] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1] >[ 1.501166] [drm:check_encoder_state] [ENCODER:30:TMDS-30] >[ 1.501167] [drm:check_encoder_state] [ENCODER:39:TMDS-39] >[ 1.501168] [drm:check_encoder_state] [ENCODER:42:TMDS-42] >[ 1.501169] [drm:check_encoder_state] [ENCODER:44:DP MST-44] >[ 1.501169] [drm:check_encoder_state] [ENCODER:45:DP MST-45] >[ 1.501170] [drm:check_encoder_state] [ENCODER:46:DP MST-46] >[ 1.501171] [drm:check_crtc_state] [CRTC:20] >[ 1.501178] [drm:check_crtc_state] [CRTC:24] >[ 1.501179] [drm:check_crtc_state] [CRTC:28] >[ 1.501180] [drm:check_shared_dpll_state] WRPLL 1 >[ 1.501181] [drm:check_shared_dpll_state] WRPLL 2 >[ 1.501184] [drm:intel_crtc_set_config] [CRTC:24] [NOFB] >[ 1.501187] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0 >[ 1.501188] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.501190] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 1.501191] [drm:intel_crtc_set_config] [CRTC:28] [NOFB] >[ 1.501192] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0 >[ 1.501193] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.501193] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 1.501209] [drm:drm_fb_helper_hotplug_event] >[ 1.501211] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 1.501211] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 1.501526] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 1.501829] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 1.501838] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 1.501840] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 1.501842] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.501843] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 1.501844] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 1.502032] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 1.502033] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 1.502034] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 1.502035] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 1.502035] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 1.502036] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 1.502037] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 1.502037] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 1.502261] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 1.502262] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 1.502263] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 1.502267] [drm:drm_setup_crtcs] >[ 1.502269] [drm:drm_enable_connectors] connector 31 enabled? yes >[ 1.502269] [drm:drm_enable_connectors] connector 40 enabled? no >[ 1.502270] [drm:drm_enable_connectors] connector 43 enabled? no >[ 1.502270] [drm:drm_enable_connectors] connector 47 enabled? no >[ 1.502272] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1 >[ 1.502272] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0 >[ 1.502274] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080 >[ 1.502274] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping >[ 1.502275] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping >[ 1.502275] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping >[ 1.502276] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0) >[ 1.502282] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502284] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800dbbf0cc0 state to ffff88040bf4e120 >[ 1.502286] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800dbbdc400 state to ffff88040bf4e120 >[ 1.502286] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502289] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502302] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 1.502306] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502307] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502308] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502309] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800dbbf0d80 state to ffff88040bf4e120 >[ 1.502310] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502310] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502311] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502312] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502313] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502314] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800dbbf0e40 state to ffff88040bf4e120 >[ 1.502314] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502315] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502316] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502317] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502318] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502318] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800dbbf0f00 state to ffff88040bf4e120 >[ 1.502319] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502320] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502320] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502321] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502322] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502323] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800dba00540 state to ffff88040bf4e120 >[ 1.502324] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502324] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502325] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502326] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502327] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502327] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800dba00600 state to ffff88040bf4e120 >[ 1.502328] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502328] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502329] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502330] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502331] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502331] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800dba006c0 state to ffff88040bf4e120 >[ 1.502332] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502333] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502333] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502334] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502335] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502336] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800dba00780 state to ffff88040bf4e120 >[ 1.502336] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502337] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502338] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502338] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502339] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040bf4e120 >[ 1.502340] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8800dba00840 state to ffff88040bf4e120 >[ 1.502341] [drm:drm_atomic_check_only] checking ffff88040bf4e120 >[ 1.502341] [drm:drm_atomic_commit] commiting ffff88040bf4e120 >[ 1.502342] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040bf4e120 >[ 1.502343] [drm:drm_atomic_state_free] Freeing atomic state ffff88040bf4e120 >[ 1.502344] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 1.502345] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 1.502346] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.502348] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 1.502349] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 1.502350] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 1.502352] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 1.502353] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 1.502354] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 1.502355] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 1.502356] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 1.502356] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 1.502357] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 1.502358] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 1.502359] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 1.502360] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 1.502361] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 1.502361] [drm:intel_dump_pipe_config] requested mode: >[ 1.502363] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.502363] [drm:intel_dump_pipe_config] adjusted mode: >[ 1.502365] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.502366] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 1.502367] [drm:intel_dump_pipe_config] port clock: 270000 >[ 1.502367] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 1.502368] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 1.502369] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 1.502369] [drm:intel_dump_pipe_config] ips: 1 >[ 1.502370] [drm:intel_dump_pipe_config] double wide: 0 >[ 1.502371] [drm:intel_crtc_set_config] [CRTC:24] [NOFB] >[ 1.502372] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0 >[ 1.502373] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.502374] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 1.502374] [drm:intel_crtc_set_config] [CRTC:28] [NOFB] >[ 1.502375] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0 >[ 1.502376] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.502377] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 1.502413] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502426] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88040b8a1240 state to ffff88040b40bcc0 >[ 1.502427] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88040b62b400 state to ffff88040b40bcc0 >[ 1.502428] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502430] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502441] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 1.502445] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502446] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502448] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502448] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88040b8a1d80 state to ffff88040b40bcc0 >[ 1.502449] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502450] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502451] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502451] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502452] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502453] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88040b8a19c0 state to ffff88040b40bcc0 >[ 1.502454] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502454] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502455] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502456] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502457] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502458] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88040b8a1000 state to ffff88040b40bcc0 >[ 1.502459] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502459] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502460] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502461] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502462] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502463] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88040b8a13c0 state to ffff88040b40bcc0 >[ 1.502463] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502464] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502465] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502465] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502466] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502467] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88040b8a1900 state to ffff88040b40bcc0 >[ 1.502467] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502468] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502469] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502469] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502470] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502471] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88040b8a1cc0 state to ffff88040b40bcc0 >[ 1.502472] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502472] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502473] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502474] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502475] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502475] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88040b8a1f00 state to ffff88040b40bcc0 >[ 1.502476] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502477] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502477] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502478] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502479] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bcc0 >[ 1.502480] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88040b8a1180 state to ffff88040b40bcc0 >[ 1.502480] [drm:drm_atomic_check_only] checking ffff88040b40bcc0 >[ 1.502481] [drm:drm_atomic_commit] commiting ffff88040b40bcc0 >[ 1.502482] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bcc0 >[ 1.502482] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bcc0 >[ 1.502483] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 1.502485] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 1.502486] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.502488] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 1.502489] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 1.502489] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 1.502491] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 1.502492] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 1.502493] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 1.502494] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 1.502495] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 1.502495] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 1.502496] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 1.502497] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 1.502498] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 1.502499] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 1.502499] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 1.502500] [drm:intel_dump_pipe_config] requested mode: >[ 1.502501] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.502502] [drm:intel_dump_pipe_config] adjusted mode: >[ 1.502503] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.502505] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 1.502505] [drm:intel_dump_pipe_config] port clock: 270000 >[ 1.502506] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 1.502506] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 1.502507] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 1.502507] [drm:intel_dump_pipe_config] ips: 1 >[ 1.502508] [drm:intel_dump_pipe_config] double wide: 0 >[ 1.502509] [drm:intel_crtc_set_config] [CRTC:24] [NOFB] >[ 1.502510] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0 >[ 1.502511] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.502512] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 1.502513] [drm:intel_crtc_set_config] [CRTC:28] [NOFB] >[ 1.502514] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0 >[ 1.502514] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.502515] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 1.502552] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 1.502552] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 1.502553] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.502554] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 1.502555] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 1.502555] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 1.502556] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 1.502557] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 1.502558] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 1.502558] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 1.502559] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 1.502560] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 1.502560] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 1.502561] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 1.502562] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 1.502563] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 1.502563] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 1.502564] [drm:intel_dump_pipe_config] requested mode: >[ 1.502565] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.502566] [drm:intel_dump_pipe_config] adjusted mode: >[ 1.502567] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.502568] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 1.502568] [drm:intel_dump_pipe_config] port clock: 270000 >[ 1.502569] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 1.502570] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 1.502570] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 1.502571] [drm:intel_dump_pipe_config] ips: 1 >[ 1.502571] [drm:intel_dump_pipe_config] double wide: 0 >[ 1.507405] Console: switching to colour frame buffer device 240x67 >[ 1.507415] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 1.507417] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 1.507417] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.507419] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 1.507420] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 1.507421] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 1.507422] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 1.507423] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 1.507423] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 1.507424] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 1.507425] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 1.507425] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 1.507426] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 1.507427] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 1.507428] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 1.507429] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 1.507429] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 1.507430] [drm:intel_dump_pipe_config] requested mode: >[ 1.507431] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.507432] [drm:intel_dump_pipe_config] adjusted mode: >[ 1.507433] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.507434] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 1.507435] [drm:intel_dump_pipe_config] port clock: 270000 >[ 1.507436] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 1.507436] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 1.507437] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 1.507437] [drm:intel_dump_pipe_config] ips: 1 >[ 1.507438] [drm:intel_dump_pipe_config] double wide: 0 >[ 1.510215] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.510216] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.510222] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.511070] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.513797] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.513798] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.518364] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.518365] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.518369] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.519219] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.522917] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.522917] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.543392] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.543393] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.543397] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.544233] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.547910] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.547911] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.549262] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.549262] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.549267] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.550102] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.553822] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.553822] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.554834] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.554834] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.554839] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.555686] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.558895] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.558896] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.562745] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.562745] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.562750] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.563605] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.567316] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.567317] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.568483] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.568484] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.568488] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.569331] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.573044] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.573045] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.574110] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.574111] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.574116] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.574960] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.578672] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.578673] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.588897] i915 0000:00:02.0: fb0: inteldrmfb frame buffer device >[ 1.588899] i915 0000:00:02.0: registered panic notifier >[ 1.590440] console [netcon0] enabled >[ 1.591178] netconsole: network logging started >[ 1.591946] PM: Hibernation image not present or could not be loaded. >[ 1.591948] ALSA device list: >[ 1.592654] #0: HDA Intel HDMI at 0xf7e34000 irq 45 >[ 1.593350] #1: HDA Intel PCH at 0xf7e30000 irq 44 >[ 1.599363] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 1.599368] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 1.599409] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 1.600280] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 1.601390] [drm:drm_fb_helper_hotplug_event] >[ 1.601393] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 1.601395] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 1.602479] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 1.602780] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 1.602788] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 1.602791] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 1.602793] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.602795] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 1.602796] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 1.602956] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 1.602958] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 1.602959] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 1.602960] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 1.602962] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 1.602963] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 1.602964] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 1.602966] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 1.603119] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 1.603120] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 1.603121] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 1.603123] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] >[ 1.603125] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] status updated from 3 to 1 >[ 1.603175] [drm:drm_edid_to_eld] ELD monitor DELL U3415W >[ 1.603176] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 >[ 1.603206] [drm:drm_mode_debug_printmodeline] Modeline 54:"3440x1440" 60 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x48 0x9 >[ 1.603207] [drm:drm_mode_prune_invalid] Not using 3440x1440 mode: VIRTUAL_X >[ 1.603210] [drm:drm_mode_debug_printmodeline] Modeline 56:"2560x1080" 60 198000 2560 2708 2752 3000 1080 1091 1096 1100 0x40 0x5 >[ 1.603211] [drm:drm_mode_prune_invalid] Not using 2560x1080 mode: VIRTUAL_X >[ 1.603213] [drm:drm_mode_debug_printmodeline] Modeline 57:"3440x1440" 50 265250 3440 3520 3552 3600 1440 1461 1471 1474 0x40 0x9 >[ 1.603214] [drm:drm_mode_prune_invalid] Not using 3440x1440 mode: VIRTUAL_X >[ 1.603217] [drm:drm_mode_debug_printmodeline] Modeline 58:"1720x1440" 60 159940 1720 1760 1792 1800 1440 1446 1454 1481 0x40 0x9 >[ 1.603218] [drm:drm_mode_prune_invalid] Not using 1720x1440 mode: VIRTUAL_Y >[ 1.603220] [drm:drm_mode_debug_printmodeline] Modeline 59:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9 >[ 1.603221] [drm:drm_mode_prune_invalid] Not using 2560x1440 mode: VIRTUAL_X >[ 1.603223] [drm:drm_mode_debug_printmodeline] Modeline 63:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 >[ 1.603225] [drm:drm_mode_prune_invalid] Not using 1600x1200 mode: VIRTUAL_Y >[ 1.603227] [drm:drm_mode_debug_printmodeline] Modeline 73:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 1.603228] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 1.603231] [drm:drm_mode_debug_printmodeline] Modeline 77:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a >[ 1.603232] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 1.603234] [drm:drm_mode_debug_printmodeline] Modeline 78:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a >[ 1.603235] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE >[ 1.603237] [drm:drm_mode_debug_printmodeline] Modeline 80:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 >[ 1.603239] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 1.603241] [drm:drm_mode_debug_printmodeline] Modeline 86:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 1.603242] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 1.603244] [drm:drm_mode_debug_printmodeline] Modeline 90:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a >[ 1.603246] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 1.603249] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] probed modes : >[ 1.603251] [drm:drm_mode_debug_printmodeline] Modeline 55:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 1.603253] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 1.603256] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 1.603258] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 >[ 1.603260] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 1.603262] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 1.603264] [drm:drm_mode_debug_printmodeline] Modeline 61:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9 >[ 1.603267] [drm:drm_mode_debug_printmodeline] Modeline 60:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 >[ 1.603269] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 1.603271] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 1.603273] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 >[ 1.603276] [drm:drm_mode_debug_printmodeline] Modeline 69:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 >[ 1.603278] [drm:drm_mode_debug_printmodeline] Modeline 70:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa >[ 1.603280] [drm:drm_mode_debug_printmodeline] Modeline 71:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 >[ 1.603282] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 >[ 1.603284] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa >[ 1.603286] [drm:drm_mode_debug_printmodeline] Modeline 88:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa >[ 1.603289] [drm:drm_mode_debug_printmodeline] Modeline 75:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa >[ 1.603291] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa >[ 1.603293] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa >[ 1.603295] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa >[ 1.603297] [drm:drm_mode_debug_printmodeline] Modeline 67:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 >[ 1.603299] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] >[ 1.603300] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] status updated from 3 to 2 >[ 1.603301] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] disconnected >[ 1.603304] [drm:drm_setup_crtcs] >[ 1.603305] [drm:drm_enable_connectors] connector 31 enabled? yes >[ 1.603306] [drm:drm_enable_connectors] connector 40 enabled? no >[ 1.603308] [drm:drm_enable_connectors] connector 43 enabled? no >[ 1.603309] [drm:drm_enable_connectors] connector 47 enabled? no >[ 1.603310] [drm:drm_enable_connectors] connector 49 enabled? yes >[ 1.603311] [drm:drm_enable_connectors] connector 51 enabled? no >[ 1.603313] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1 >[ 1.603315] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0 >[ 1.603316] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080 >[ 1.603318] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping >[ 1.603319] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping >[ 1.603320] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping >[ 1.603321] [drm:intel_fb_initial_config] connector DP-2 has no encoder or crtc, skipping >[ 1.603322] [drm:intel_fb_initial_config] connector DP-3 not enabled, skipping >[ 1.603323] [drm:intel_fb_initial_config] fallback: Not all outputs enabled >[ 1.603324] [drm:intel_fb_initial_config] Enabled: 1, detected: 2 >[ 1.603325] [drm:intel_fb_initial_config] Not using firmware configuration >[ 1.603327] [drm:drm_target_preferred] looking for cmdline mode on connector 31 >[ 1.603328] [drm:drm_target_preferred] looking for preferred mode on connector 31 0 >[ 1.603329] [drm:drm_target_preferred] found mode 1920x1080 >[ 1.603331] [drm:drm_target_preferred] looking for cmdline mode on connector 49 >[ 1.603332] [drm:drm_target_preferred] looking for preferred mode on connector 49 0 >[ 1.603333] [drm:drm_target_preferred] found mode 1920x1080 >[ 1.603334] [drm:drm_setup_crtcs] picking CRTCs for 8192x8192 config >[ 1.603338] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0) >[ 1.603339] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 24 (0,0) >[ 1.603343] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603346] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800dbbf0d80 state to ffff88040b40b900 >[ 1.603348] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88040b923000 state to ffff88040b40b900 >[ 1.603350] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603353] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603366] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 1.603371] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603373] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603375] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603376] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800dbbf0cc0 state to ffff88040b40b900 >[ 1.603377] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603379] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603380] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603382] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603383] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603385] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88040b8a1d80 state to ffff88040b40b900 >[ 1.603386] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603387] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603389] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603390] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603391] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603393] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88040b8a19c0 state to ffff88040b40b900 >[ 1.603394] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603396] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603397] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603398] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603400] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603401] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88040b8a1000 state to ffff88040b40b900 >[ 1.603403] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603404] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603405] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603406] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603408] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603409] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88040b8a13c0 state to ffff88040b40b900 >[ 1.603411] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603412] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603413] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603414] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603416] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603417] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88040b8a1900 state to ffff88040b40b900 >[ 1.603419] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603420] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603421] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603422] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603424] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603426] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88040b8a1cc0 state to ffff88040b40b900 >[ 1.603427] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603428] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603429] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603431] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603432] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40b900 >[ 1.603434] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88040b8a1f00 state to ffff88040b40b900 >[ 1.603435] [drm:drm_atomic_check_only] checking ffff88040b40b900 >[ 1.603436] [drm:drm_atomic_commit] commiting ffff88040b40b900 >[ 1.603437] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40b900 >[ 1.603439] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40b900 >[ 1.603441] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 1.603443] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 1.603444] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.603447] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 1.603449] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 1.603450] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 1.603453] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 1.603454] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 1.603456] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 1.603458] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 1.603459] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 1.603461] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 1.603462] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 1.603463] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 1.603465] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 1.603467] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 1.603468] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 1.603469] [drm:intel_dump_pipe_config] requested mode: >[ 1.603471] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.603472] [drm:intel_dump_pipe_config] adjusted mode: >[ 1.603475] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 1.603477] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 1.603478] [drm:intel_dump_pipe_config] port clock: 270000 >[ 1.603479] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 1.603480] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 1.603482] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 1.603483] [drm:intel_dump_pipe_config] ips: 1 >[ 1.603484] [drm:intel_dump_pipe_config] double wide: 0 >[ 1.603486] [drm:intel_crtc_set_config] [CRTC:24] [FB:48] #connectors=1 (x y) (0 0) >[ 1.603488] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set >[ 1.603489] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set >[ 1.603491] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 0 0 0 0 0 0 0 0 0 0x0 0x0 >[ 1.603493] [drm:drm_mode_debug_printmodeline] Modeline 54:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 1.603494] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0 >[ 1.603496] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch >[ 1.603497] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 1.603498] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 1.603500] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 1.603501] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch >[ 1.603502] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 >[ 1.603504] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 1.603506] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 1.603507] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 1.603508] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 1.603509] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 1.603511] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 1.603512] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1730150, gmch_n: 8388608, link_m: 288358, link_n: 1048576, tu: 14 >[ 1.603514] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 1.603515] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 1.603516] [drm:intel_dump_pipe_config] requested mode: >[ 1.603518] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 1.603519] [drm:intel_dump_pipe_config] adjusted mode: >[ 1.603521] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 1.603523] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x40 flags: 0x5 >[ 1.603524] [drm:intel_dump_pipe_config] port clock: 540000 >[ 1.603526] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 1.603527] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 1.603528] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 1.603529] [drm:intel_dump_pipe_config] ips: 0 >[ 1.603530] [drm:intel_dump_pipe_config] double wide: 0 >[ 1.603536] [drm:drm_atomic_set_fb_for_plane] Set [FB:48] for plane state ffff88040b8a1180 >[ 1.603548] [drm:intel_mst_pre_enable_dp] 0 >[ 1.603636] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 1.603638] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 1.607428] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.612679] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.615877] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.619171] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.622473] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.625761] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.629056] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.632357] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.635655] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.638946] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.642250] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.645538] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.648833] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.652140] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.655429] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.658726] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 1.663856] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.668145] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.671441] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.674731] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.678035] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.681344] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.684653] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.687972] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.691265] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.694577] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.697889] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.701205] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.704497] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.707799] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.711096] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.714404] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 1.719020] [drm:intel_print_rc6_info] Enabling RC6 states: RC6 on >[ 1.719294] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.721006] [drm:gen6_enable_rps] Overclocking supported. Max: 1100MHz, Overclock max: 1100MHz >[ 1.723564] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.726833] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.730117] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.733409] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.736693] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.739892] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.743184] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.746461] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.749737] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.752182] usb 1-1.1: new high-speed USB device number 3 using ehci-pci >[ 1.753028] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.756308] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.759589] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.762878] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.766162] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.769449] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 1.774554] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.778821] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.782102] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.785395] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.788714] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.791995] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.795273] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.798565] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.801852] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.805132] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.808428] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.811706] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.814983] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.818271] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.821551] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.824836] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 1.829869] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.834144] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.837425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.840696] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.843966] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.847260] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.847876] usb 1-1.1: New USB device found, idVendor=0ea0, idProduct=2211 >[ 1.848749] usb 1-1.1: New USB device strings: Mfr=1, Product=2, SerialNumber=3 >[ 1.849623] usb 1-1.1: Product: Smart KM Link >[ 1.850527] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.850934] usb 1-1.1: Manufacturer: >[ 1.851841] usb 1-1.1: SerialNumber: 24144FF77BD400E0 >[ 1.853025] usb-storage 1-1.1:1.0: USB Mass Storage device detected >[ 1.853782] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.854346] scsi host3: usb-storage 1-1.1:1.0 >[ 1.857033] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.858693] input: Smart KM Link as /devices/pci0000:00/0000:00:1d.0/usb1/1-1/1-1.1/1-1.1:1.1/0003:0EA0:2211.0001/input/input14 >[ 1.860137] hid-generic 0003:0EA0:2211.0001: input,hidraw0: USB HID v1.00 Mouse [ Smart KM Link ] on usb-0000:00:1d.0-1.1/input1 >[ 1.860705] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.864088] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.864902] input: Smart KM Link as /devices/pci0000:00/0000:00:1d.0/usb1/1-1/1-1.1/1-1.1:1.2/0003:0EA0:2211.0002/input/input15 >[ 1.867352] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.870890] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.874201] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.877459] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.880714] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 1.886122] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.890385] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.893807] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.897092] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.900399] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.902953] ata2: SATA link up 6.0 Gbps (SStatus 133 SControl 300) >[ 1.903791] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.905383] ata2.00: failed to get NCQ Send/Recv Log Emask 0x1 >[ 1.905385] ata2.00: ATA-9: Samsung SSD 840 PRO Series, DXM05B0Q, max UDMA/133 >[ 1.907162] ata2.00: 1000215216 sectors, multi 16: LBA48 NCQ (depth 31/32), AA >[ 1.909061] ata2.00: failed to get NCQ Send/Recv Log Emask 0x1 >[ 1.909115] ata2.00: configured for UDMA/133 >[ 1.910692] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.911008] scsi 1:0:0:0: Direct-Access ATA Samsung SSD 840 5B0Q PQ: 0 ANSI: 5 >[ 1.912207] ata2.00: Enabling discard_zeroes_data >[ 1.912235] sd 1:0:0:0: Attached scsi generic sg0 type 0 >[ 1.913992] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.914579] sd 1:0:0:0: [sda] 1000215216 512-byte logical blocks: (512 GB/476 GiB) >[ 1.915622] sd 1:0:0:0: [sda] Write Protect is off >[ 1.916585] sd 1:0:0:0: [sda] Mode Sense: 00 3a 00 00 >[ 1.916596] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA >[ 1.917324] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.917985] hid-generic 0003:0EA0:2211.0002: input,hidraw1: USB HID v1.00 Keyboard [ Smart KM Link ] on usb-0000:00:1d.0-1.1/input2 >[ 1.919062] ata2.00: Enabling discard_zeroes_data >[ 1.921835] sda: sda1 sda2 sda3 sda4 >[ 1.922027] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.923610] ata2.00: Enabling discard_zeroes_data >[ 1.924714] sd 1:0:0:0: [sda] Attached SCSI disk >[ 1.925590] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.928750] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.932020] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.935404] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.938733] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.942032] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 1.947178] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.951583] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.954676] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.957937] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.961270] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.964773] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.968130] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.971546] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.974835] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.978098] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.981338] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.984745] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.988040] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 1.990841] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 1.993117] usb 1-1.2: new full-speed USB device number 4 using ehci-pci >[ 1.994252] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 1.997516] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 1.999107] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 2.002356] [drm:drm_dp_mst_allocate_vcpi] initing vcpi for 532 14 >[ 2.025061] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 2.025064] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 2.025081] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 2.025947] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 2.028360] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.032678] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.035986] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.039315] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.042625] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.045917] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.048555] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.052346] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.056429] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.059717] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.063030] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.066318] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.069617] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.073338] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.076638] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.080092] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.083291] usb 1-1.2: New USB device found, idVendor=046d, idProduct=c537 >[ 2.084519] usb 1-1.2: New USB device strings: Mfr=1, Product=2, SerialNumber=0 >[ 2.085138] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.085757] usb 1-1.2: Product: USB Receiver >[ 2.086895] usb 1-1.2: Manufacturer: Logitech >[ 2.089353] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.090060] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:1d.0/usb1/1-1/1-1.2/1-1.2:1.0/0003:046D:C537.0003/input/input16 >[ 2.091679] hid-generic 0003:046D:C537.0003: input,hidraw2: USB HID v1.11 Mouse [Logitech USB Receiver] on usb-0000:00:1d.0-1.2/input0 >[ 2.092646] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.095909] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.096755] input: Logitech USB Receiver as /devices/pci0000:00/0000:00:1d.0/usb1/1-1/1-1.2/1-1.2:1.1/0003:046D:C537.0004/input/input17 >[ 2.099189] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.102469] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.105689] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.109038] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.112321] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.116026] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.119364] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.122676] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.126329] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.129645] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.132936] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.136228] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.141625] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.145905] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.148996] hid-generic 0003:046D:C537.0004: input,hiddev0,hidraw3: USB HID v1.11 Keyboard [Logitech USB Receiver] on usb-0000:00:1d.0-1.2/input1 >[ 2.149194] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.152447] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.155741] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.158996] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.162530] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.165739] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.169038] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.172396] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.175715] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.179005] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.182294] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.186002] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.189296] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.192601] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.197904] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.202288] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.205701] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.209028] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.212329] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.215615] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.218254] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.222105] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.222854] usb 1-1.3: new full-speed USB device number 5 using ehci-pci >[ 2.225359] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.228649] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.232863] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.236154] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.239496] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.243179] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.246464] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.249740] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.256355] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.260633] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.264050] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.266607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.269934] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.273227] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.276514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.279785] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.283080] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.286379] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.289677] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.292972] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.296683] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.299954] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.303254] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.306517] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.311102] usb 1-1.3: New USB device found, idVendor=8087, idProduct=07dc >[ 2.311536] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.312911] usb 1-1.3: New USB device strings: Mfr=0, Product=0, SerialNumber=0 >[ 2.314210] Switched to clocksource tsc >[ 2.317327] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.320551] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.323775] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.326983] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.328689] Bluetooth: hci0: read Intel version: 370710018002030d00 >[ 2.330201] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.330582] bluetooth hci0: Direct firmware load for intel/ibt-hw-37.7.10-fw-1.80.2.3.d.bseq failed with error -2 >[ 2.331897] bluetooth hci0: Falling back to user helper >[ 2.333593] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.336907] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.340160] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.343439] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.347078] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.350323] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.353587] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.357798] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.361218] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.364455] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.366620] [drm:drm_dp_dpcd_write_payload] status not set after read payload table status 4 >[ 2.366706] [drm:intel_mst_enable_dp] 1 >[ 2.369771] [drm:intel_mst_enable_dp] *ERROR* Timed out waiting for ACT sent >[ 2.371859] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.374467] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.377533] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.380538] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.383610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.386619] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.388791] usb 1-1.4: new high-speed USB device number 6 using ehci-pci >[ 2.389671] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.392823] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.395827] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.398832] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.400019] input: AlpsPS/2 ALPS DualPoint Stick as /devices/platform/i8042/serio1/input/input18 >[ 2.402758] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.405764] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.408905] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.411964] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.413816] input: AlpsPS/2 ALPS DualPoint TouchPad as /devices/platform/i8042/serio1/input/input7 >[ 2.416502] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.419512] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.421401] md: Waiting for all devices to be available before autodetect >[ 2.421899] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 2.424156] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 2.424616] md: If you don't use raid, use raid=noautodetect >[ 2.426212] md: Autodetecting RAID arrays. >[ 2.428042] md: Scanned 0 and added 0 devices. >[ 2.429861] md: autorun ... >[ 2.430158] [drm:drm_dp_check_act_status] failed to get ACT bit 4 after 30 retries >[ 2.430159] [drm:drm_dp_update_payload_part2] payload 0 0 >[ 2.430610] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 2.430611] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 2.430628] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 2.431267] md: ... autorun DONE. >[ 2.431465] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 2.433184] EXT3-fs (sda4): error: couldn't mount because of unsupported optional features (240) >[ 2.433840] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.434737] EXT2-fs (sda4): error: couldn't mount because of unsupported optional features (240) >[ 2.438006] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.441231] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.441812] EXT4-fs (sda4): mounted filesystem with ordered data mode. Opts: (null) >[ 2.443682] VFS: Mounted root (ext4 filesystem) readonly on device 8:4. >[ 2.445356] devtmpfs: mounted >[ 2.447205] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.447361] Freeing unused kernel memory: 1156K (ffffffff8250f000 - ffffffff82630000) >[ 2.449238] Write protecting the kernel read-only data: 20480k >[ 2.451198] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 2.451203] [drm:intel_fbc_update] more than one pipe active, disabling compression >[ 2.451207] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1] >[ 2.451211] [drm:intel_connector_check_state] [CONNECTOR:49:DP-2] >[ 2.451213] [drm:check_encoder_state] [ENCODER:30:TMDS-30] >[ 2.451214] [drm:check_encoder_state] [ENCODER:39:TMDS-39] >[ 2.451216] [drm:check_encoder_state] [ENCODER:42:TMDS-42] >[ 2.451218] [drm:check_encoder_state] [ENCODER:44:DP MST-44] >[ 2.451219] [drm:check_encoder_state] [ENCODER:45:DP MST-45] >[ 2.451220] [drm:check_encoder_state] [ENCODER:46:DP MST-46] >[ 2.451221] [drm:check_crtc_state] [CRTC:20] >[ 2.451228] [drm:check_crtc_state] [CRTC:24] >[ 2.451233] [drm:check_crtc_state] [CRTC:28] >[ 2.451234] [drm:check_shared_dpll_state] WRPLL 1 >[ 2.451236] [drm:check_shared_dpll_state] WRPLL 2 >[ 2.451239] [drm:intel_crtc_set_config] [CRTC:28] [NOFB] >[ 2.451241] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0 >[ 2.451243] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 2.451244] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 2.451246] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 2.451259] [drm:drm_fb_helper_hotplug_event] >[ 2.451261] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 2.451263] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 2.451504] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.451587] Freeing unused kernel memory: 1840K (ffff880001c34000 - ffff880001e00000) >[ 2.453679] kworker/u8:3 (1460) used greatest stack depth: 13064 bytes left >[ 2.453739] Freeing unused kernel memory: 1384K (ffff8800022a6000 - ffff880002400000) >[ 2.453907] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 2.454767] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.455059] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 2.455068] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 2.455070] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 2.455072] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 2.455079] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 2.455080] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 2.455238] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 2.455241] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 2.455242] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 2.455243] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 2.455244] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 2.455245] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 2.455245] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 2.455246] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 2.455410] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 2.455410] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 2.455411] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 2.455412] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] >[ 2.455463] [drm:drm_edid_to_eld] ELD monitor DELL U3415W >[ 2.455464] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 >[ 2.455496] [drm:drm_mode_debug_printmodeline] Modeline 56:"3440x1440" 60 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x48 0x9 >[ 2.455497] [drm:drm_mode_prune_invalid] Not using 3440x1440 mode: VIRTUAL_X >[ 2.455498] [drm:drm_mode_debug_printmodeline] Modeline 58:"2560x1080" 60 198000 2560 2708 2752 3000 1080 1091 1096 1100 0x40 0x5 >[ 2.455498] [drm:drm_mode_prune_invalid] Not using 2560x1080 mode: VIRTUAL_X >[ 2.455499] [drm:drm_mode_debug_printmodeline] Modeline 59:"3440x1440" 50 265250 3440 3520 3552 3600 1440 1461 1471 1474 0x40 0x9 >[ 2.455500] [drm:drm_mode_prune_invalid] Not using 3440x1440 mode: VIRTUAL_X >[ 2.455501] [drm:drm_mode_debug_printmodeline] Modeline 63:"1720x1440" 60 159940 1720 1760 1792 1800 1440 1446 1454 1481 0x40 0x9 >[ 2.455501] [drm:drm_mode_prune_invalid] Not using 1720x1440 mode: VIRTUAL_Y >[ 2.455502] [drm:drm_mode_debug_printmodeline] Modeline 73:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9 >[ 2.455502] [drm:drm_mode_prune_invalid] Not using 2560x1440 mode: VIRTUAL_X >[ 2.455503] [drm:drm_mode_debug_printmodeline] Modeline 80:"1600x1200" 0 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 >[ 2.455504] [drm:drm_mode_prune_invalid] Not using 1600x1200 mode: VIRTUAL_Y >[ 2.455505] [drm:drm_mode_debug_printmodeline] Modeline 96:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 2.455505] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 2.455507] [drm:drm_mode_debug_printmodeline] Modeline 100:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a >[ 2.455507] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 2.455509] [drm:drm_mode_debug_printmodeline] Modeline 101:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a >[ 2.455509] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE >[ 2.455511] [drm:drm_mode_debug_printmodeline] Modeline 103:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 >[ 2.455512] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 2.455513] [drm:drm_mode_debug_printmodeline] Modeline 109:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 2.455514] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 2.455516] [drm:drm_mode_debug_printmodeline] Modeline 113:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a >[ 2.455516] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 2.455519] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] probed modes : >[ 2.455521] [drm:drm_mode_debug_printmodeline] Modeline 55:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 2.455522] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 2.455524] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 2.455526] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 >[ 2.455527] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 2.455529] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 2.455531] [drm:drm_mode_debug_printmodeline] Modeline 61:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9 >[ 2.455533] [drm:drm_mode_debug_printmodeline] Modeline 60:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 >[ 2.455535] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 2.455537] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 2.455539] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 >[ 2.455541] [drm:drm_mode_debug_printmodeline] Modeline 69:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 >[ 2.455542] [drm:drm_mode_debug_printmodeline] Modeline 70:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa >[ 2.455544] [drm:drm_mode_debug_printmodeline] Modeline 71:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 >[ 2.455546] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 >[ 2.455548] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa >[ 2.455550] [drm:drm_mode_debug_printmodeline] Modeline 88:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa >[ 2.455552] [drm:drm_mode_debug_printmodeline] Modeline 75:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa >[ 2.455553] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa >[ 2.455555] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa >[ 2.455557] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa >[ 2.455559] [drm:drm_mode_debug_printmodeline] Modeline 67:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 >[ 2.455560] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] >[ 2.455561] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] disconnected >[ 2.455564] [drm:drm_setup_crtcs] >[ 2.455565] [drm:drm_enable_connectors] connector 31 enabled? yes >[ 2.455566] [drm:drm_enable_connectors] connector 40 enabled? no >[ 2.455567] [drm:drm_enable_connectors] connector 43 enabled? no >[ 2.455567] [drm:drm_enable_connectors] connector 47 enabled? no >[ 2.455568] [drm:drm_enable_connectors] connector 49 enabled? yes >[ 2.455569] [drm:drm_enable_connectors] connector 51 enabled? no >[ 2.455570] [drm:intel_fb_initial_config] looking for cmdline mode on connector eDP-1 >[ 2.455571] [drm:intel_fb_initial_config] looking for preferred mode on connector eDP-1 0 >[ 2.455572] [drm:intel_fb_initial_config] connector eDP-1 on pipe A [CRTC:20]: 1920x1080 >[ 2.455574] [drm:intel_fb_initial_config] connector HDMI-A-1 not enabled, skipping >[ 2.455575] [drm:intel_fb_initial_config] connector DP-1 not enabled, skipping >[ 2.455575] [drm:intel_fb_initial_config] connector HDMI-A-2 not enabled, skipping >[ 2.455576] [drm:intel_fb_initial_config] looking for cmdline mode on connector DP-2 >[ 2.455577] [drm:intel_fb_initial_config] looking for preferred mode on connector DP-2 0 >[ 2.455578] [drm:intel_fb_initial_config] using first mode listed on connector DP-2 >[ 2.455579] [drm:intel_fb_initial_config] connector DP-2 on pipe B [CRTC:24]: 1920x1080 >[ 2.455579] [drm:intel_fb_initial_config] connector DP-3 not enabled, skipping >[ 2.455581] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 20 (0,0) >[ 2.455582] [drm:drm_setup_crtcs] desired mode 1920x1080 set on crtc 24 (0,0) >[ 2.455586] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455588] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff8800dbbf8a80 state to ffff88040b40bd20 >[ 2.455590] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff8800dbbdbc00 state to ffff88040b40bd20 >[ 2.455591] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455594] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455604] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 2.455608] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455610] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455611] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455612] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff8800dbbf8b40 state to ffff88040b40bd20 >[ 2.455613] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455614] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455615] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455616] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455617] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455618] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff8800dbbf8c00 state to ffff88040b40bd20 >[ 2.455619] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455620] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455621] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455621] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455622] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455624] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff8800dbbf8cc0 state to ffff88040b40bd20 >[ 2.455625] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff8800dbbdbc00 state to ffff88040b40bd20 >[ 2.455625] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455626] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455638] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 2.455644] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455645] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455646] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455647] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff8800dbbf8d80 state to ffff88040b40bd20 >[ 2.455650] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455651] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455652] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455653] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455654] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455655] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff8800dbbf8e40 state to ffff88040b40bd20 >[ 2.455655] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455656] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455657] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455657] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455658] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455659] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff8800dbbf8f00 state to ffff88040b40bd20 >[ 2.455660] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455661] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455662] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455662] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455663] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455664] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff8800dbbf8480 state to ffff88040b40bd20 >[ 2.455665] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455669] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455669] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455670] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455671] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040b40bd20 >[ 2.455672] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff8800dbbf83c0 state to ffff88040b40bd20 >[ 2.455673] [drm:drm_atomic_check_only] checking ffff88040b40bd20 >[ 2.455673] [drm:drm_atomic_commit] commiting ffff88040b40bd20 >[ 2.455674] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040b40bd20 >[ 2.455677] [drm:drm_atomic_state_free] Freeing atomic state ffff88040b40bd20 >[ 2.455679] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 2.455680] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 2.455682] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 2.455682] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 2.455684] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 2.455685] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 2.455689] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 2.455691] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 2.455692] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 2.455693] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 2.455694] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 2.455698] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 2.455698] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 2.455699] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 2.455700] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 2.455701] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 2.455702] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 2.455703] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 2.455706] [drm:intel_dump_pipe_config] requested mode: >[ 2.455708] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 2.455708] [drm:intel_dump_pipe_config] adjusted mode: >[ 2.455710] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 2.455712] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 2.455712] [drm:intel_dump_pipe_config] port clock: 270000 >[ 2.455713] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 2.455714] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 2.455715] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 2.455715] [drm:intel_dump_pipe_config] ips: 1 >[ 2.455716] [drm:intel_dump_pipe_config] double wide: 0 >[ 2.455717] [drm:intel_crtc_set_config] [CRTC:24] [FB:48] #connectors=1 (x y) (0 0) >[ 2.455718] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0 >[ 2.455719] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 2.455722] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 2.455723] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 >[ 2.455724] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 2.455726] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 2.455726] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 2.455727] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 2.455728] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 2.455729] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 2.455735] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1730150, gmch_n: 8388608, link_m: 288358, link_n: 1048576, tu: 14 >[ 2.455736] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 2.455737] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 2.455740] [drm:intel_dump_pipe_config] requested mode: >[ 2.455742] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 2.455742] [drm:intel_dump_pipe_config] adjusted mode: >[ 2.455744] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 2.455745] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x40 flags: 0x5 >[ 2.455746] [drm:intel_dump_pipe_config] port clock: 540000 >[ 2.455746] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 2.455747] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 2.455748] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 2.455748] [drm:intel_dump_pipe_config] ips: 0 >[ 2.455749] [drm:intel_dump_pipe_config] double wide: 0 >[ 2.455750] [drm:intel_crtc_set_config] [CRTC:28] [NOFB] >[ 2.455751] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0 >[ 2.455752] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 2.455753] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 2.455754] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 2.458261] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.461485] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.464737] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.467975] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.471240] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.474471] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.477615] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.480857] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.483017] random: systemd urandom read with 59 bits of entropy available >[ 2.484092] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.485468] systemd[1]: systemd 215 running in system mode. (+PAM -AUDIT -SELINUX +IMA -SYSVINIT -LIBCRYPTSETUP -GCRYPT -ACL -XZ +SECCOMP -APPARMOR) >[ 2.487148] systemd[1]: Detected architecture 'x86-64'. >[ 2.487322] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.491397] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.494517] systemd[1]: No hostname configured. >[ 2.496189] systemd[1]: Set hostname to <localhost>. >[ 2.498019] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.501252] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.504471] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.505796] systemd-fstab-g (1469) used greatest stack depth: 12840 bytes left >[ 2.507702] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.510954] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.514187] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.517410] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.520633] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.523866] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.527123] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.530361] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.531109] systemd[1]: Configuration file /usr/lib64/systemd/system/auditd.service is marked world-inaccessible. This has no effect as configuration data is accessible via APIs without restrictions. Proceeding anyway. >[ 2.534443] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.537687] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.540923] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.544172] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.547551] systemd[1]: Starting Forward Password Requests to Wall Directory Watch. >[ 2.549344] systemd[1]: Started Forward Password Requests to Wall Directory Watch. >[ 2.551295] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.551305] systemd[1]: Starting Remote File Systems. >[ 2.553356] usb 1-1.4: New USB device found, idVendor=0c45, idProduct=64d2 >[ 2.553357] usb 1-1.4: New USB device strings: Mfr=2, Product=1, SerialNumber=0 >[ 2.553358] usb 1-1.4: Product: Laptop_Integrated_Webcam_HD >[ 2.553360] usb 1-1.4: Manufacturer: CN07YYTT7248739GA0CCA00 >[ 2.554176] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.560357] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.562265] systemd[1]: Reached target Remote File Systems. >[ 2.564111] systemd[1]: Starting Dispatch Password Requests to Console Directory Watch. >[ 2.566008] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.566034] systemd[1]: Started Dispatch Password Requests to Console Directory Watch. >[ 2.567949] systemd[1]: Starting Arbitrary Executable File Formats File System Automount Point. >[ 2.570238] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.571515] systemd[1]: Set up automount Arbitrary Executable File Formats File System Automount Point. >[ 2.573313] systemd[1]: Expecting device dev-sda3.device... >[ 2.575353] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.576604] systemd[1]: Expecting device dev-sda2.device... >[ 2.579814] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.580026] systemd[1]: Starting Root Slice. >[ 2.582838] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.585261] systemd[1]: Created slice Root Slice. >[ 2.587067] systemd[1]: Starting User and Session Slice. >[ 2.588829] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.590252] systemd[1]: Created slice User and Session Slice. >[ 2.592006] systemd[1]: Starting /dev/initctl Compatibility Named Pipe. >[ 2.593793] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.594996] systemd[1]: Listening on /dev/initctl Compatibility Named Pipe. >[ 2.596564] systemd[1]: Starting Delayed Shutdown Socket. >[ 2.598362] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.599534] systemd[1]: Listening on Delayed Shutdown Socket. >[ 2.601092] systemd[1]: Starting Journal Socket (/dev/log). >[ 2.602848] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.604003] systemd[1]: Listening on Journal Socket (/dev/log). >[ 2.605490] systemd[1]: Starting Syslog Socket. >[ 2.607259] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.608398] systemd[1]: Listening on Syslog Socket. >[ 2.609853] systemd[1]: Starting udev Control Socket. >[ 2.611557] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.612693] systemd[1]: Listening on udev Control Socket. >[ 2.614126] systemd[1]: Starting udev Kernel Socket. >[ 2.615807] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.616921] systemd[1]: Listening on udev Kernel Socket. >[ 2.618310] systemd[1]: Starting Journal Socket. >[ 2.620038] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.622775] systemd[1]: Listening on Journal Socket. >[ 2.624497] systemd[1]: Starting System Slice. >[ 2.626157] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.626727] usb 1-1.5: new full-speed USB device number 7 using ehci-pci >[ 2.628910] systemd[1]: Created slice System Slice. >[ 2.630557] systemd[1]: Starting File System Check on Root Device... >[ 2.632241] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.633777] systemd[1]: Starting system-systemd\x2dfsck.slice. >[ 2.636841] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.637173] systemd[1]: Created slice system-systemd\x2dfsck.slice. >[ 2.639100] systemd[1]: Mounting Temporary Directory... >[ 2.641189] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.642467] systemd[1]: tmp.mount: Directory /tmp to mount over is not empty, mounting anyway. >[ 2.643872] systemd[1]: Starting system-getty.slice. >[ 2.644442] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.646742] systemd[1]: Created slice system-getty.slice. >[ 2.647682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.648278] systemd[1]: Mounting Huge Pages File System... >[ 2.650891] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.652086] systemd[1]: Started Load Kernel Modules. >[ 2.653291] systemd[1]: Starting Apply Kernel Variables... >[ 2.654118] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.656363] systemd[1]: Mounting FUSE Control File System... >[ 2.657342] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.660525] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.662360] systemd[1]: Started Set Up Additional Binary Formats. >[ 2.663782] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.664010] systemd[1]: Mounting Debug File System... >[ 2.666500] systemd[1]: Starting Setup Virtual Console... >[ 2.667021] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.669246] systemd[1]: Mounting Configuration File System... >[ 2.670255] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.672029] systemd[1]: Starting udev Coldplug all Devices... >[ 2.673430] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.674809] systemd[1]: Mounting POSIX Message Queue File System... >[ 2.676630] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.678755] systemd[1]: Starting Create list of required static device nodes for the current kernel... >[ 2.679847] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.683506] systemd[1]: Starting Journal Service... >[ 2.684562] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.687373] systemd[1]: Started Journal Service. >[ 2.688863] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.692072] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.695271] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.698417] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.701629] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.704831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.708046] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.711258] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.714415] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.717642] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.720852] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.724075] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.727051] usb 1-1.5: New USB device found, idVendor=0a5c, idProduct=5801 >[ 2.728645] usb 1-1.5: New USB device strings: Mfr=1, Product=2, SerialNumber=3 >[ 2.730208] usb 1-1.5: Product: 5880 >[ 2.731744] usb 1-1.5: Manufacturer: Broadcom Corp >[ 2.731745] usb 1-1.5: SerialNumber: 0123456789ABCD >[ 2.731759] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.732912] usb 1-1.5: config 0 descriptor?? >[ 2.735151] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.738372] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.743743] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.747900] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.748311] EXT4-fs (sda4): re-mounted. Opts: discard >[ 2.750740] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.753982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.757202] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.760402] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.763617] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.767047] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.767870] systemd-udevd[2317]: starting version 215 >[ 2.770670] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.773904] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.777144] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.780383] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.783620] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.786880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.790110] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.793343] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.798249] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.802443] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.805673] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.808995] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.812462] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.815714] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.819143] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.822724] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.826130] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.829033] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.832406] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.836354] e1000e 0000:00:19.0 eno1: renamed from eth0 >[ 2.836622] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.839929] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.842696] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.845578] Bluetooth: hci0: Intel Bluetooth firmware file: intel/ibt-hw-37.7.10-fw-1.80.2.3.d.bseq >[ 2.845847] systemd-udevd[2320]: renamed network interface eth0 to eno1 >[ 2.846030] iwlwifi 0000:02:00.0 wlp2s0: renamed from wlan0 >[ 2.846485] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.847981] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=937/937 >[ 2.847982] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 2.849385] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.850149] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 2.852018] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 2.854530] Bluetooth: hci0: Intel Bluetooth firmware patch completed >[ 2.857280] [drm:intel_set_cpu_fifo_underrun_reporting] *ERROR* uncleared fifo underrun on pipe B >[ 2.857282] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe B FIFO underrun >[ 2.858517] scsi 3:0:0:0: CD-ROM Smart KM Link 2.00 PQ: 0 ANSI: 0 >[ 2.861260] sr 3:0:0:0: [sr0] scsi-1 drive >[ 2.861261] cdrom: Uniform CD-ROM driver Revision: 3.20 >[ 2.861378] sr 3:0:0:0: Attached scsi CD-ROM sr0 >[ 2.861468] sr 3:0:0:0: Attached scsi generic sg1 type 5 >[ 2.862218] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 2.862219] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 2.862227] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 2.863091] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 2.868876] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.869714] systemd-udevd[2322]: renamed network interface wlan0 to wlp2s0 >[ 2.874807] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.876353] uvcvideo: Found UVC 1.00 device Laptop_Integrated_Webcam_HD (0c45:64d2) >[ 2.879508] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.882817] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.886626] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.890180] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.894996] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.898505] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.901451] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.904655] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.907888] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.911327] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.914532] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.917758] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.918527] Adding 16777212k swap on /dev/sda3. Priority:-1 extents:1 across:16777212k SS >[ 2.920154] input: Laptop_Integrated_Webcam_HD as /devices/pci0000:00/0000:00:1d.0/usb1/1-1/1-1.4/1-1.4:1.0/input/input19 >[ 2.921403] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.921778] usbcore: registered new interface driver uvcvideo >[ 2.921779] USB Video Class driver (1.1.1) >[ 2.924092] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.928181] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.931758] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.934966] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.935088] random: nonblocking pool is initialized >[ 2.937830] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.939025] EXT4-fs (sda2): mounted filesystem with ordered data mode. Opts: discard >[ 2.940835] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.944045] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.946661] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.949882] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.953098] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.956323] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.959570] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.959921] systemd-journald[1756]: Received request to flush runtime journal from PID 1 >[ 2.962846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.966056] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.969282] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.972411] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.975619] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 2.980689] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.984873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.988125] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 2.991377] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 2.991454] sr 3:0:0:0: [sr0] FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE >[ 2.993405] sr 3:0:0:0: [sr0] Sense Key : Illegal Request [current] >[ 2.995012] sr 3:0:0:0: [sr0] Add. Sense: Logical block address out of range >[ 2.996691] sr 3:0:0:0: [sr0] CDB: Read(10) 28 00 00 00 04 00 00 00 02 00 >[ 2.996693] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 2.998369] blk_update_request: critical target error, dev sr0, sector 4096 >[ 2.999987] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.001669] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.001681] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.003312] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.004923] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.004926] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.004929] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.004932] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.004934] sr 3:0:0:0: [sr0] unaligned transfer >[ 3.005386] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.008634] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.011840] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.015050] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.018278] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.021511] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.024760] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.028009] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.031233] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.034392] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.039358] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.043547] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.046844] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.050111] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.053353] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.056568] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.059778] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.063011] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.066237] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.069466] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.072697] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.075914] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.079135] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.082392] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.085695] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.088945] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.094173] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.098369] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.101597] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.104838] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.108074] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.111309] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.114552] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.117800] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.121034] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.124268] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.127506] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.130739] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.133953] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.137165] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.140350] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.143558] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.148500] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.152680] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.155907] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.159139] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.162359] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.165573] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.168777] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.172000] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.174737] /dev/vmmon[2432]: Module vmmon: registered with major=10 minor=165 >[ 3.174741] /dev/vmmon[2432]: Module vmmon: initialized >[ 3.175224] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.178337] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.181559] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.184775] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.187992] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.191211] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.194339] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.195655] [2437]: VMCI: shared components initialized. >[ 3.195698] [2437]: VMCI: host components initialized. >[ 3.195821] [2437]: VMCI: Module registered (name=vmci, major=10, minor=56). >[ 3.195823] [2437]: VMCI: Using host personality >[ 3.195824] [2437]: VMCI: Module (name=vmci) is initialized >[ 3.197553] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.202448] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.206637] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.209868] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.213101] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.216324] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.219542] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.222747] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.225971] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.229185] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.232317] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.235563] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.238776] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.242078] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.245222] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.248433] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.251670] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.253792] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 3.256882] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 3.268789] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 3.268792] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 3.268801] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 3.269646] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 3.272017] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.277170] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.280298] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.283509] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.286736] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.289957] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.293185] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.296444] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.299647] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.302862] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.306076] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.309289] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.312514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.315767] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.318983] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.322194] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.327442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.331654] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.334893] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.338135] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.341353] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.344562] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.347821] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.351056] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.354283] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.357524] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.360773] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.364011] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.367440] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.370702] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.373972] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.377244] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.382961] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.387156] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.390375] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.393900] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.397293] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.400535] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.403750] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.406993] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.410159] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.413366] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.416602] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.420243] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.423465] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.427001] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.430156] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.433256] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.437911] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.442085] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.445247] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.449418] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.452783] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.456247] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.458889] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.462142] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.467776] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.471092] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.476801] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.480900] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.485272] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.489086] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.492368] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.495856] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.500885] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.505192] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.509540] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.511143] sr 3:0:0:0: [sr0] FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE >[ 3.512474] sr 3:0:0:0: [sr0] Sense Key : Illegal Request [current] >[ 3.513002] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.513804] sr 3:0:0:0: [sr0] Add. Sense: Logical block address out of range >[ 3.513807] sr 3:0:0:0: [sr0] CDB: Read(10) 28 00 00 00 04 00 00 00 02 00 >[ 3.513808] blk_update_request: critical target error, dev sr0, sector 4096 >[ 3.517737] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.519295] sr 3:0:0:0: [sr0] FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE >[ 3.519297] sr 3:0:0:0: [sr0] Sense Key : Illegal Request [current] >[ 3.519299] sr 3:0:0:0: [sr0] Add. Sense: Logical block address out of range >[ 3.519302] sr 3:0:0:0: [sr0] CDB: Read(10) 28 00 00 00 04 00 00 00 02 00 >[ 3.519304] blk_update_request: critical target error, dev sr0, sector 4096 >[ 3.519305] Buffer I/O error on dev sr0, logical block 512, async page read >[ 3.523699] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.530540] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.532602] [drm:i915_gem_open] >[ 3.532676] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532680] [drm:drm_atomic_get_plane_state] Added [PLANE:17] ffff88040c316c00 state to ffff88040a69ade0 >[ 3.532683] [drm:drm_atomic_get_crtc_state] Added [CRTC:20] ffff88040841c800 state to ffff88040a69ade0 >[ 3.532685] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532688] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532700] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 3.532706] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532707] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532709] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532711] [drm:drm_atomic_get_plane_state] Added [PLANE:19] ffff88040c3166c0 state to ffff88040a69ade0 >[ 3.532713] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532714] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532716] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532717] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532719] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532721] [drm:drm_atomic_get_plane_state] Added [PLANE:21] ffff88040c316d80 state to ffff88040a69ade0 >[ 3.532722] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532724] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532725] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532726] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532728] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532730] [drm:drm_atomic_get_plane_state] Added [PLANE:22] ffff88040c316240 state to ffff88040a69ade0 >[ 3.532732] [drm:drm_atomic_get_crtc_state] Added [CRTC:24] ffff88040841c800 state to ffff88040a69ade0 >[ 3.532733] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532735] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532741] [drm:ironlake_update_primary_plane] Writing base 00096000 00000000 0 0 7680 >[ 3.532744] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532746] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532748] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532749] [drm:drm_atomic_get_plane_state] Added [PLANE:23] ffff88040c316480 state to ffff88040a69ade0 >[ 3.532751] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532752] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532754] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532755] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532757] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532759] [drm:drm_atomic_get_plane_state] Added [PLANE:25] ffff88040c316300 state to ffff88040a69ade0 >[ 3.532760] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532762] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532769] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532770] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532786] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532788] [drm:drm_atomic_get_plane_state] Added [PLANE:26] ffff88040c316840 state to ffff88040a69ade0 >[ 3.532789] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532791] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532792] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532794] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532796] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532797] [drm:drm_atomic_get_plane_state] Added [PLANE:27] ffff88040c316f00 state to ffff88040a69ade0 >[ 3.532799] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532800] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532802] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532803] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532805] [drm:drm_atomic_state_alloc] Allocate atomic state ffff88040a69ade0 >[ 3.532807] [drm:drm_atomic_get_plane_state] Added [PLANE:29] ffff88040c3160c0 state to ffff88040a69ade0 >[ 3.532808] [drm:drm_atomic_check_only] checking ffff88040a69ade0 >[ 3.532810] [drm:drm_atomic_commit] commiting ffff88040a69ade0 >[ 3.532811] [drm:drm_atomic_state_clear] Clearing atomic state ffff88040a69ade0 >[ 3.532813] [drm:drm_atomic_state_free] Freeing atomic state ffff88040a69ade0 >[ 3.532815] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 3.532819] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 3.532821] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.532823] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.532825] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 3.532827] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 3.532829] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 3.532832] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 3.532834] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 3.532836] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 3.532838] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 3.532840] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 3.532842] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 3.532843] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 3.532845] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 3.532847] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 3.532848] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 3.532850] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 3.532851] [drm:intel_dump_pipe_config] requested mode: >[ 3.532854] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 3.532855] [drm:intel_dump_pipe_config] adjusted mode: >[ 3.532858] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 3.532860] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 3.532861] [drm:intel_dump_pipe_config] port clock: 270000 >[ 3.532863] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 3.532864] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 3.532866] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 3.532867] [drm:intel_dump_pipe_config] ips: 1 >[ 3.532868] [drm:intel_dump_pipe_config] double wide: 0 >[ 3.532871] [drm:intel_crtc_set_config] [CRTC:24] [FB:48] #connectors=1 (x y) (0 0) >[ 3.532873] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0 >[ 3.532874] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.532881] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.532882] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 >[ 3.532896] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 3.532899] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 3.532900] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 3.532901] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 3.532903] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 3.532904] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 3.532906] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1730150, gmch_n: 8388608, link_m: 288358, link_n: 1048576, tu: 14 >[ 3.532908] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 3.532909] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 3.532910] [drm:intel_dump_pipe_config] requested mode: >[ 3.532913] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 3.532914] [drm:intel_dump_pipe_config] adjusted mode: >[ 3.532916] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 3.532919] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x40 flags: 0x5 >[ 3.532920] [drm:intel_dump_pipe_config] port clock: 540000 >[ 3.532921] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 3.532923] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 3.532924] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 3.532925] [drm:intel_dump_pipe_config] ips: 0 >[ 3.532927] [drm:intel_dump_pipe_config] double wide: 0 >[ 3.532928] [drm:intel_crtc_set_config] [CRTC:28] [NOFB] >[ 3.532930] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0 >[ 3.532932] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.532933] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.532935] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 3.533955] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.537123] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.540366] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.543630] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.547025] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.550379] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.551936] [drm:intel_crtc_set_config] [CRTC:20] [FB:48] #connectors=1 (x y) (0 0) >[ 3.551939] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 3.551941] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.551942] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.551944] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 3.551945] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 3.551946] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 3.551949] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 3.551950] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 3.551951] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 3.551952] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 3.551954] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 3.551954] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 3.551955] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 3.551956] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 3.551957] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 3.551958] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 3.551959] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 3.551959] [drm:intel_dump_pipe_config] requested mode: >[ 3.551961] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 3.551962] [drm:intel_dump_pipe_config] adjusted mode: >[ 3.551964] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 3.551965] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 3.551966] [drm:intel_dump_pipe_config] port clock: 270000 >[ 3.551967] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 3.551967] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 3.551968] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 3.551969] [drm:intel_dump_pipe_config] ips: 1 >[ 3.551969] [drm:intel_dump_pipe_config] double wide: 0 >[ 3.551971] [drm:intel_crtc_set_config] [CRTC:24] [FB:48] #connectors=1 (x y) (0 0) >[ 3.551972] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0 >[ 3.551974] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.551974] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.551976] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 >[ 3.551977] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 3.551979] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 3.551979] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 3.551980] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 3.551980] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 3.551981] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 3.551983] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1730150, gmch_n: 8388608, link_m: 288358, link_n: 1048576, tu: 14 >[ 3.551984] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 3.551984] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 3.551985] [drm:intel_dump_pipe_config] requested mode: >[ 3.551986] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 3.551987] [drm:intel_dump_pipe_config] adjusted mode: >[ 3.551988] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 3.551997] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x40 flags: 0x5 >[ 3.551997] [drm:intel_dump_pipe_config] port clock: 540000 >[ 3.551998] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 3.551999] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 3.552000] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 3.552000] [drm:intel_dump_pipe_config] ips: 0 >[ 3.552001] [drm:intel_dump_pipe_config] double wide: 0 >[ 3.553629] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.556837] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.559774] [drm:i915_gem_open] >[ 3.559787] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[6] ENCODERS[6] >[ 3.560046] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.561427] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[6] ENCODERS[6] >[ 3.561437] [drm:drm_mode_addfb2] [FB:56] >[ 3.561572] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[6] ENCODERS[6] >[ 3.561575] [drm:drm_mode_getresources] CRTC[3] CONNECTORS[6] ENCODERS[6] >[ 3.561663] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 3.561700] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 3.561860] [drm:drm_mode_getconnector] [CONNECTOR:40:?] >[ 3.561864] [drm:drm_mode_getconnector] [CONNECTOR:40:?] >[ 3.561888] [drm:drm_mode_getconnector] [CONNECTOR:43:?] >[ 3.561891] [drm:drm_mode_getconnector] [CONNECTOR:43:?] >[ 3.561910] [drm:drm_mode_getconnector] [CONNECTOR:47:?] >[ 3.561912] [drm:drm_mode_getconnector] [CONNECTOR:47:?] >[ 3.561933] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 3.561936] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 3.561940] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 3.561970] [drm:drm_mode_getconnector] [CONNECTOR:51:?] >[ 3.561972] [drm:drm_mode_getconnector] [CONNECTOR:51:?] >[ 3.561976] [drm:drm_mode_getconnector] [CONNECTOR:51:?] >[ 3.564184] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.568759] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.571985] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.575198] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.578424] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.581641] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.584890] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.588104] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.591336] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.594574] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.597809] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.601033] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.604194] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.607419] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.610639] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.613865] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.617955] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.622302] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.625525] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.628745] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.631995] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.635185] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.638416] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.641643] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.644870] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.648079] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.651297] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.654512] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.657727] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.661224] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.664621] [drm:drm_mode_addfb2] [FB:56] >[ 3.665246] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.666873] [drm:drm_mode_setcrtc] [CRTC:20] >[ 3.666876] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1] >[ 3.666878] [drm:intel_crtc_set_config] [CRTC:20] [FB:56] #connectors=1 (x y) (0 0) >[ 3.666881] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1 >[ 3.666882] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.666883] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.666885] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 3.666888] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 3.666889] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 3.666892] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 3.666894] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 3.666896] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 3.666898] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 3.666900] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 3.666901] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 3.666902] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 3.666904] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 3.666906] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 3.666908] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 3.666909] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 3.666911] [drm:intel_dump_pipe_config] requested mode: >[ 3.666913] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x0 0x9 >[ 3.666915] [drm:intel_dump_pipe_config] adjusted mode: >[ 3.666917] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 3.666920] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 3.666921] [drm:intel_dump_pipe_config] port clock: 270000 >[ 3.666922] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 3.666924] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 3.666926] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 3.666927] [drm:intel_dump_pipe_config] ips: 1 >[ 3.666928] [drm:intel_dump_pipe_config] double wide: 0 >[ 3.666931] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88040b82e780 >[ 3.668813] [drm:ironlake_update_primary_plane] Writing base 0087F000 00000000 0 0 7680 >[ 3.669612] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.670060] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 3.671712] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 3.681848] [drm:drm_mode_setcrtc] [CRTC:24] >[ 3.681857] [drm:drm_mode_setcrtc] [CONNECTOR:49:DP-2] >[ 3.681858] [drm:intel_crtc_set_config] [CRTC:24] [FB:56] #connectors=1 (x y) (0 0) >[ 3.681862] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=1 >[ 3.681863] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.681865] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.681867] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 >[ 3.681869] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 3.681875] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 3.681878] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 3.681879] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 3.681879] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 3.681880] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 3.681882] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1730150, gmch_n: 8388608, link_m: 288358, link_n: 1048576, tu: 14 >[ 3.681883] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 3.681883] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 3.681884] [drm:intel_dump_pipe_config] requested mode: >[ 3.681886] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x0 0x5 >[ 3.681887] [drm:intel_dump_pipe_config] adjusted mode: >[ 3.681889] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x0 0x5 >[ 3.681891] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x0 flags: 0x5 >[ 3.681891] [drm:intel_dump_pipe_config] port clock: 540000 >[ 3.681892] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 3.681894] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 3.681895] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 3.681897] [drm:intel_dump_pipe_config] ips: 0 >[ 3.681898] [drm:intel_dump_pipe_config] double wide: 0 >[ 3.681901] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff88040b82e300 >[ 3.681914] [drm:ironlake_update_primary_plane] Writing base 0087F000 00000000 0 0 7680 >[ 3.690334] [drm:drm_mode_setcrtc] [CRTC:28] >[ 3.690337] [drm:intel_crtc_set_config] [CRTC:28] [NOFB] >[ 3.690341] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:28], mode_changed=0, fb_changed=0 >[ 3.690343] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 3.690345] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 3.690347] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 3.700661] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 3.700666] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 3.700674] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 3.701533] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 3.703909] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.708066] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.711306] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.714530] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.717761] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.720978] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.724161] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.727388] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.732009] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.735147] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.738390] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.741727] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.744955] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.748141] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.751431] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.754705] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.758802] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.763004] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.766246] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.769460] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.772677] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.775892] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.779024] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.782246] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.785471] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.788688] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.792096] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.797449] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.800668] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.803892] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.807544] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.810781] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.814868] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.819016] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.822237] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.825460] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.828704] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.831939] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.835105] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.838357] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.841562] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.844776] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.848019] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.851225] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.854429] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.860099] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.863261] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.866473] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.870544] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.874711] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.877944] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.881091] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.884329] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.887559] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.890794] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.894004] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.897232] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.900442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.903677] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.906925] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.910102] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.913377] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.916587] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.919803] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.923885] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.927984] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.931198] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.934424] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.937666] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.940883] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.944084] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.947369] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.950585] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.953803] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.957058] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.960272] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.963487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.966756] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.969953] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.970600] sr 3:0:0:0: [sr0] FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE >[ 3.970604] sr 3:0:0:0: [sr0] Sense Key : Illegal Request [current] >[ 3.970606] sr 3:0:0:0: [sr0] Add. Sense: Logical block address out of range >[ 3.970609] sr 3:0:0:0: [sr0] CDB: Read(10) 28 00 00 00 04 00 00 00 02 00 >[ 3.970611] blk_update_request: critical target error, dev sr0, sector 4096 >[ 3.972347] sr 3:0:0:0: [sr0] FAILED Result: hostbyte=DID_OK driverbyte=DRIVER_SENSE >[ 3.972351] sr 3:0:0:0: [sr0] Sense Key : Illegal Request [current] >[ 3.972353] sr 3:0:0:0: [sr0] Add. Sense: Logical block address out of range >[ 3.972356] sr 3:0:0:0: [sr0] CDB: Read(10) 28 00 00 00 04 00 00 00 02 00 >[ 3.972358] blk_update_request: critical target error, dev sr0, sector 4096 >[ 3.972360] Buffer I/O error on dev sr0, logical block 512, async page read >[ 3.973163] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 3.977228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.981398] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.983194] /dev/vmnet: open called by PID 2602 (vmnet-netifup) >[ 3.983200] /dev/vmnet: hub 1 does not exist, allocating memory. >[ 3.983216] /dev/vmnet: port on hub 1 successfully opened >[ 3.984608] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.987813] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 3.991177] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 3.994418] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 3.997828] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.001040] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.004247] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.007530] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.010853] iwlwifi 0000:02:00.0: L1 Disabled - LTR Enabled >[ 4.011077] iwlwifi 0000:02:00.0: L1 Disabled - LTR Enabled >[ 4.012063] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.015282] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.018534] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.021823] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.024944] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.028159] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.031053] /dev/vmnet: open called by PID 2525 (vmnet-bridge) >[ 4.031059] /dev/vmnet: hub 0 does not exist, allocating memory. >[ 4.031076] /dev/vmnet: port on hub 0 successfully opened >[ 4.031191] bridge-wlp2s0: device is wireless, enabling SMAC >[ 4.031194] bridge-wlp2s0: up >[ 4.031196] bridge-wlp2s0: attached >[ 4.031224] bridge-wlp2s0: disabling the bridge >[ 4.032978] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.037429] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.040305] bridge-wlp2s0: down >[ 4.040310] bridge-wlp2s0: detached >[ 4.042194] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.045682] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.048465] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.052289] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.056295] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.061055] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.064252] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.067475] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.070984] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.075633] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.076142] /dev/vmnet: open called by PID 2611 (vmnet-dhcpd) >[ 4.076158] /dev/vmnet: port on hub 1 successfully opened >[ 4.078163] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.081380] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.085207] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.086680] /dev/vmnet: open called by PID 2625 (vmnet-natd) >[ 4.086686] /dev/vmnet: hub 8 does not exist, allocating memory. >[ 4.086703] /dev/vmnet: port on hub 8 successfully opened >[ 4.088446] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.088898] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 4.090566] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 4.091022] /dev/vmnet: open called by PID 2626 (vmnet-netifup) >[ 4.091030] /dev/vmnet: port on hub 8 successfully opened >[ 4.107799] /dev/vmnet: open called by PID 2633 (vmnet-dhcpd) >[ 4.107810] /dev/vmnet: port on hub 8 successfully opened >[ 4.123471] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 4.123474] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 4.123484] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 4.124326] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 4.126697] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.130878] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.133994] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.137213] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.140431] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.143667] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.146905] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.150133] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.153345] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.156553] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.159948] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.163221] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.166511] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.169747] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.172887] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.176102] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.180216] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.184357] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.187745] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.190885] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.194115] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.197213] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.200590] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.203964] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.207104] [drm:i915_gem_open] >[ 4.207185] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.210403] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.213626] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.216856] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.220069] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.223290] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.226502] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.229716] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.233844] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.237970] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.241189] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.244423] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.244722] [drm:i915_gem_context_create_ioctl] HW context 1 created >[ 4.245729] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed >[ 4.247651] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.250938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.254198] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.256798] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.260061] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.263336] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.266849] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.270217] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.273507] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.276759] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.279960] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.283130] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.287215] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.291302] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.294521] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.297736] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.300955] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.304198] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.307412] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.310650] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.313844] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.317053] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.320349] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.323575] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.326794] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.329921] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.333139] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.336376] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.340456] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.344642] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.347838] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.351056] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.354277] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.357504] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.360739] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.364053] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.367300] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.370533] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.373775] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.376912] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.380149] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.383380] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.386616] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.389823] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.393906] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.398109] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.401601] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.404135] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.407363] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.410576] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.413799] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.417032] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.420255] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.423477] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.426708] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.429931] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.433151] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.436376] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.439593] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.442887] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.446965] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.451182] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.454409] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.457714] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.460873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.462781] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 4.462784] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 4.462786] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 4.463184] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 4.463483] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 4.463494] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 4.463497] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 4.463500] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 4.463505] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 4.463614] [drm:drm_mode_getconnector] [CONNECTOR:43:?] >[ 4.463616] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 4.463618] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 4.463620] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 4.463623] [drm:drm_mode_getconnector] [CONNECTOR:51:?] >[ 4.463625] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] >[ 4.463627] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] disconnected >[ 4.463630] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 4.463632] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] >[ 4.463689] [drm:drm_edid_to_eld] ELD monitor DELL U3415W >[ 4.463691] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 >[ 4.463713] [drm:drm_mode_debug_printmodeline] Modeline 97:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 4.463715] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 4.463718] [drm:drm_mode_debug_printmodeline] Modeline 101:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a >[ 4.463719] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 4.463722] [drm:drm_mode_debug_printmodeline] Modeline 102:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a >[ 4.463723] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE >[ 4.463726] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 >[ 4.463727] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 4.463730] [drm:drm_mode_debug_printmodeline] Modeline 110:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 4.463731] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 4.463734] [drm:drm_mode_debug_printmodeline] Modeline 114:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a >[ 4.463735] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 4.463739] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] probed modes : >[ 4.463742] [drm:drm_mode_debug_printmodeline] Modeline 57:"3440x1440" 60 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x48 0x9 >[ 4.463744] [drm:drm_mode_debug_printmodeline] Modeline 63:"3440x1440" 50 265250 3440 3520 3552 3600 1440 1461 1471 1474 0x40 0x9 >[ 4.463747] [drm:drm_mode_debug_printmodeline] Modeline 76:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9 >[ 4.463749] [drm:drm_mode_debug_printmodeline] Modeline 59:"2560x1080" 60 198000 2560 2708 2752 3000 1080 1091 1096 1100 0x40 0x5 >[ 4.463752] [drm:drm_mode_debug_printmodeline] Modeline 73:"1720x1440" 60 159940 1720 1760 1792 1800 1440 1446 1454 1481 0x40 0x9 >[ 4.463754] [drm:drm_mode_debug_printmodeline] Modeline 55:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 4.463757] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 4.463759] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 4.463762] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 >[ 4.463764] [drm:drm_mode_debug_printmodeline] Modeline 84:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 >[ 4.463767] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 4.463769] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 4.463772] [drm:drm_mode_debug_printmodeline] Modeline 61:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9 >[ 4.463774] [drm:drm_mode_debug_printmodeline] Modeline 60:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 >[ 4.463777] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 4.463779] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 4.463782] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 >[ 4.463784] [drm:drm_mode_debug_printmodeline] Modeline 69:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 >[ 4.463787] [drm:drm_mode_debug_printmodeline] Modeline 70:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa >[ 4.463789] [drm:drm_mode_debug_printmodeline] Modeline 71:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 >[ 4.463792] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 >[ 4.463794] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa >[ 4.463797] [drm:drm_mode_debug_printmodeline] Modeline 88:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa >[ 4.463799] [drm:drm_mode_debug_printmodeline] Modeline 75:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa >[ 4.463802] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa >[ 4.463804] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa >[ 4.463807] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa >[ 4.463809] [drm:drm_mode_debug_printmodeline] Modeline 67:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 >[ 4.463813] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 4.463843] [drm:drm_mode_getconnector] [CONNECTOR:40:?] >[ 4.463845] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 4.463847] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 4.464006] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 4.464016] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 4.464021] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 4.464028] [drm:drm_mode_getconnector] [CONNECTOR:47:?] >[ 4.464033] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 4.464038] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 4.464347] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.465612] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 4.465613] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 4.465616] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 4.466454] [drm:i915_gem_open] >[ 4.468197] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.471417] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.474627] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.477775] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.480994] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.484212] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.487421] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.490693] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.492040] [drm:i915_gem_context_create_ioctl] HW context 1 created >[ 4.492735] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed >[ 4.493901] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.494420] [drm:i915_gem_context_create_ioctl] HW context 1 created >[ 4.497165] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.497620] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 4.499817] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 4.507836] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 4.507840] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 4.507845] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 4.508693] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 4.511062] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.515312] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.515377] [drm:drm_mode_addfb2] [FB:58] >[ 4.515496] [drm:drm_mode_setcrtc] [CRTC:20] >[ 4.515500] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1] >[ 4.515503] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (0 0) >[ 4.515508] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=1 >[ 4.515511] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 4.515513] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 4.515516] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 4.515519] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 4.515521] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 4.515524] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 4.515527] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 4.515528] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 4.515531] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 4.515534] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 4.515535] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 4.515537] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 4.515539] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 4.515542] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 4.515544] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 4.515545] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 4.515547] [drm:intel_dump_pipe_config] requested mode: >[ 4.515550] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x0 0x9 >[ 4.515552] [drm:intel_dump_pipe_config] adjusted mode: >[ 4.515555] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 4.515558] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 4.515559] [drm:intel_dump_pipe_config] port clock: 270000 >[ 4.515561] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 4.515563] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 4.515565] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 4.515566] [drm:intel_dump_pipe_config] ips: 1 >[ 4.515568] [drm:intel_dump_pipe_config] double wide: 0 >[ 4.515572] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff880409654e40 >[ 4.518539] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.520828] [drm:ironlake_update_primary_plane] Writing base 010B7000 00000000 0 0 21504 >[ 4.521766] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.524987] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.528195] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.530894] [drm:drm_mode_setcrtc] [CRTC:24] >[ 4.530897] [drm:drm_mode_setcrtc] [CONNECTOR:49:DP-2] >[ 4.530899] [drm:intel_crtc_set_config] [CRTC:24] [FB:58] #connectors=1 (x y) (0 0) >[ 4.530902] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=1 >[ 4.530904] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 4.530906] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 4.530908] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 >[ 4.530910] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 4.530912] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 4.530914] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 4.530915] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 4.530916] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 4.530918] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 4.530920] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 1730150, gmch_n: 8388608, link_m: 288358, link_n: 1048576, tu: 14 >[ 4.530921] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 4.530922] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 4.530923] [drm:intel_dump_pipe_config] requested mode: >[ 4.530926] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x0 0x5 >[ 4.530927] [drm:intel_dump_pipe_config] adjusted mode: >[ 4.530929] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 0 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x0 0x5 >[ 4.530931] [drm:intel_dump_crtc_timings] crtc timings: 148500 1920 2008 2052 2200 1080 1082 1087 1125, type: 0x0 flags: 0x5 >[ 4.530932] [drm:intel_dump_pipe_config] port clock: 540000 >[ 4.530934] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 4.530935] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 4.530936] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 4.530938] [drm:intel_dump_pipe_config] ips: 0 >[ 4.530939] [drm:intel_dump_pipe_config] double wide: 0 >[ 4.530951] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff880409654180 >[ 4.530962] [drm:ironlake_update_primary_plane] Writing base 010B7000 00000000 0 0 21504 >[ 4.531924] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.535142] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.538354] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.540232] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=937/937 >[ 4.540234] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 4.540239] [drm:intel_edp_backlight_power] panel power control backlight disable >[ 4.541623] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.544764] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.548010] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.551256] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.554544] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.557853] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.561124] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.565211] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.569440] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.572710] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.575863] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.579139] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.582405] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.585680] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.588858] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.592126] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.595389] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.598669] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.601855] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.605109] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.608357] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.611630] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.614785] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.618881] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.623136] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.626408] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.629685] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.632845] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.636115] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.639354] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.642634] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.645836] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.649107] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.652370] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.655641] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.658833] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.662108] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.665352] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.668633] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.672728] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.676983] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.680223] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.683493] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.686760] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.690028] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.693267] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.696548] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.699759] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.703030] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.706280] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.709551] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.712748] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.716032] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.719307] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.722579] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.726675] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.730906] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.734183] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.737451] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.740708] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.740926] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=0/937 >[ 4.740930] [drm:intel_panel_actually_set_backlight] set backlight PWM = 37 >[ 4.741185] [drm:drm_mode_setcrtc] [CRTC:20] >[ 4.741189] [drm:drm_mode_setcrtc] [CONNECTOR:49:DP-2] >[ 4.741191] [drm:intel_crtc_set_config] [CRTC:20] [FB:58] #connectors=1 (x y) (1920 0) >[ 4.741194] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set >[ 4.741196] [drm:drm_mode_debug_printmodeline] Modeline 33:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 4.741198] [drm:drm_mode_debug_printmodeline] Modeline 77:"" 0 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x0 0x9 >[ 4.741200] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1 >[ 4.741202] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [NOCRTC] >[ 4.741203] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch >[ 4.741204] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch >[ 4.741205] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:20] >[ 4.741206] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 4.741207] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 4.741208] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 4.741210] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch >[ 4.741212] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 2 >[ 4.741213] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 4.741216] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 4.741218] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 4.741219] [drm:intel_dump_pipe_config] cpu_transcoder: A >[ 4.741220] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 4.741222] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 4.741223] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3725357, gmch_n: 8388608, link_m: 620892, link_n: 1048576, tu: 3 >[ 4.741225] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 4.741226] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 4.741227] [drm:intel_dump_pipe_config] requested mode: >[ 4.741229] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x0 0x9 >[ 4.741230] [drm:intel_dump_pipe_config] adjusted mode: >[ 4.741232] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x0 0x9 >[ 4.741233] [drm:intel_dump_crtc_timings] crtc timings: 319750 3440 3520 3552 3600 1440 1468 1478 1481, type: 0x0 flags: 0x9 >[ 4.741235] [drm:intel_dump_pipe_config] port clock: 540000 >[ 4.741236] [drm:intel_dump_pipe_config] pipe src size: 3440x1440 >[ 4.741237] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 4.741238] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 4.741239] [drm:intel_dump_pipe_config] ips: 1 >[ 4.741240] [drm:intel_dump_pipe_config] double wide: 0 >[ 4.741247] [drm:intel_mst_disable_dp] 1 >[ 4.741249] [drm:drm_dp_destroy_payload_step1] >[ 4.743578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.747321] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.750606] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.753799] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.756749] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 4.756752] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 4.757975] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.761252] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.764529] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.767727] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.771005] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.774242] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.777511] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.781607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.785787] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.789058] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.792297] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.795570] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.798784] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.802056] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.805320] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.808588] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.811775] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.815054] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.818319] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.821583] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.824773] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.828042] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.831282] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.835328] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.839582] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.842768] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.846037] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.849302] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.852571] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.855760] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.859041] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.862281] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.865551] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.868756] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.872025] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.875260] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.878537] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.881751] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.885023] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.885475] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 4.887301] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 4.887308] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 4.889062] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 4.891423] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.895656] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.898929] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.902209] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.905474] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.908682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.911953] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.915206] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.918486] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.921672] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.924949] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.928189] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.931461] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.934666] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.937935] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.941177] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.945286] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.949540] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.952727] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.955998] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.959264] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.962535] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.965724] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.969001] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.972241] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.975511] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.978762] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.982033] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.985308] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 4.988586] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 4.991830] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 4.995071] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 4.999164] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.003417] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.006713] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.009979] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.013264] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.016536] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.019705] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.022986] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.026244] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.029515] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.032700] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.035969] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.039204] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.042486] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.045692] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.048963] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.053045] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.057270] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.060545] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.063688] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.066970] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.070210] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.073484] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.076683] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.079952] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.083167] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.086385] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.089562] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.092769] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.095986] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.099194] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.102406] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.106499] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.110646] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.113854] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.117117] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.120334] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.123548] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.126754] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.129971] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.133178] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.136385] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.139632] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.142862] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.146100] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.149341] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.152554] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.155776] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.159851] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.163990] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.167214] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.170436] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.173624] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.176850] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.180052] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.183261] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.186464] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.189616] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.192882] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.196109] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.199372] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.202566] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.205824] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.209054] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.213137] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.217378] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.220556] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.223817] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.227101] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.230366] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.233585] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.236852] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.240095] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.243327] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.246516] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.249737] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.252954] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.256184] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.259425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.262621] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.263076] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 5.265145] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 5.269193] [drm:intel_dp_check_mst_status] got esi2 00 00 00 >[ 5.269196] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 5.271591] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.275849] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.279118] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.282378] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.285538] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.288133] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.288547] [drm:drm_dp_update_payload_part1] removing payload 0 >[ 5.289745] [drm:intel_mst_post_disable_dp] 1 >[ 5.291067] [drm:drm_dp_mst_put_payload_id] putting payload 1 >[ 5.291925] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.295431] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.295852] [drm:intel_fbc_update] disabled per chip default >[ 5.295855] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff88040bd34cc0 >[ 5.297015] [drm:intel_edp_backlight_off] >[ 5.299993] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.303224] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.305556] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.307891] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.310218] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.312531] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.315801] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.318129] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.320466] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.324573] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.328803] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.332082] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.335339] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.338517] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.341781] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.345011] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.348278] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.351513] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.354767] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.358037] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.361254] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.364580] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.367873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.371142] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.374402] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.376123] [drm:intel_wait_ddi_buf_idle] *ERROR* Timeout waiting for DDI BUF C idle bit >[ 5.378527] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.382783] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.386024] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.389291] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.392603] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.395873] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.399140] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.402419] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.405562] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.408826] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.412082] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.415348] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.418558] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.421838] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.425086] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.428357] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.430077] [drm:intel_wait_ddi_buf_idle] *ERROR* Timeout waiting for DDI BUF C idle bit >[ 5.432467] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.436731] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.439999] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.443271] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.446482] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.449729] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.452968] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.456246] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.459477] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.462714] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.465929] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.469199] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.472473] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.475722] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.478987] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.482244] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.483969] [drm:intel_wait_ddi_buf_idle] *ERROR* Timeout waiting for DDI BUF C idle bit >[ 5.486358] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.490535] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.493804] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.497045] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.497638] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 >[ 5.500323] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.503532] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.506798] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.510051] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.513324] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.513912] [drm:edp_panel_off] Turn eDP port A panel power off >[ 5.513916] [drm:wait_panel_off] Wait for panel power off time >[ 5.513920] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 >[ 5.568687] [drm:wait_panel_status] Wait complete >[ 5.568700] [drm:intel_fbc_update] no output, disabling >[ 5.568710] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 5.568736] [drm:intel_mst_pre_enable_dp] 0 >[ 5.569602] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.575108] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.575527] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.579632] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.582299] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.584935] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.587620] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.590295] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.592930] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.595594] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.598281] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.600919] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.603585] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.606253] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.608903] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.611573] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.614237] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.616887] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.619569] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.622241] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.624885] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.627550] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.630228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.636455] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.636874] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.640939] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.643603] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.646264] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.648906] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.651577] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.654241] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.656871] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.659553] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.662224] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.664871] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.667532] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.670214] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.672865] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.675530] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.678193] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.680872] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.683542] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.686206] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.688861] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.691543] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.696006] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.699988] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.700406] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.704505] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.707169] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.709835] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.712517] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.715189] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.717851] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.720513] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.723197] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.725846] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.728510] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.731172] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.733853] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.736524] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.739191] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.741838] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.744521] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.747192] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.749838] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.752502] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.755182] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.761409] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.761829] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.765929] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.768593] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.771255] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.773937] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.776609] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.779272] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.781935] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.784616] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.787288] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.789952] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.792614] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.795296] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.797966] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.800631] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.803291] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.805976] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.808647] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.811311] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.816123] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.816575] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.819247] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.821928] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.824601] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.827262] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.829926] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.832606] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.835280] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.837945] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.840613] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.843306] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.845497] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 5.846924] [drm:intel_dp_check_mst_status] got esi 00 00 00 >[ 5.847774] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.849482] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 5.849484] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 5.852140] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.853409] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 5.853411] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 5.856667] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.859901] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.863173] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.866325] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.869588] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.872859] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.876127] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.879324] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.882592] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.885863] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.889126] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.892320] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.895581] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.898858] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.902941] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.907187] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.910378] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.913641] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.916881] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.920143] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.923305] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.926576] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.929838] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.933101] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.936307] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.939566] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.942842] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.946114] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.949300] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.952571] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 5.956622] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.960796] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.964067] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.967295] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.970576] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.973859] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.977128] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.980355] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.983626] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.986870] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.990152] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 5.993354] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 5.996628] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 5.999892] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.003164] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.006351] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.010433] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.014669] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.017943] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.021219] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.024446] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.027704] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.030972] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.034211] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.037456] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.040710] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.043991] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.047283] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.050552] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.053839] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.057109] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.060332] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.060781] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 6.062852] [drm:drm_dp_mst_allocate_vcpi] initing vcpi for 89 3 >[ 6.075726] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 6.075729] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 6.075742] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 6.076586] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 6.078876] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.083132] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.086321] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.090008] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.093273] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.096558] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.099838] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.103116] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.106310] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.108921] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.112607] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.115880] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.119156] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.122415] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.125657] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.128927] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.133033] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.137233] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.140499] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.143774] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.147054] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.150230] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.153430] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.156673] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.159940] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.163179] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.166459] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.169729] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.173001] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.176746] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.180014] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.183224] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.187335] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.191557] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.194815] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.198085] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.201275] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.204690] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.207901] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.211182] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.214450] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.217177] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.220864] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.224134] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.227377] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.230628] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.233895] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.237176] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.241284] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.245541] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.248798] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.252067] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.255761] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.259031] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.262188] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.265464] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.268716] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.271923] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.274660] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.278247] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.281514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.284761] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.288029] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.291244] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.295341] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.298428] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.302100] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.305239] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.308516] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.311769] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.315041] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.318234] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.321438] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.324701] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.327982] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.331164] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.334432] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.337683] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.340954] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.344637] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.348726] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.352981] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.356151] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.359422] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.362649] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.365860] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.369155] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.372433] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.375715] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.378983] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.382147] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.385821] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.389097] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.392376] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.395646] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.398915] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.403425] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.407622] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.410888] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.414137] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.417414] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.420683] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.424305] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.427578] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.430844] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.434119] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.437395] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.440671] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.443948] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.444378] [drm:drm_dp_dpcd_write_payload] status not set after read payload table status 4 >[ 6.444478] [drm:intel_mst_enable_dp] 1 >[ 6.447655] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.448296] [drm:intel_mst_enable_dp] *ERROR* Timed out waiting for ACT sent >[ 6.450862] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.453875] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.454735] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 6.456994] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 6.470658] [drm:drm_dp_check_act_status] failed to get ACT bit 4 after 30 retries >[ 6.470659] [drm:drm_dp_update_payload_part2] payload 0 0 >[ 6.470663] [drm:ironlake_update_primary_plane] Writing base 010B7000 FFFFFFFFFFFF2E00 0 0 21504 >[ 6.482913] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 6.482917] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 6.482934] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 6.483781] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 6.486182] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.490438] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.491283] [drm:intel_fbc_update] disabled per chip default >[ 6.491291] [drm:intel_connector_check_state] [CONNECTOR:49:DP-2] >[ 6.491294] [drm:check_encoder_state] [ENCODER:30:TMDS-30] >[ 6.491296] [drm:check_encoder_state] [ENCODER:39:TMDS-39] >[ 6.491298] [drm:check_encoder_state] [ENCODER:42:TMDS-42] >[ 6.491300] [drm:check_encoder_state] [ENCODER:44:DP MST-44] >[ 6.491302] [drm:check_encoder_state] [ENCODER:45:DP MST-45] >[ 6.491304] [drm:check_encoder_state] [ENCODER:46:DP MST-46] >[ 6.491305] [drm:check_crtc_state] [CRTC:20] >[ 6.491313] [drm:check_crtc_state] [CRTC:24] >[ 6.491315] [drm:check_crtc_state] [CRTC:28] >[ 6.491318] [drm:check_shared_dpll_state] WRPLL 1 >[ 6.491320] [drm:check_shared_dpll_state] WRPLL 2 >[ 6.491441] [drm:drm_mode_setcrtc] [CRTC:24] >[ 6.491444] [drm:intel_crtc_set_config] [CRTC:24] [NOFB] >[ 6.491448] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=0, fb_changed=0 >[ 6.491451] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:20] >[ 6.491455] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 6.491869] [drm:drm_mode_setcrtc] [CRTC:24] >[ 6.491873] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1] >[ 6.491875] [drm:intel_crtc_set_config] [CRTC:24] [FB:58] #connectors=1 (x y) (0 0) >[ 6.491877] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set >[ 6.491879] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set >[ 6.491882] [drm:drm_mode_debug_printmodeline] Modeline 54:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 6.491885] [drm:drm_mode_debug_printmodeline] Modeline 77:"" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x0 0x9 >[ 6.491886] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=0 >[ 6.491888] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch >[ 6.491890] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:24] >[ 6.491891] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:20] >[ 6.491893] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 6.491894] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch >[ 6.491896] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 0 >[ 6.491899] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 6.491900] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 6.491903] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 6.491905] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 6.491907] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 6.491909] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 6.491911] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 6.491912] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 6.491914] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 6.491915] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 6.491918] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 6.491919] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 6.491921] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 6.491922] [drm:intel_dump_pipe_config] requested mode: >[ 6.491925] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x0 0x9 >[ 6.491926] [drm:intel_dump_pipe_config] adjusted mode: >[ 6.491929] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 6.491931] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 6.491933] [drm:intel_dump_pipe_config] port clock: 270000 >[ 6.491934] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 6.491936] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 6.491938] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 6.491939] [drm:intel_dump_pipe_config] ips: 0 >[ 6.491940] [drm:intel_dump_pipe_config] double wide: 0 >[ 6.491947] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 6.492296] [drm:edp_panel_on] Turn eDP port A panel power on >[ 6.492300] [drm:wait_panel_power_cycle] Wait for panel power cycle >[ 6.492306] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 >[ 6.492311] [drm:wait_panel_status] Wait complete >[ 6.492316] [drm:wait_panel_on] Wait for panel power on >[ 6.492319] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 >[ 6.701278] [drm:wait_panel_status] Wait complete >[ 6.701288] [drm:edp_panel_vdd_on] Turning eDP port A VDD on >[ 6.701294] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b >[ 6.702334] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.703095] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.704067] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.704930] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.705838] [drm:intel_dp_start_link_train] clock recovery OK >[ 6.707462] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful >[ 6.707679] [drm:intel_edp_backlight_on] >[ 6.707680] [drm:intel_panel_enable_backlight] pipe B >[ 6.707687] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 6.708542] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.708546] [drm:intel_psr_match_conditions] PSR disable by flag >[ 6.708548] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS >[ 6.711810] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.715027] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.718317] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.721596] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.724870] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.728086] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.731356] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.734602] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.737882] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.740303] [drm:ironlake_update_primary_plane] Writing base 010B7000 00000000 0 0 21504 >[ 6.740309] [drm:intel_fbc_update] more than one pipe active, disabling compression >[ 6.740314] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1] >[ 6.740319] [drm:intel_connector_check_state] [CONNECTOR:49:DP-2] >[ 6.740321] [drm:check_encoder_state] [ENCODER:30:TMDS-30] >[ 6.740323] [drm:check_encoder_state] [ENCODER:39:TMDS-39] >[ 6.740325] [drm:check_encoder_state] [ENCODER:42:TMDS-42] >[ 6.740327] [drm:check_encoder_state] [ENCODER:44:DP MST-44] >[ 6.740329] [drm:check_encoder_state] [ENCODER:45:DP MST-45] >[ 6.740331] [drm:check_encoder_state] [ENCODER:46:DP MST-46] >[ 6.740333] [drm:check_crtc_state] [CRTC:20] >[ 6.740340] [drm:check_crtc_state] [CRTC:24] >[ 6.740347] [drm:check_crtc_state] [CRTC:28] >[ 6.740350] [drm:check_shared_dpll_state] WRPLL 1 >[ 6.740352] [drm:check_shared_dpll_state] WRPLL 2 >[ 6.740382] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=937/937 >[ 6.740384] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 6.741083] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.746360] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.751487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.755662] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.758885] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.762046] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.765574] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.768796] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.771947] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.775171] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.778450] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.781030] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.786336] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.789644] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.792867] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.796036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.799255] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.802488] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.806562] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.810807] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.813979] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.817209] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.820450] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.823693] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.826939] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.830226] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.833456] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.836682] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.839932] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.843162] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.846386] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.849619] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.852864] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.856016] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.860115] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.864303] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.867538] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.870749] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.873928] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.877134] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.880352] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.883590] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.886819] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.890015] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.893252] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.896481] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.899710] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.902910] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.906156] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.909418] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.913506] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.917706] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.920914] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.924164] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.927423] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.930655] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.933915] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.937148] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.940375] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.943609] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.946853] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.949988] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.953219] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.956468] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.959700] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.962904] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 6.966987] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.971191] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.974436] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.977668] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.980880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.984087] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.987310] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 6.990545] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 6.993768] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 6.996882] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.000084] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.003316] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.006541] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.009773] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.012966] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.016206] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.020287] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.024491] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.027724] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.030883] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.034131] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.037368] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.040605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.043873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.047109] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.050346] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.053593] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.056849] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.060061] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.063290] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.066523] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.069758] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.070210] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 7.072498] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 7.073666] [drm:intel_set_cpu_fifo_underrun_reporting] *ERROR* uncleared fifo underrun on pipe A >[ 7.073671] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe A FIFO underrun >[ 7.105781] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 7.105784] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 7.105813] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 7.106664] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 7.109059] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.113264] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.116502] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.119739] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.122926] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.126161] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.129408] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.132648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.135837] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.139058] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.142284] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.145496] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.148729] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.151227] cfg80211: Calling CRDA to update world regulatory domain >[ 7.151919] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.153158] cfg80211: World regulatory domain updated: >[ 7.153160] cfg80211: DFS Master region: unset >[ 7.153161] cfg80211: (start_freq - end_freq @ bandwidth), (max_antenna_gain, max_eirp), (dfs_cac_time) >[ 7.153163] cfg80211: (2402000 KHz - 2472000 KHz @ 40000 KHz), (300 mBi, 2000 mBm), (N/A) >[ 7.153164] cfg80211: (2457000 KHz - 2482000 KHz @ 40000 KHz), (300 mBi, 2000 mBm), (N/A) >[ 7.153165] cfg80211: (2474000 KHz - 2494000 KHz @ 20000 KHz), (300 mBi, 2000 mBm), (N/A) >[ 7.153166] cfg80211: (5170000 KHz - 5250000 KHz @ 40000 KHz), (300 mBi, 2000 mBm), (N/A) >[ 7.153167] cfg80211: (5735000 KHz - 5835000 KHz @ 40000 KHz), (300 mBi, 2000 mBm), (N/A) >[ 7.155236] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.158475] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.162473] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.166676] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.169821] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.173528] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.176918] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.180223] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.182893] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.186127] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.189436] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.192657] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.195892] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.199114] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.201836] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.205324] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.208549] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.211862] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.216425] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.220592] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.223781] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.227002] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.230227] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.233434] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.236640] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.239774] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.242981] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.246194] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.249413] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.252636] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.255872] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.259100] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.262418] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.265646] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.270245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.274426] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.277647] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.280395] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.284004] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.287227] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.290446] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.293682] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.296953] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.300173] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.303403] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.306629] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.309762] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.312993] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.316225] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.319453] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.324317] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.328520] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.331763] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.334992] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.338229] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.341470] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.344698] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.347845] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.351075] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.354437] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.358294] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.361879] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.365289] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.368703] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.371943] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.375170] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.379321] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.383511] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.386735] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.389964] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.393670] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.399594] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.402254] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.405739] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.410177] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.412895] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.416128] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.419511] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.423303] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.426802] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.430574] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.433993] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.438112] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.442284] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.445518] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.448725] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.451966] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.455198] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.458437] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.461680] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.464910] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.468159] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.471410] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.474635] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.477793] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.481025] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.484256] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.487503] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.487965] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 7.490337] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 7.522797] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 7.522801] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 7.522803] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 7.523105] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 7.523396] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 7.523406] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 7.523409] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 7.523413] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 7.523418] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 7.523521] [drm:drm_mode_getconnector] [CONNECTOR:43:?] >[ 7.523523] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 7.523525] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 7.523526] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 7.523530] [drm:drm_mode_getconnector] [CONNECTOR:51:?] >[ 7.523532] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] >[ 7.523534] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] disconnected >[ 7.523541] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 7.523543] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] >[ 7.523600] [drm:drm_edid_to_eld] ELD monitor DELL U3415W >[ 7.523601] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 >[ 7.523625] [drm:drm_mode_debug_printmodeline] Modeline 104:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 7.523626] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 7.523629] [drm:drm_mode_debug_printmodeline] Modeline 108:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a >[ 7.523631] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 7.523633] [drm:drm_mode_debug_printmodeline] Modeline 109:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a >[ 7.523635] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE >[ 7.523637] [drm:drm_mode_debug_printmodeline] Modeline 111:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 >[ 7.523639] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 7.523641] [drm:drm_mode_debug_printmodeline] Modeline 117:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 7.523643] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 7.523645] [drm:drm_mode_debug_printmodeline] Modeline 121:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a >[ 7.523647] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 7.523651] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] probed modes : >[ 7.523653] [drm:drm_mode_debug_printmodeline] Modeline 57:"3440x1440" 60 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x48 0x9 >[ 7.523655] [drm:drm_mode_debug_printmodeline] Modeline 63:"3440x1440" 50 265250 3440 3520 3552 3600 1440 1461 1471 1474 0x40 0x9 >[ 7.523658] [drm:drm_mode_debug_printmodeline] Modeline 76:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9 >[ 7.523660] [drm:drm_mode_debug_printmodeline] Modeline 59:"2560x1080" 60 198000 2560 2708 2752 3000 1080 1091 1096 1100 0x40 0x5 >[ 7.523662] [drm:drm_mode_debug_printmodeline] Modeline 73:"1720x1440" 60 159940 1720 1760 1792 1800 1440 1446 1454 1481 0x40 0x9 >[ 7.523665] [drm:drm_mode_debug_printmodeline] Modeline 55:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 7.523667] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 7.523669] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 7.523671] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 >[ 7.523674] [drm:drm_mode_debug_printmodeline] Modeline 84:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 >[ 7.523676] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 7.523678] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 7.523681] [drm:drm_mode_debug_printmodeline] Modeline 61:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9 >[ 7.523683] [drm:drm_mode_debug_printmodeline] Modeline 60:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 >[ 7.523686] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 7.523688] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 7.523691] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 >[ 7.523693] [drm:drm_mode_debug_printmodeline] Modeline 69:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 >[ 7.523696] [drm:drm_mode_debug_printmodeline] Modeline 70:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa >[ 7.523698] [drm:drm_mode_debug_printmodeline] Modeline 71:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 >[ 7.523701] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 >[ 7.523703] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa >[ 7.523706] [drm:drm_mode_debug_printmodeline] Modeline 88:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa >[ 7.523708] [drm:drm_mode_debug_printmodeline] Modeline 75:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa >[ 7.523710] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa >[ 7.523713] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa >[ 7.523715] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa >[ 7.523718] [drm:drm_mode_debug_printmodeline] Modeline 67:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 >[ 7.523720] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 7.523747] [drm:drm_mode_getconnector] [CONNECTOR:40:?] >[ 7.523748] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 7.523750] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 7.523912] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 7.523915] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 7.523917] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 7.523924] [drm:drm_mode_getconnector] [CONNECTOR:47:?] >[ 7.523925] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 7.523926] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 7.524082] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 7.524085] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 7.524087] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 7.525621] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 7.525624] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 7.525634] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 7.526473] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 7.528839] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.533015] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.536319] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.539552] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.542693] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.545860] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.549096] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.552346] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.555580] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.558786] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.562198] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.565427] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.568662] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.571889] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.575127] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.578368] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.582439] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.586645] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.589758] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.592999] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.596256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.599503] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.602697] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.605944] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.609174] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.612449] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.615669] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.618888] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.622105] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.625348] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.628586] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.631747] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.635836] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.640070] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.643301] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.646539] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.649732] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.652956] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.657327] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.660560] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.663984] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.667432] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.670200] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.673436] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.676630] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.679865] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.683143] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.686975] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.691418] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.694720] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.698004] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.702671] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.706491] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.709992] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.710395] [drm:drm_mode_addfb2] [FB:77] >[ 7.713458] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.716702] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.719932] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.723183] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.726426] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.729656] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.732898] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.736152] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.739387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.742699] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.746786] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.750887] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.754180] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.755742] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 7.755762] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 7.757444] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.760109] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.763702] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.767501] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.770741] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.773956] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.777164] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.780390] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.783610] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.786829] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.790059] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.793288] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.798247] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.802477] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.806132] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.808851] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.812093] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.815418] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.818069] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.818811] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 7.818829] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 7.822247] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.825648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.831251] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.834555] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.837879] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.841100] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.844318] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.847547] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.850761] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.853979] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.858058] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.862247] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.865555] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.868773] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.872011] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.875234] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.878458] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.879467] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 7.879484] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 7.881643] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.884866] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.888123] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.891354] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.894576] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.895214] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 7.895230] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 7.897797] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.901057] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.904296] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.907566] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.908017] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 7.910197] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 7.910400] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 7.910412] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 7.919939] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 7.919942] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 7.919964] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 7.920805] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 7.923169] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.927311] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 7.927352] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 7.927373] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.930594] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.933841] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.937105] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.940357] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.943580] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.943663] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 7.943691] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 7.946836] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.950094] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.953356] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.956582] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.959856] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.960271] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 7.960324] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 7.963128] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.966383] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.969533] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.972810] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 7.976578] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 7.976603] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 7.976958] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.981170] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.984416] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.987631] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 7.990910] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 7.993369] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 7.993414] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 7.994154] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 7.997394] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.000599] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.003846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.007104] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.010284] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.010329] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.010377] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.013577] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.016835] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.020071] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.023346] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.026573] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.026949] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.026993] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.030706] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.034981] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.038254] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.041513] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.043305] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.043329] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.044775] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.048029] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.051279] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.054537] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.057824] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.059990] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.060012] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.061066] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.064322] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.067542] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.070816] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.074104] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.076723] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.076765] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.077367] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.080592] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.084692] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.088929] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.092213] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.093277] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.093332] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.095463] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.098694] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.101929] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.105213] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.108505] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.109872] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.109892] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.111752] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.115010] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.118264] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.121496] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.124744] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.126675] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.126722] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.127986] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.131227] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.134463] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.138577] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.142856] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.143617] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.143643] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.146103] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.149347] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.152559] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.155846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.159094] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.160168] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.160204] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.162396] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.165570] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.168851] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.172102] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.175371] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.176641] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.176722] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.178558] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.181784] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.185028] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.188302] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.192404] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.193491] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.193523] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.196689] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.199986] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.203270] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.206486] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.209766] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.210278] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.210321] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.213007] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.216261] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.219425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.222631] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.225897] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.226948] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.226970] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.229165] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.232382] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.235513] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.238786] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.242032] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.243346] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.243371] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.246068] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.250256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.253440] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.256711] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.259995] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.260273] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.260320] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.263248] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.266408] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.269638] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.272898] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.276177] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.276964] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.276990] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.279427] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.282653] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.285883] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.289162] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.292420] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.293541] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.293579] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.295507] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.295964] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 8.298049] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 8.303119] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 8.303123] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 8.303133] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 8.303986] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 8.306356] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.310493] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.313709] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.316931] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.320155] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.323388] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.326605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.329844] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.333193] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.336407] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.339635] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.342856] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.344415] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.344447] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.346088] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.349328] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.352509] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.355749] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.359827] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.364031] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.367283] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.370453] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.370877] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.370907] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.373749] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.376977] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.377314] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.377361] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.380221] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.383384] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.386656] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.389934] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.393216] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.393985] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.394009] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.396388] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.399603] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.402854] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.406125] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.409398] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.410372] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.410402] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.413578] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.417841] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.421110] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.424348] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.427002] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.427047] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.427589] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.430808] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.434052] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.437340] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.440471] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.443708] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.443919] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.443957] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.446958] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.450202] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.453374] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.456654] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.459884] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.460492] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.460530] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.463125] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.467284] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.471459] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.474704] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.476094] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.476126] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.477976] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.481275] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.484459] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.487736] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.491026] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.492527] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.492551] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.494292] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.497457] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.500745] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.504017] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.507290] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.509051] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.509075] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.510539] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.513814] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.517080] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.521186] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.525585] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.526196] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.526230] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.528873] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.532158] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.535353] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.538625] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.541857] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.542784] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.542827] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.545174] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.548356] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.551610] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.554859] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.558104] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.561322] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.564602] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.567841] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.571107] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.575216] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.579350] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.582621] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.585860] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.589135] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.592330] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.595579] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.598837] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.602107] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.605343] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.608613] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.611899] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.615162] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.618333] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.621597] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.624838] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.628930] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.633158] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.636330] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.639591] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.642866] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.646095] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.649321] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.652592] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.655864] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.659091] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.662321] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.665577] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.668808] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.672078] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.675316] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.678549] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.678995] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 8.680936] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 8.712342] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 8.712345] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 8.712355] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 8.713209] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 8.715601] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.719791] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.723065] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.726306] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.729558] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.732804] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.736076] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.739308] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.742586] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.745825] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.749102] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.752290] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.755565] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.758830] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.762077] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.765285] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.769370] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.773616] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.776855] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.780113] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.783272] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.786474] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.789745] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.793000] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.796248] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.799341] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.802624] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.805882] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.809158] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.812460] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.815731] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.819004] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.823076] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.827206] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.830414] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.833626] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.836446] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.836469] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.836905] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.840139] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.843303] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.846582] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.849822] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.853092] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.856317] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.859586] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.862826] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.866104] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.869311] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.872579] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.876664] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.880892] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.884158] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.887308] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.890586] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.893839] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.897104] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.900300] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.903578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.906832] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.910076] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.913282] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.914492] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.914507] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.916583] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.919830] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.923067] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.926269] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.927713] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.927733] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.930352] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.934536] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.937755] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.940970] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.942681] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.942701] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.944175] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.947408] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.950632] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.953860] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.957093] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.959611] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.959630] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.960267] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.963498] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.966750] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.969982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.973176] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.976058] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 8.976076] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 8.976408] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.979656] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 8.983766] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.987962] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 8.991172] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 8.992679] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 8.992699] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 8.994431] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 8.997733] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.000985] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.004165] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.007382] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.009497] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.009512] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.010608] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.013853] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.017085] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.020237] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.023446] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.025991] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.026009] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.026687] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.029912] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.033144] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.037245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.041436] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.044764] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.047977] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.051149] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.054367] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.057588] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.058073] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.058084] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.060870] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.064124] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.067371] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.070625] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.073875] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.076853] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.076871] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.077137] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.080418] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.083682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.086952] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.087402] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 9.089786] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 9.092942] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.092955] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.097709] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 9.097712] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 9.097752] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 9.098602] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 9.101003] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.105162] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.108434] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.109698] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.109710] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.111740] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.115000] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.118143] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.121357] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.124645] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.126066] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.126092] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.127938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.131147] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.134402] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.137673] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.140952] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.142819] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.142843] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.144134] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.147185] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.150413] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.154479] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.158679] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.159446] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.159460] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.161957] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.165149] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.168429] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.171640] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.174910] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.176890] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.176903] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.178129] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.181417] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.184662] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.187942] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.191135] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.192459] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.192484] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.194427] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.197654] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.200940] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.204128] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.208224] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.209242] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.209256] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.212531] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.215816] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.219074] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.222364] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.225580] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.225978] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.225993] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.228811] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.232043] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.235180] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.238412] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.241643] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.242780] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.242796] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.244875] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.248053] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.251276] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.254497] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.257738] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.259478] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 9.259494] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 9.260957] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.265044] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.268263] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.271486] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.274726] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.276034] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 9.276050] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 9.277947] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.281130] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.284354] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.287627] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.290852] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.294053] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.297278] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.300499] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.303743] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.306986] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.310133] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.314204] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.318396] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.325141] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.328373] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.331602] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.334813] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.338114] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.341359] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.344591] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.347823] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.351039] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.354261] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.357510] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.360754] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.364024] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.367268] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.371359] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.375556] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.378829] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.382059] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.385321] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.388566] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.391838] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.395036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.398307] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.401554] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.404834] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.407046] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0000 >[ 9.407075] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff8803f8ce0f00 >[ 9.408040] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.411253] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.414490] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.417760] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.420252] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0a80 >[ 9.420265] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff8803f8ce0000 >[ 9.421006] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.425107] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.429359] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.432598] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.434281] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0f00 >[ 9.434291] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff8803f8ce0a80 >[ 9.435873] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.439041] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.442287] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.445559] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.448119] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0000 >[ 9.448131] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff8803f8ce0f00 >[ 9.448833] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.452022] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.455212] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.458466] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.459417] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d06c0 >[ 9.459426] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff8803ff9d0b40 >[ 9.461750] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.465036] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.468315] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.471597] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.474874] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.475330] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 9.477618] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 9.499176] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 9.499180] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 9.499198] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 9.500048] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 9.502449] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.506688] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.509950] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.513193] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.516442] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.519711] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.522982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.526262] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.529549] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.532820] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.536009] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.539283] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.542559] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.545834] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.549000] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.552277] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.556379] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.560553] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.563759] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.566994] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.570254] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.573511] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.576785] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.579989] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.583261] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.586505] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.589783] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.592987] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.596256] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.599522] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.602791] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.605981] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.610073] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.614332] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.617594] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.620864] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.624040] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.627302] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.630541] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.633820] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.637036] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.640304] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.643547] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.646815] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.650033] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.653313] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.656587] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.659861] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.663958] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.668219] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.671504] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.674776] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.678021] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.681290] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.684534] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.687814] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.691016] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.694287] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.697574] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.700843] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.704013] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.707293] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.710567] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.713815] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.717905] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.722153] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.725396] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.728654] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.731932] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.735163] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.738394] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.741664] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.744928] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.748162] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.751473] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.754741] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.757927] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.761210] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.764480] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.767753] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.771835] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.775989] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.779254] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.782495] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.785786] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.788980] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.792249] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.795527] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.798800] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.802053] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.805342] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.808593] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.811831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.814972] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.818213] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.821456] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.825530] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.829787] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.832968] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.836241] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.839509] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.842746] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.845900] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.849152] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.852419] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.855675] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.858884] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.862098] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.865355] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.868631] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.871900] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.875187] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.875635] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 9.877515] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 9.879094] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 9.879097] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 9.879103] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 9.879949] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 9.882343] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.886561] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.889836] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.893087] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.896327] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.899588] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.902838] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.906090] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.909322] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.912585] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.915871] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.919134] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.922365] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.925634] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.928860] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.932124] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.936199] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.940334] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.943592] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.946861] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.950139] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.953415] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.956658] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.959854] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.963063] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.966337] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.969613] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.972857] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.976130] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.979418] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.982690] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 9.985845] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 9.989937] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 9.994195] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 9.997448] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.000716] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.003902] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.007182] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.010419] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.013702] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.016898] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.020171] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.023434] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.026701] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.029894] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.033177] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.036451] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.039722] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.043817] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.048072] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.051314] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.054583] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.057821] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.061091] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.064330] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.067608] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.070810] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.074082] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.077302] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.080578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.083868] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.087142] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.090375] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.093587] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.097671] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.101864] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.105132] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.108364] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.111637] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.114791] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.118053] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.121293] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.124553] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.127788] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.131061] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.134291] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.137551] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.140785] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.144044] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.147275] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.151371] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.155700] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.158828] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.162094] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.165346] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.168619] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.171780] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.175032] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.178303] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.181572] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.184770] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.188041] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.191324] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.194603] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.197765] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.201006] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.205105] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.209285] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.212559] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.215810] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.219080] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.222310] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.225578] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.228750] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.232009] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.235240] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.238508] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.241726] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.244932] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.248141] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.251359] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.254559] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.255008] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 10.257345] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 10.283924] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 10.283929] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 10.283967] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 10.284812] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 10.287208] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.291370] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.294655] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.297891] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.301366] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.310546] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.314120] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.317372] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.320622] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.323770] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.326618] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.329761] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.332988] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.336230] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.339445] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.342656] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.342837] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.342855] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.346737] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.350914] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.354164] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.357430] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.359667] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 10.359681] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 10.360652] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.363857] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.367078] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.370360] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.373622] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.375281] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.375303] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.376778] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.380057] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.383313] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.386573] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.389758] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.391951] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 10.391965] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 10.392968] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.396226] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.400320] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.404578] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.407758] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.409107] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.409119] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.410984] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.414243] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.417461] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.420687] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.423968] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.425605] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 10.425631] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 10.427194] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.430433] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.433648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.436909] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.440172] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.442074] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.442085] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.443445] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.446687] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.449942] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.454032] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.458231] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.459882] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 10.459897] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 10.461470] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.464622] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.467844] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.471106] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.474369] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.475597] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.475608] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.477605] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.480817] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.484103] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.487388] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.490668] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.492139] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 10.492171] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 10.493956] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.497204] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.500449] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.503660] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.507766] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.508967] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.508988] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.511987] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.515212] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.518467] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.521652] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.524907] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.525863] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off >[ 10.525871] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 >[ 10.525979] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 10.525997] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 10.528128] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.531354] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.534598] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.537842] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.541129] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.542467] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.542480] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.544397] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.547640] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.550715] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.553989] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.557268] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.559387] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34d80 >[ 10.559415] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff88040bd34480 >[ 10.561355] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.565569] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.568817] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.572058] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.575093] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34d80 >[ 10.575108] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff88040bd34480 >[ 10.575327] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.578773] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.586355] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.589670] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.592921] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.595606] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.598132] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb4540 >[ 10.598149] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff88040abb4180 >[ 10.600195] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.603464] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.606628] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.609910] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.613186] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.616459] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.620560] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.624797] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.628074] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.631343] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.634610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.637879] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.641147] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.644420] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.647600] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.650861] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.654085] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.657358] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.658358] wlp2s0: authenticate with 58:6d:8f:47:30:cd >[ 10.660627] wlp2s0: send auth to 58:6d:8f:47:30:cd (try 1/3) >[ 10.660733] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.661398] wlp2s0: authenticated >[ 10.661776] wlp2s0: associate with 58:6d:8f:47:30:cd (try 1/3) >[ 10.662513] wlp2s0: RX AssocResp from 58:6d:8f:47:30:cd (capab=0x11 status=0 aid=4) >[ 10.663547] wlp2s0: associated >[ 10.663922] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.667122] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.670334] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.670788] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 10.673189] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 10.681962] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb4e40 >[ 10.681979] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff88040abb4540 >[ 10.683702] /dev/vmnet: open called by PID 2525 (vmnet-bridge) >[ 10.683709] /dev/vmnet: hub 0 does not exist, allocating memory. >[ 10.683724] /dev/vmnet: port on hub 0 successfully opened >[ 10.683729] bridge-wlp2s0: device is wireless, enabling SMAC >[ 10.683731] bridge-wlp2s0: up >[ 10.684019] bridge-wlp2s0: attached >[ 10.695390] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce16c0 >[ 10.695403] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff8803f8ce1540 >[ 10.697899] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 10.697902] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 10.697909] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 10.698773] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 10.701159] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.705434] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.708622] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.711846] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.714516] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39a80 >[ 10.715004] [drm:drm_atomic_set_fb_for_plane] Set [FB:80] for plane state ffff8800daf39180 >[ 10.715028] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.718253] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.721464] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.724622] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.727828] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.731053] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.734291] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.737516] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.741220] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.744473] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.747625] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.750855] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.754933] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.759108] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.762327] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.765520] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.768770] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.772432] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.776442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.779638] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.782516] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.785749] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.788991] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.792330] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.795520] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.798823] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.802096] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.805310] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.809531] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.813709] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.816931] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.820438] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.823737] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.826978] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.830213] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.833486] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.836712] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.839942] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.843193] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.844562] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800dbafcc00 >[ 10.844577] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8800dbafce40 >[ 10.846422] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.849732] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.853060] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.856285] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.859575] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.863765] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.867945] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.871266] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.874523] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.877570] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.880351] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.883708] userif-3: sent link down event. >[ 10.883712] userif-3: sent link up event. >[ 10.884481] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.887315] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.890808] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.894180] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.897462] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.900681] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.903922] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.907241] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.910463] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.913728] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.917818] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.922001] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.925233] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.928476] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.931722] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.934957] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.938200] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.939107] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 10.939111] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 10.939112] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 10.939153] [drm:edp_panel_vdd_on] Turning eDP port A VDD on >[ 10.939159] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000f >[ 10.939459] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 10.939975] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 10.939987] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 10.939990] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 10.939994] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 10.939998] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 10.940095] [drm:drm_mode_getconnector] [CONNECTOR:43:?] >[ 10.940097] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 10.940099] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 10.940101] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 10.940105] [drm:drm_mode_getconnector] [CONNECTOR:51:?] >[ 10.940107] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] >[ 10.940109] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] disconnected >[ 10.940119] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 10.940120] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] >[ 10.940179] [drm:drm_edid_to_eld] ELD monitor DELL U3415W >[ 10.940181] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 >[ 10.940205] [drm:drm_mode_debug_printmodeline] Modeline 105:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 10.940207] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 10.940210] [drm:drm_mode_debug_printmodeline] Modeline 109:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a >[ 10.940211] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 10.940214] [drm:drm_mode_debug_printmodeline] Modeline 110:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a >[ 10.940221] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE >[ 10.940224] [drm:drm_mode_debug_printmodeline] Modeline 112:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 >[ 10.940226] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 10.940228] [drm:drm_mode_debug_printmodeline] Modeline 118:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 10.940230] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 10.940233] [drm:drm_mode_debug_printmodeline] Modeline 122:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a >[ 10.940234] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 10.940238] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] probed modes : >[ 10.940241] [drm:drm_mode_debug_printmodeline] Modeline 57:"3440x1440" 60 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x48 0x9 >[ 10.940244] [drm:drm_mode_debug_printmodeline] Modeline 63:"3440x1440" 50 265250 3440 3520 3552 3600 1440 1461 1471 1474 0x40 0x9 >[ 10.940246] [drm:drm_mode_debug_printmodeline] Modeline 76:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9 >[ 10.940249] [drm:drm_mode_debug_printmodeline] Modeline 59:"2560x1080" 60 198000 2560 2708 2752 3000 1080 1091 1096 1100 0x40 0x5 >[ 10.940251] [drm:drm_mode_debug_printmodeline] Modeline 73:"1720x1440" 60 159940 1720 1760 1792 1800 1440 1446 1454 1481 0x40 0x9 >[ 10.940254] [drm:drm_mode_debug_printmodeline] Modeline 55:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 10.940256] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 10.940259] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 10.940262] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 >[ 10.940264] [drm:drm_mode_debug_printmodeline] Modeline 84:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 >[ 10.940267] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 10.940269] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 10.940272] [drm:drm_mode_debug_printmodeline] Modeline 61:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9 >[ 10.940274] [drm:drm_mode_debug_printmodeline] Modeline 60:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 >[ 10.940276] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 10.940279] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 10.940281] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 >[ 10.940283] [drm:drm_mode_debug_printmodeline] Modeline 69:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 >[ 10.940285] [drm:drm_mode_debug_printmodeline] Modeline 70:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa >[ 10.940288] [drm:drm_mode_debug_printmodeline] Modeline 71:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 >[ 10.940290] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 >[ 10.940292] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa >[ 10.940294] [drm:drm_mode_debug_printmodeline] Modeline 88:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa >[ 10.940297] [drm:drm_mode_debug_printmodeline] Modeline 75:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa >[ 10.940299] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa >[ 10.940301] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa >[ 10.940304] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa >[ 10.940306] [drm:drm_mode_debug_printmodeline] Modeline 67:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 >[ 10.940309] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 10.940336] [drm:drm_mode_getconnector] [CONNECTOR:40:?] >[ 10.940339] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 10.940340] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 10.940495] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 10.940498] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 10.940500] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 10.940506] [drm:drm_mode_getconnector] [CONNECTOR:47:?] >[ 10.940508] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 10.940509] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 10.940662] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 10.940664] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 10.940666] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 10.942306] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.942799] [drm:i915_gem_open] >[ 10.945795] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.949016] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.952404] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.955816] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.958510] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.961743] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.964977] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.968202] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 10.972327] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.976890] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.980230] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.983442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.986829] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 10.990131] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 10.992122] [drm:i915_gem_context_create_ioctl] HW context 1 created >[ 10.992969] [drm:i915_gem_context_destroy_ioctl] HW context 1 destroyed >[ 10.993380] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 10.994679] [drm:i915_gem_context_create_ioctl] HW context 1 created >[ 10.996959] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.000185] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.003410] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.006650] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.008466] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=937/937 >[ 11.008469] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 11.008514] [drm:intel_edp_backlight_power] panel power control backlight disable >[ 11.009883] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.013095] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.016340] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.019521] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.022800] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.026861] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.031074] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.034331] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.037525] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.040793] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.044054] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.047324] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.050527] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.053781] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.057060] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.060340] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.063509] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.066777] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.070003] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.073219] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.076442] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.076892] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 11.079070] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 11.082661] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 11.082664] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 11.082672] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 11.083520] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 11.085916] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.090149] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.093387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.096629] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.099880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.103149] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.106418] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.109695] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.112936] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.116174] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.119400] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.122601] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.125860] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.129085] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.132348] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.135481] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.139581] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.143840] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.147110] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.150378] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.153657] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.156938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.160211] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.163420] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.166700] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.169978] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.173265] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.176479] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.179750] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.183011] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.186277] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.189481] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.193583] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.197837] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.201107] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.204354] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.207632] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.208595] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=0/937 >[ 11.208598] [drm:intel_panel_actually_set_backlight] set backlight PWM = 37 >[ 11.208635] [drm:drm_mode_setcrtc] [CRTC:24] >[ 11.208640] [drm:drm_mode_setcrtc] [CONNECTOR:49:DP-2] >[ 11.208643] [drm:intel_crtc_set_config] [CRTC:24] [FB:77] #connectors=1 (x y) (1920 0) >[ 11.208646] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set >[ 11.208650] [drm:drm_mode_debug_printmodeline] Modeline 77:"" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x0 0x9 >[ 11.208655] [drm:drm_mode_debug_printmodeline] Modeline 78:"" 0 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x0 0x9 >[ 11.208657] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:24], mode_changed=1, fb_changed=1 >[ 11.208658] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [NOCRTC] >[ 11.208659] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch >[ 11.208661] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch >[ 11.208662] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 11.208664] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 11.208665] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 11.208666] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 11.208667] [drm:intel_modeset_stage_output_state] crtc disabled, full mode switch >[ 11.208669] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 2, prepare: 2, disable: 1 >[ 11.208671] [drm:connected_sink_compute_bpp] [CONNECTOR:49:DP-2] checking for sink bpp constrains >[ 11.208675] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 24, dithering: 0 >[ 11.208676] [drm:intel_dump_pipe_config] [CRTC:24][modeset] config for pipe B >[ 11.208678] [drm:intel_dump_pipe_config] cpu_transcoder: B >[ 11.208679] [drm:intel_dump_pipe_config] pipe bpp: 24, dithering: 0 >[ 11.208681] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 11.208684] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 3725357, gmch_n: 8388608, link_m: 620892, link_n: 1048576, tu: 3 >[ 11.208685] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 11.208687] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 11.208688] [drm:intel_dump_pipe_config] requested mode: >[ 11.208691] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x0 0x9 >[ 11.208692] [drm:intel_dump_pipe_config] adjusted mode: >[ 11.208696] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x0 0x9 >[ 11.208699] [drm:intel_dump_crtc_timings] crtc timings: 319750 3440 3520 3552 3600 1440 1468 1478 1481, type: 0x0 flags: 0x9 >[ 11.208700] [drm:intel_dump_pipe_config] port clock: 540000 >[ 11.208701] [drm:intel_dump_pipe_config] pipe src size: 3440x1440 >[ 11.208703] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 11.208705] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 11.208716] [drm:intel_dump_pipe_config] ips: 0 >[ 11.208717] [drm:intel_dump_pipe_config] double wide: 0 >[ 11.210443] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.213714] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.216969] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.220239] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.223398] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.224068] [drm:intel_mst_disable_dp] 1 >[ 11.224071] [drm:drm_dp_destroy_payload_step1] >[ 11.226675] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.229940] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.230523] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 11.230526] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 11.234181] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.237357] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.240570] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.243785] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.247863] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.252043] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.255271] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.258429] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.261666] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.264865] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.268079] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.271319] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.274425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.277654] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.280878] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.284105] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.287336] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.290559] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.293772] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.297005] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.300974] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.305169] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.308405] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.311612] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.314838] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.318054] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.321261] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.324510] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.327717] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.330922] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.334170] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.337321] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.340553] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.343793] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.347065] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.350354] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.354436] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.358645] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.361919] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.365186] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.368411] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.371687] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.374951] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.378230] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.381380] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.384644] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.387924] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.391185] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.394388] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.397652] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.400912] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.404178] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.408267] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.412486] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.415748] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.418955] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.422235] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.425389] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.428651] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.431901] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.435160] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.438326] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.441535] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.444738] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.448000] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.451268] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.454500] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.457730] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.458176] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 11.459947] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 11.459957] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 11.461710] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 11.464070] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.468304] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.471563] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.474779] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.478024] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.481293] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.484553] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.487795] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.491026] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.494269] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.497539] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.500833] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.504112] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.507411] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.510689] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.513959] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.518064] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.522291] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.525558] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.528832] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.532119] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.535282] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.538491] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.541772] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.545038] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.548279] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.551529] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.554794] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.558065] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.561273] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.564514] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.567788] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.571889] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.576145] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.579334] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.582605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.585882] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.589155] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.592333] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.595606] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.598844] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.602113] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.605325] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.608594] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.611829] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.615107] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.618321] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.621593] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.625690] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.629915] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.633184] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.636425] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.639675] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.642946] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.646214] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.649312] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.652560] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.655825] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.659103] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.662309] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.665580] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.668808] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.672075] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.675302] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.679414] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.683671] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.686940] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.690208] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.693487] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.696775] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.700048] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.703232] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.706511] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.709780] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.713063] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.716218] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.719489] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.722769] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.726035] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.729211] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.733307] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.737471] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.740743] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.744012] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.747209] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.750417] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.753657] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.756933] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.760203] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.763442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.766725] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.769989] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.773195] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.776445] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.779715] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.782974] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.787062] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.791256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.794529] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.797765] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.801041] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.804259] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.807526] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.810790] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.814058] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.817247] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.820509] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.823752] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.827018] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.830243] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.833510] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.836760] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.837219] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 11.838793] [drm:intel_dp_check_mst_status] got esi 41 10 00 >[ 11.843273] [drm:intel_dp_check_mst_status] got esi2 00 00 00 >[ 11.843275] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 11.844718] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.848937] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.852172] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.855439] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.858688] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.861955] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.864187] [drm:drm_dp_update_payload_part1] removing payload 0 >[ 11.865151] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.868399] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.871670] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.874936] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.878163] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.881422] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.884652] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.887924] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.891151] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.894412] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.898503] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.902691] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.905952] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.909142] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.912392] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.915623] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.918883] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.922138] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.925398] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.928628] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.931872] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.935137] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.938399] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.941672] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.944936] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.948131] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 11.952183] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.956425] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.959660] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.962922] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.966127] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.966302] ------------[ cut here ]------------ >[ 11.966308] WARNING: CPU: 0 PID: 2548 at drivers/gpu/drm/i915/intel_display.c:962 intel_disable_pipe+0x29e/0x2b0() >[ 11.966311] pipe_off wait timed out >[ 11.966313] Modules linked in: vmnet(O) vmblock(O) vsock(O) vmci(O) vmmon(O) uvcvideo videobuf2_vmalloc videobuf2_memops videobuf2_core x86_pkg_temp_thermal >[ 11.966331] CPU: 0 PID: 2548 Comm: Xorg Tainted: G O 4.0.5-gentoo #1 >[ 11.966333] Hardware name: Dell Inc. Latitude E7440/07F3F4, BIOS A15 05/19/2015 >[ 11.966335] ffffffff821c1778 ffff88040877ba18 ffffffff81c20dd0 0000000000000000 >[ 11.966338] ffff88040877ba68 ffff88040877ba58 ffffffff810a6e25 0000000000000000 >[ 11.966342] ffff88040b6a0000 0000000000070008 00000000fffb9ad7 0000000000070008 >[ 11.966345] Call Trace: >[ 11.966352] [<ffffffff81c20dd0>] dump_stack+0x45/0x57 >[ 11.966358] [<ffffffff810a6e25>] warn_slowpath_common+0x85/0xc0 >[ 11.966362] [<ffffffff810a6ea1>] warn_slowpath_fmt+0x41/0x50 >[ 11.966365] [<ffffffff816d5c2e>] intel_disable_pipe+0x29e/0x2b0 >[ 11.966368] [<ffffffff816dc9bb>] haswell_crtc_disable+0xab/0x3b0 >[ 11.966372] [<ffffffff816dd17e>] __intel_set_mode+0x2fe/0xb20 >[ 11.966377] [<ffffffff816e44e2>] intel_crtc_set_config+0xa22/0xff0 >[ 11.966382] [<ffffffff81c1b8e6>] ? printk+0x41/0x43 >[ 11.966387] [<ffffffff8165d540>] ? drm_ut_debug_printk+0x50/0x60 >[ 11.966389] [<ffffffff816646a7>] drm_mode_set_config_internal+0x67/0x100 >[ 11.966394] [<ffffffff816683b4>] drm_mode_setcrtc+0xd4/0x5b0 >[ 11.966398] [<ffffffff81659e8c>] drm_ioctl+0x19c/0x630 >[ 11.966404] [<ffffffff811c8100>] do_vfs_ioctl+0x2e0/0x4e0 >[ 11.966407] [<ffffffff814fd057>] ? file_has_perm+0x87/0xa0 >[ 11.966414] [<ffffffff811b5872>] ? vfs_write+0x172/0x1f0 >[ 11.966419] [<ffffffff811c8381>] SyS_ioctl+0x81/0xa0 >[ 11.966424] [<ffffffff811ca380>] ? SyS_poll+0x60/0xf0 >[ 11.966428] [<ffffffff81c2bb32>] system_call_fastpath+0x12/0x17 >[ 11.966430] ---[ end trace ffbd221abe04237c ]--- >[ 11.966435] [drm:intel_mst_post_disable_dp] 1 >[ 11.968727] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.969141] [drm:drm_dp_mst_put_payload_id] putting payload 1 >[ 11.971759] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.975281] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.975702] [drm:intel_fbc_update] disabled per chip default >[ 11.975706] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803f8c32c00 >[ 11.975715] [drm:intel_edp_backlight_off] >[ 11.979893] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.983061] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.985388] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.988630] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.990972] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 11.994150] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 11.997420] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 11.999727] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.002059] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.006138] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.010384] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.013612] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.016875] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.020104] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.023336] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.026568] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.029837] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.033102] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.036356] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.039586] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.042837] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.046052] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.049301] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.052540] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.055814] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.057535] [drm:intel_wait_ddi_buf_idle] *ERROR* Timeout waiting for DDI BUF C idle bit >[ 12.059935] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.064097] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.067369] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.070596] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.073874] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.077069] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.080338] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.083618] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.086880] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.090078] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.093347] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.096550] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.099781] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.103052] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.106316] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.109557] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.111270] [drm:intel_wait_ddi_buf_idle] *ERROR* Timeout waiting for DDI BUF C idle bit >[ 12.113628] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.117873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.121134] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.124376] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.127665] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.130930] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.134134] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.137413] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.140668] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.143888] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.147063] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.150307] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.153550] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.156821] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.160027] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.163290] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.165003] [drm:intel_wait_ddi_buf_idle] *ERROR* Timeout waiting for DDI BUF C idle bit >[ 12.167397] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.171567] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.174825] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.176258] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0 >[ 12.178117] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.181338] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.184592] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.187862] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.188452] [drm:edp_panel_off] Turn eDP port A panel power off >[ 12.188456] [drm:wait_panel_off] Wait for panel power off time >[ 12.188459] [drm:wait_panel_status] mask b0000000 value 00000000 status 80000008 control abcd0000 >[ 12.243237] [drm:wait_panel_status] Wait complete >[ 12.243247] [drm:intel_fbc_update] no output, disabling >[ 12.243255] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 12.243271] [drm:intel_mst_pre_enable_dp] 0 >[ 12.244118] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.249592] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.250009] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.254113] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.256783] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.261275] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.262136] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.264815] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.267505] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.270191] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.272867] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.275504] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.278190] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.278637] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 12.281874] [drm:intel_dp_check_mst_status] got esi 00 00 00 >[ 12.283167] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.284439] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 12.284441] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 12.286162] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.288855] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 12.288858] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 12.289636] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.290473] [drm:intel_dp_check_mst_status] got esi2 41 00 00 >[ 12.290475] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 12.290479] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 12.292173] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.293021] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 12.294414] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.295808] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.297203] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.298596] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.299991] [drm:intel_dp_start_link_train] *ERROR* too many voltage retries, give up >[ 12.304081] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.308338] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.311578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.314827] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.317998] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.321267] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.324539] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.327817] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.331000] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.334270] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.337517] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.340786] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.343993] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.347256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.350523] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.353796] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.357907] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.362052] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.365323] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.368566] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.371846] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.375047] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.378316] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.381575] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.384834] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.388041] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.391317] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.394559] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.397829] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.401039] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.404309] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.407578] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.411593] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.415848] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.419032] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.422300] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.425548] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.428816] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.432025] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.435306] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.438542] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.441811] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.445021] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.448289] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.451529] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.454815] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.458009] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.461281] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.465380] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.469611] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.472881] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.476122] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.479373] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.482642] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.485893] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.488982] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.492256] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.495535] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.498815] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.502003] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.505259] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.508535] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.511807] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.515000] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.519081] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.523337] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.526606] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.529871] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.533124] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.536362] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.539639] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.542921] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.546177] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.549404] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.552691] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.555917] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.559187] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.562469] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.565740] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.568910] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.573022] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.577286] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.580554] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.583803] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.586977] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.590249] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.593493] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.596771] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.599964] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.603234] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.606484] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.609759] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.612961] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.616243] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.619495] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.622766] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.623218] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 12.625505] [drm:drm_dp_mst_allocate_vcpi] initing vcpi for 89 3 >[ 12.641899] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 12.641904] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 12.641924] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 12.642785] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 12.645193] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.648317] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.651886] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.655170] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.658454] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.661722] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.664876] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.668570] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.671845] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.675114] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.678364] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.681640] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.684889] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.687502] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.691165] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.694400] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.698486] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.702731] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.705932] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.709185] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.712450] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.715667] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.718795] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.722006] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.725250] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.728484] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.732160] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.735391] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.738651] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.741844] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.745043] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.748290] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.752463] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.756679] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.759837] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.763106] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.766344] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.769580] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.773220] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.776493] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.779725] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.782868] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.786119] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.789378] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.792571] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.795796] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.799025] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.802254] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.806343] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.810542] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.813171] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.816818] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.820087] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.823326] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.826592] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.829812] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.833014] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.836691] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.839877] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.843122] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.846328] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.849603] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.852794] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.855996] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.860058] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.864245] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.867449] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.870693] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.873867] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.877149] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.880403] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.883641] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.886829] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.890074] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.893313] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.896570] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.900245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.903515] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.906797] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.910065] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.914161] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.918322] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.921520] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.924780] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.928050] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.931251] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.934506] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.937796] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.941469] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.944728] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.948002] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.951239] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.954501] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.957768] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.961277] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.964475] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 12.968561] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.972737] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.975948] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.979178] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.982755] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.985966] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.989220] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 12.992490] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 12.995753] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 12.999012] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.002695] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.005938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.009472] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.012722] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.015993] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.019244] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.019659] [drm:drm_dp_dpcd_write_payload] status not set after read payload table status 4 >[ 13.019760] [drm:intel_mst_enable_dp] 1 >[ 13.020108] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 13.022368] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 13.038197] [drm:drm_dp_check_act_status] failed to get ACT bit 4 after 30 retries >[ 13.038200] [drm:drm_dp_update_payload_part2] payload 0 0 >[ 13.038203] [drm:ironlake_update_primary_plane] Writing base 03FAB000 FFFFFFFFFFFF2E00 0 0 21504 >[ 13.038205] [drm:intel_fbc_update] disabled per chip default >[ 13.038210] [drm:intel_connector_check_state] [CONNECTOR:49:DP-2] >[ 13.038211] [drm:check_encoder_state] [ENCODER:30:TMDS-30] >[ 13.038212] [drm:check_encoder_state] [ENCODER:39:TMDS-39] >[ 13.038212] [drm:check_encoder_state] [ENCODER:42:TMDS-42] >[ 13.038214] [drm:check_encoder_state] [ENCODER:44:DP MST-44] >[ 13.038214] [drm:check_encoder_state] [ENCODER:45:DP MST-45] >[ 13.038215] [drm:check_encoder_state] [ENCODER:46:DP MST-46] >[ 13.038216] [drm:check_crtc_state] [CRTC:20] >[ 13.038217] [drm:check_crtc_state] [CRTC:24] >[ 13.038222] [drm:check_crtc_state] [CRTC:28] >[ 13.038223] [drm:check_shared_dpll_state] WRPLL 1 >[ 13.038224] [drm:check_shared_dpll_state] WRPLL 2 >[ 13.038488] [drm:drm_mode_setcrtc] [CRTC:20] >[ 13.038489] [drm:intel_crtc_set_config] [CRTC:20] [NOFB] >[ 13.038491] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=0, fb_changed=0 >[ 13.038492] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 13.038494] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 0, prepare: 0, disable: 0 >[ 13.038772] [drm:drm_mode_setcrtc] [CRTC:20] >[ 13.038776] [drm:drm_mode_setcrtc] [CONNECTOR:31:eDP-1] >[ 13.038778] [drm:intel_crtc_set_config] [CRTC:20] [FB:77] #connectors=1 (x y) (0 0) >[ 13.038779] [drm:intel_set_config_compute_mode_changes] inactive crtc, full mode set >[ 13.038781] [drm:intel_set_config_compute_mode_changes] modes are different, full mode set >[ 13.038783] [drm:drm_mode_debug_printmodeline] Modeline 77:"" 0 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x0 0x9 >[ 13.038785] [drm:drm_mode_debug_printmodeline] Modeline 78:"" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x0 0x9 >[ 13.038787] [drm:intel_set_config_compute_mode_changes] computed changes for [CRTC:20], mode_changed=1, fb_changed=1 >[ 13.038788] [drm:intel_modeset_stage_output_state] encoder changed, full mode switch >[ 13.038789] [drm:intel_modeset_stage_output_state] [CONNECTOR:31:eDP-1] to [CRTC:20] >[ 13.038791] [drm:intel_modeset_stage_output_state] [CONNECTOR:49:DP-2] to [CRTC:24] >[ 13.038792] [drm:intel_modeset_stage_output_state] crtc changed, full mode switch >[ 13.038793] [drm:intel_modeset_stage_output_state] crtc enabled, full mode switch >[ 13.038804] [drm:intel_modeset_affected_pipes] set mode pipe masks: modeset: 1, prepare: 1, disable: 0 >[ 13.038806] [drm:connected_sink_compute_bpp] [CONNECTOR:31:eDP-1] checking for sink bpp constrains >[ 13.038808] [drm:connected_sink_compute_bpp] clamping display bpp (was 24) to EDID reported max of 18 >[ 13.038811] [drm:intel_dp_compute_config] DP link computation with max lane count 2 max bw 0a pixel clock 138700KHz >[ 13.038812] [drm:intel_dp_compute_config] DP link bw 0a lane count 2 clock 270000 bpp 18 >[ 13.038814] [drm:intel_dp_compute_config] DP link bw required 249660 available 432000 >[ 13.038816] [drm:intel_modeset_pipe_config] plane bpp: 24, pipe bpp: 18, dithering: 1 >[ 13.038817] [drm:intel_dump_pipe_config] [CRTC:20][modeset] config for pipe A >[ 13.038819] [drm:intel_dump_pipe_config] cpu_transcoder: D >[ 13.038820] [drm:intel_dump_pipe_config] pipe bpp: 18, dithering: 1 >[ 13.038822] [drm:intel_dump_pipe_config] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0 >[ 13.038823] [drm:intel_dump_pipe_config] dp: 1, gmch_m: 4847916, gmch_n: 8388608, link_m: 269328, link_n: 524288, tu: 64 >[ 13.038825] [drm:intel_dump_pipe_config] dp: 1, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0 >[ 13.038826] [drm:intel_dump_pipe_config] audio: 0, infoframes: 0 >[ 13.038828] [drm:intel_dump_pipe_config] requested mode: >[ 13.038830] [drm:drm_mode_debug_printmodeline] Modeline 0:"" 0 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x0 0x9 >[ 13.038831] [drm:intel_dump_pipe_config] adjusted mode: >[ 13.038833] [drm:drm_mode_debug_printmodeline] Modeline 0:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 13.038836] [drm:intel_dump_crtc_timings] crtc timings: 138700 1920 1968 2004 2080 1080 1083 1088 1111, type: 0x48 flags: 0x9 >[ 13.038837] [drm:intel_dump_pipe_config] port clock: 270000 >[ 13.038838] [drm:intel_dump_pipe_config] pipe src size: 1920x1080 >[ 13.038840] [drm:intel_dump_pipe_config] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000 >[ 13.038841] [drm:intel_dump_pipe_config] pch pfit: pos: 0x00000000, size: 0x00000000, disabled >[ 13.038843] [drm:intel_dump_pipe_config] ips: 1 >[ 13.038844] [drm:intel_dump_pipe_config] double wide: 0 >[ 13.038850] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 13.038866] [drm:edp_panel_on] Turn eDP port A panel power on >[ 13.038868] [drm:wait_panel_power_cycle] Wait for panel power cycle >[ 13.038871] [drm:wait_panel_status] mask b800000f value 00000000 status 00000000 control abcd0000 >[ 13.038873] [drm:wait_panel_status] Wait complete >[ 13.038877] [drm:wait_panel_on] Wait for panel power on >[ 13.038880] [drm:wait_panel_status] mask b000000f value 80000008 status 0000000a control abcd0003 >[ 13.038980] [drm:intel_set_cpu_fifo_underrun_reporting] *ERROR* uncleared fifo underrun on pipe B >[ 13.038984] [drm:intel_cpu_fifo_underrun_irq_handler] *ERROR* CPU pipe B FIFO underrun >[ 13.044389] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 13.044392] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 13.044407] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 13.246914] [drm:wait_panel_status] Wait complete >[ 13.246924] [drm:edp_panel_vdd_on] Turning eDP port A VDD on >[ 13.246931] [drm:edp_panel_vdd_on] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd000b >[ 13.247947] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 13.249689] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.250265] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.250580] [drm:intel_dp_start_link_train] clock recovery OK >[ 13.251893] [drm:intel_dp_complete_link_train] Channel EQ done. DP Training successful >[ 13.252112] [drm:intel_edp_backlight_on] >[ 13.252114] [drm:intel_panel_enable_backlight] pipe A >[ 13.252120] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 13.252516] [drm:intel_psr_match_conditions] PSR disable by flag >[ 13.252517] [drm:intel_edp_drrs_enable] Panel doesn't support DRRS >[ 13.253876] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.257078] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.260344] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.263619] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.266851] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.270083] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.272362] [drm:ironlake_update_primary_plane] Writing base 03FAB000 00000000 0 0 21504 >[ 13.273329] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.276533] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.279690] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.282958] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.286184] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.289451] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.292649] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.295884] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.299153] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.303237] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.306821] [drm:intel_fbc_update] more than one pipe active, disabling compression >[ 13.306826] [drm:intel_connector_check_state] [CONNECTOR:31:eDP-1] >[ 13.306831] [drm:intel_connector_check_state] [CONNECTOR:49:DP-2] >[ 13.306834] [drm:check_encoder_state] [ENCODER:30:TMDS-30] >[ 13.306836] [drm:check_encoder_state] [ENCODER:39:TMDS-39] >[ 13.306838] [drm:check_encoder_state] [ENCODER:42:TMDS-42] >[ 13.306840] [drm:check_encoder_state] [ENCODER:44:DP MST-44] >[ 13.306842] [drm:check_encoder_state] [ENCODER:45:DP MST-45] >[ 13.306844] [drm:check_encoder_state] [ENCODER:46:DP MST-46] >[ 13.306846] [drm:check_crtc_state] [CRTC:20] >[ 13.306854] [drm:check_crtc_state] [CRTC:24] >[ 13.306860] [drm:check_crtc_state] [CRTC:28] >[ 13.306862] [drm:check_shared_dpll_state] WRPLL 1 >[ 13.306864] [drm:check_shared_dpll_state] WRPLL 2 >[ 13.307053] [drm:intel_backlight_device_update_status] updating intel_backlight, brightness=937/937 >[ 13.307056] [drm:intel_panel_actually_set_backlight] set backlight PWM = 937 >[ 13.307460] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.310086] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.313296] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.316542] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.319689] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.322909] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.326119] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.329349] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.332553] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.335695] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.339046] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.342265] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.345517] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.348679] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.351915] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.355997] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.360208] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.363444] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.366589] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.369834] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.373053] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.376274] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.379497] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.382653] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.385886] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.389111] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.392342] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.395544] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.398771] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.401996] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.405230] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.409330] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.413548] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.416780] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.420011] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.423253] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.426484] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.429652] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.432891] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.436150] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.439386] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.442558] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.445785] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.449018] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.452253] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.455486] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.458646] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.462738] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.466934] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.470165] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.473394] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.476539] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.479772] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.483004] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.486245] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.489479] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.492634] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.495873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.499119] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.502354] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.505542] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.508764] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.511990] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.516073] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.520276] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.523516] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.526739] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.529963] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.533198] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.536434] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.539608] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.542839] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.546056] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.549278] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.552504] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.555717] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.558964] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.562174] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.565420] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.569508] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.573701] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.576938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.580174] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.583505] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.586729] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.589962] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.593181] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.596438] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.601277] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.604730] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.607950] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.611327] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.614483] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.617709] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.620990] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.621441] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 13.623124] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 13.632622] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 13.632626] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 13.632634] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 13.633764] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 13.636125] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.640280] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.643456] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.646655] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.649861] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.653059] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.656323] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.659562] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.662787] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.666183] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.669557] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.672785] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.676092] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.681081] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.684454] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.687741] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.691839] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.696053] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.700024] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.703374] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.706702] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.710228] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.713619] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.716930] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.720188] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.722825] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.726139] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.728885] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.732380] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.735756] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.739005] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.742244] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.746445] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.750663] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.754041] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.757298] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.760010] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.763256] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.768129] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.771395] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.774823] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.778068] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.781293] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.784429] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.787902] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.791137] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.794373] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.797515] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.801671] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.805859] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.809085] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.812315] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.815501] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.818718] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.821946] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.825188] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.828410] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.831635] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.834861] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.838075] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.841274] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.844412] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.847616] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.851077] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.855140] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.859324] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.862876] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.866085] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.869316] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.872484] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.875917] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.879145] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.882355] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.885470] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.888370] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.891586] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.896267] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.900997] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.904934] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.910928] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.915703] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.919930] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.926061] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.929301] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.932476] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.935814] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.939118] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.942012] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.946116] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.948866] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.958596] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.961845] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.966799] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.970047] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.973275] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.976454] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 13.981343] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.984696] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.987514] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 13.993590] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 13.996375] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 13.999765] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.003374] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.006726] nm-dispatcher (2613) used greatest stack depth: 12824 bytes left >[ 14.007492] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.011798] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.015146] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.019124] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.022393] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.025781] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.029239] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.032553] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.036395] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.036895] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 14.038978] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 14.050710] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 14.050713] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 14.051479] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 14.052387] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 14.055064] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.059648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.062751] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.065982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.069228] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.072661] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.076016] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.079275] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.082510] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.085800] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.089061] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.092311] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.095554] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.098823] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.102130] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.105329] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.109462] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.113680] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.117011] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.120357] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.124203] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.128283] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.135160] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.140238] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.143379] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.146599] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.149828] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.153055] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.157269] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.161024] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.164468] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.167104] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.171476] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.174856] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.178149] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.181347] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.185166] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.188376] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.191608] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.196380] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.199640] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.202900] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.206299] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.209576] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.212370] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.216996] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.220243] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.223474] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.227814] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.232114] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.235261] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.238498] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.241825] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.245263] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.247802] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.251040] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.254333] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.257440] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 14.257444] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] >[ 14.257446] [drm:intel_dp_detect] [CONNECTOR:31:eDP-1] >[ 14.257575] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.258827] [drm:intel_dp_probe_oui] Sink OUI: 001cf8 >[ 14.259122] [drm:intel_dp_probe_oui] Branch OUI: 000000 >[ 14.259133] [drm:drm_edid_to_eld] ELD: no CEA Extension found >[ 14.259136] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:31:eDP-1] probed modes : >[ 14.259140] [drm:drm_mode_debug_printmodeline] Modeline 32:"1920x1080" 60 138700 1920 1968 2004 2080 1080 1083 1088 1111 0x48 0x9 >[ 14.259148] [drm:drm_mode_getconnector] [CONNECTOR:31:?] >[ 14.259243] [drm:drm_mode_getconnector] [CONNECTOR:43:?] >[ 14.259245] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] >[ 14.259246] [drm:intel_dp_detect] [CONNECTOR:43:DP-1] >[ 14.259248] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:43:DP-1] disconnected >[ 14.259252] [drm:drm_mode_getconnector] [CONNECTOR:51:?] >[ 14.259254] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] >[ 14.259256] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:51:DP-3] disconnected >[ 14.259267] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 14.259269] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] >[ 14.259327] [drm:drm_edid_to_eld] ELD monitor DELL U3415W >[ 14.259328] [drm:drm_edid_to_eld] ELD size 36, SAD count 1 >[ 14.259351] [drm:drm_mode_debug_printmodeline] Modeline 105:"1920x1080i" 0 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 14.259353] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 14.259356] [drm:drm_mode_debug_printmodeline] Modeline 109:"720x480i" 0 13500 720 739 801 858 480 488 494 525 0x40 0x101a >[ 14.259357] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 14.259360] [drm:drm_mode_debug_printmodeline] Modeline 110:"720x576i" 0 13500 720 732 795 864 576 580 586 625 0x40 0x101a >[ 14.259361] [drm:drm_mode_prune_invalid] Not using 720x576i mode: NO_INTERLACE >[ 14.259364] [drm:drm_mode_debug_printmodeline] Modeline 112:"1920x1080i" 0 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15 >[ 14.259365] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 14.259367] [drm:drm_mode_debug_printmodeline] Modeline 118:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15 >[ 14.259369] [drm:drm_mode_prune_invalid] Not using 1920x1080i mode: NO_INTERLACE >[ 14.259371] [drm:drm_mode_debug_printmodeline] Modeline 122:"720x480i" 60 13513 720 739 801 858 480 488 494 525 0x40 0x101a >[ 14.259373] [drm:drm_mode_prune_invalid] Not using 720x480i mode: NO_INTERLACE >[ 14.259377] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:49:DP-2] probed modes : >[ 14.259380] [drm:drm_mode_debug_printmodeline] Modeline 57:"3440x1440" 60 319750 3440 3520 3552 3600 1440 1468 1478 1481 0x48 0x9 >[ 14.259382] [drm:drm_mode_debug_printmodeline] Modeline 63:"3440x1440" 50 265250 3440 3520 3552 3600 1440 1461 1471 1474 0x40 0x9 >[ 14.259384] [drm:drm_mode_debug_printmodeline] Modeline 76:"2560x1440" 60 241500 2560 2608 2640 2720 1440 1443 1448 1481 0x40 0x9 >[ 14.259387] [drm:drm_mode_debug_printmodeline] Modeline 59:"2560x1080" 60 198000 2560 2708 2752 3000 1080 1091 1096 1100 0x40 0x5 >[ 14.259389] [drm:drm_mode_debug_printmodeline] Modeline 73:"1720x1440" 60 159940 1720 1760 1792 1800 1440 1446 1454 1481 0x40 0x9 >[ 14.259391] [drm:drm_mode_debug_printmodeline] Modeline 55:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1082 1087 1125 0x40 0x5 >[ 14.259394] [drm:drm_mode_debug_printmodeline] Modeline 72:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 14.259396] [drm:drm_mode_debug_printmodeline] Modeline 85:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5 >[ 14.259399] [drm:drm_mode_debug_printmodeline] Modeline 81:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5 >[ 14.259401] [drm:drm_mode_debug_printmodeline] Modeline 84:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5 >[ 14.259404] [drm:drm_mode_debug_printmodeline] Modeline 68:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 14.259406] [drm:drm_mode_debug_printmodeline] Modeline 62:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5 >[ 14.259409] [drm:drm_mode_debug_printmodeline] Modeline 61:"1280x800" 60 83500 1280 1352 1480 1680 800 803 809 831 0x40 0x9 >[ 14.259411] [drm:drm_mode_debug_printmodeline] Modeline 60:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5 >[ 14.259414] [drm:drm_mode_debug_printmodeline] Modeline 74:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 14.259416] [drm:drm_mode_debug_printmodeline] Modeline 87:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5 >[ 14.259419] [drm:drm_mode_debug_printmodeline] Modeline 83:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5 >[ 14.259421] [drm:drm_mode_debug_printmodeline] Modeline 69:"1024x768" 75 78800 1024 1040 1136 1312 768 769 772 800 0x40 0x5 >[ 14.259424] [drm:drm_mode_debug_printmodeline] Modeline 70:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa >[ 14.259426] [drm:drm_mode_debug_printmodeline] Modeline 71:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5 >[ 14.259429] [drm:drm_mode_debug_printmodeline] Modeline 64:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5 >[ 14.259431] [drm:drm_mode_debug_printmodeline] Modeline 82:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa >[ 14.259433] [drm:drm_mode_debug_printmodeline] Modeline 88:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa >[ 14.259436] [drm:drm_mode_debug_printmodeline] Modeline 75:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa >[ 14.259438] [drm:drm_mode_debug_printmodeline] Modeline 65:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa >[ 14.259440] [drm:drm_mode_debug_printmodeline] Modeline 66:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa >[ 14.259443] [drm:drm_mode_debug_printmodeline] Modeline 79:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa >[ 14.259445] [drm:drm_mode_debug_printmodeline] Modeline 67:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6 >[ 14.259448] [drm:drm_mode_getconnector] [CONNECTOR:49:?] >[ 14.259480] [drm:drm_mode_getconnector] [CONNECTOR:40:?] >[ 14.259482] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] >[ 14.259484] [drm:intel_hdmi_detect] [CONNECTOR:40:HDMI-A-1] >[ 14.260648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.260734] [drm:gmbus_xfer] GMBUS [i915 gmbus dpb] NAK for addr: 0050 r(1) >[ 14.260736] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpb >[ 14.260738] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:40:HDMI-A-1] disconnected >[ 14.260743] [drm:drm_mode_getconnector] [CONNECTOR:47:?] >[ 14.260745] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] >[ 14.260746] [drm:intel_hdmi_detect] [CONNECTOR:47:HDMI-A-2] >[ 14.260901] [drm:gmbus_xfer] GMBUS [i915 gmbus dpc] NAK for addr: 0050 r(1) >[ 14.260902] [drm:drm_do_probe_ddc_edid] drm: skipping non-existent adapter i915 gmbus dpc >[ 14.260903] [drm:drm_helper_probe_single_connector_modes_merge_bits] [CONNECTOR:47:HDMI-A-2] disconnected >[ 14.265342] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.268576] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.271838] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.275809] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.279056] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.283183] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.288434] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.291940] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.295170] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.298333] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.301557] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.304774] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.308002] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.311216] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.316070] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.319383] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.322672] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.325277] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.327936] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.330768] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.334003] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.338276] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.342472] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.345706] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.348976] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.352226] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.355457] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.360031] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.363515] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.367441] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.370189] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.374172] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.378009] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.381304] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.384686] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.389886] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.392917] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.397119] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.400952] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.404756] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.412435] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.415677] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.418915] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.422150] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.425405] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.428733] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.431963] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.435230] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.438460] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.441702] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.444942] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.448184] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.455376] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.455833] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 14.458091] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 14.468649] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 14.468653] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 14.468661] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 14.469777] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 14.472584] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.476616] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.479982] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.488823] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.492413] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.495519] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.498781] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.503247] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.506476] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.510576] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.517327] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.520663] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.524068] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.527246] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.530473] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.533704] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.537799] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.542912] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.546362] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.550607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.553840] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.557073] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.560309] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.563623] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.566849] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.570423] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.582839] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.585456] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.588892] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.593606] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.597470] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.600572] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.608481] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.612731] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.615961] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.623592] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.626864] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.629476] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.632213] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.635455] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.638689] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.641933] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.645120] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.648354] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.651721] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.655386] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.658643] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.661875] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.665987] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.670115] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.673353] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.676325] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.679566] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.683262] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.686492] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.689811] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.693137] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.696385] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.699642] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.702882] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.707186] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.710696] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.713915] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.717169] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.721547] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.725740] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.729013] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.732188] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.735430] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.738670] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.741905] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.745098] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.748335] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.751575] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.754813] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.758044] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.761279] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.764552] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.767780] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.771015] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.774613] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.778217] userif-3: sent link down event. >[ 14.778222] userif-3: sent link up event. >[ 14.781932] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.785131] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.788481] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.791717] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.794943] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.798196] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.801434] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.804701] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.807964] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.811154] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.814384] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.817681] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.820933] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.824387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.829734] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.833835] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.838044] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.841282] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.844532] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.847776] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.851022] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.854266] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.857514] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.860754] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.864001] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.866606] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.869848] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.872927] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.876150] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.879388] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.882697] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.883156] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 14.884667] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 14.890910] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 14.890915] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 14.890925] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 14.891782] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 14.894167] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.898359] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.901595] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.904825] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.908021] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.911255] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.914482] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.917723] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.920976] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.924207] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.927445] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.930672] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.933902] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.937101] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.940333] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.943840] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 14.946009] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878600 >[ 14.947970] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.952198] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.955485] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.958720] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.962254] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.965089] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.970045] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.973290] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.976522] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.979757] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.983837] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.987092] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 14.990587] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 14.993827] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 14.996993] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.000233] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.004426] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.012191] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.015915] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.021001] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.024406] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.028613] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.031850] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.035201] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.038428] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.041666] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.044907] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.048136] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.051420] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.054788] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.058248] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.061495] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.065851] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.070210] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.074453] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.078221] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.082312] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.085585] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.088981] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.092646] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.098009] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.101424] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.105902] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.109094] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.113297] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.116685] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.119917] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.123177] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.128590] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.132781] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.135938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.139841] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.143277] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.146557] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.149797] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.153034] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.158407] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.161643] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.164896] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.168139] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.171389] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.174645] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.178608] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.181833] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.185944] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.190134] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.193384] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.196614] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.199854] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.203007] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.206143] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.209309] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.212483] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.215990] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.218854] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.222002] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.225331] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.228507] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.231665] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.234833] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.239026] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.244863] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.248091] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.251320] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.257011] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.264581] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.265702] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 15.265722] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 15.267950] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.271213] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.274437] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.277637] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.281690] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.285115] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.288342] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.291920] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.299178] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 15.299188] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 15.300109] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.302784] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.303240] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 15.305533] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 15.313879] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 15.313884] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 15.313902] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 15.314752] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 15.317603] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.321752] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.324985] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.328178] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.331424] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.335095] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.338284] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 15.338309] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 15.340268] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.344094] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.347356] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.350570] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.353814] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.356956] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.360185] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.363656] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.366957] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.370351] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.374011] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.378234] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.381467] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.384701] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.386095] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 15.386122] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 15.387881] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.391145] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.394399] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.397485] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.400837] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.404056] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.407291] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.410515] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.413738] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.416928] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.424518] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.427454] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.431476] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.435683] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.438916] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.442188] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.445707] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.448917] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.453549] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.456790] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.460113] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.463450] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.466681] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.469906] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.474457] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.477646] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.485957] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.489191] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.493293] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.494966] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d0540 >[ 15.500104] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.503349] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.506578] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.509804] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.510418] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d0c00 >[ 15.513041] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.516272] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.519511] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.522799] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.523071] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a737840 >[ 15.526047] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.529330] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.532673] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.536368] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a737240 >[ 15.537259] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.540706] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.543884] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.547244] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.550830] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c3166c0 >[ 15.551359] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.555561] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.561991] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.563810] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c316a80 >[ 15.565284] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.568523] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.571754] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.574995] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.577988] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 15.578011] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 15.578316] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.581643] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.584866] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.588115] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.592869] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.595772] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.599050] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.602290] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.605604] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.610813] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.615263] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.618496] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.621777] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.625112] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.628422] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.631716] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.634953] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.638183] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.641431] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.644693] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.647980] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.651219] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.654533] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.660987] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.664252] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.666730] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409733d80 >[ 15.669232] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.673232] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.679101] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.683751] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.684837] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80240 >[ 15.686691] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.689817] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.694389] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.697022] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5cc0 >[ 15.699038] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.701827] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.703567] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478780 >[ 15.705317] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.708563] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.709669] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478b40 >[ 15.711790] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.716825] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.720058] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.723013] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5a80 >[ 15.723425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.729195] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.730128] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.730588] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 15.732470] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 15.735260] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 15.741545] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.747613] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 15.752632] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 15.752636] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 15.752644] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 15.753543] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 15.755945] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.760125] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.763423] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.765958] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.766664] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.769896] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.773117] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.776390] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.778330] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 15.779676] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.782945] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.784434] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.787440] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.790702] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 15.791078] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.795246] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.796845] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.799199] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.802446] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.803340] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 15.805081] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.809982] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.814219] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.815582] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.818490] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.822012] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 15.823112] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.826380] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.827408] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 15.827430] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 15.827884] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.829511] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.832127] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.835031] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 15.835399] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.838893] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.844325] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5a80 >[ 15.845687] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.847321] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5300 >[ 15.849366] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.849557] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 15.849577] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 15.850003] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5a80 >[ 15.852652] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.853601] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.855312] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.858774] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.862012] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.863627] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5a80 >[ 15.865237] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.868462] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.872551] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.873434] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d59c0 >[ 15.873538] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5a80 >[ 15.876923] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.880030] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478480 >[ 15.880263] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.883497] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.884069] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478b40 >[ 15.886670] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.890049] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.893722] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.896958] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.899796] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d0240 >[ 15.900202] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.903487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.906748] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.909975] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.913204] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.916448] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.919654] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.920021] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478540 >[ 15.922899] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 15.922909] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.922955] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 15.927159] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.930670] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478900 >[ 15.931357] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.934584] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.936807] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478540 >[ 15.937802] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.941375] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.942908] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478900 >[ 15.944605] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.947842] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.949049] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478540 >[ 15.951081] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.952515] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 15.952544] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 15.954374] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.955226] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478900 >[ 15.957710] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.960947] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.964339] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.967381] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478480 >[ 15.967695] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.971049] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.973851] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478780 >[ 15.976443] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.976626] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 15.976665] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 15.979279] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 15.979789] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478b40 >[ 15.984930] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.985685] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478d80 >[ 15.988270] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 15.992838] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 15.995906] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 15.998653] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478300 >[ 15.999489] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.002850] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.005967] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.013302] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.016725] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.019397] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.023097] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.025161] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 16.026697] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.029300] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.032569] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.035714] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.038596] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.043719] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5480 >[ 16.045280] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.049220] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.052423] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5600 >[ 16.053001] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.061186] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.061740] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040bd309c0 >[ 16.063840] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.066506] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.069692] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.072572] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.075717] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.078266] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.080954] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d50c0 >[ 16.082407] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.085595] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.089519] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.095234] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.098499] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.101686] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.103031] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5600 >[ 16.105794] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.112310] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.115545] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.118674] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.121531] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5480 >[ 16.121910] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.126261] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.129873] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.132432] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5600 >[ 16.133211] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.136434] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.138609] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5480 >[ 16.140832] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.141193] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d5600 >[ 16.145799] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf43f00 >[ 16.146203] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.149515] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.151057] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d50c0 >[ 16.153384] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.156606] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.157226] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d53c0 >[ 16.159875] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.163378] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e840 >[ 16.163686] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.164142] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 16.166211] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 16.169530] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.181797] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e540 >[ 16.194530] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 16.194535] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 16.194546] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 16.195466] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 16.197927] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.202093] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.205251] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.207600] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.208573] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.211816] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.215051] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.218284] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.220107] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e540 >[ 16.221580] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.224811] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.228038] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.231273] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.232407] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c31da80 >[ 16.234500] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.237629] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.240862] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.244092] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.244704] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a780 >[ 16.247323] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.250851] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928ac00 >[ 16.251421] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.255624] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.257012] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478e40 >[ 16.258852] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.262081] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.263227] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478cc0 >[ 16.265320] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.268528] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.269537] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478e40 >[ 16.271765] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.275011] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.278246] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.281523] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.281937] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478cc0 >[ 16.284781] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.288035] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.290692] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.294036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.294465] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a610480 >[ 16.297287] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.300542] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.300575] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a6109c0 >[ 16.304648] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.306740] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a610480 >[ 16.308856] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.312345] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.316062] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.319437] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.320077] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a6109c0 >[ 16.322598] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.328604] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.331851] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.332019] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a610480 >[ 16.335117] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.338354] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.341516] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.344320] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a6109c0 >[ 16.344748] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.347982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.350455] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a610480 >[ 16.351223] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.354454] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.356694] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e840 >[ 16.357743] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.361849] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.365979] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.368988] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47ea80 >[ 16.369208] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.372441] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.375611] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.378846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.381401] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e840 >[ 16.382087] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.385328] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.388489] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.391723] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.394983] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47ea80 >[ 16.395075] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.398327] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.401512] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.404753] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.407267] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e840 >[ 16.407989] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.411233] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.415329] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.419578] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.422805] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.425738] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47ea80 >[ 16.426130] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.429367] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.432557] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.435783] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.438014] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e840 >[ 16.439039] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.442277] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.445578] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.448828] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.450314] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47ea80 >[ 16.452208] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.455459] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.458229] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 16.458271] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 16.458761] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.462601] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.465854] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.468801] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928ac00 >[ 16.472083] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.481104] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a900 >[ 16.482602] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.485829] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.489090] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.492324] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.493780] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0a80 >[ 16.495639] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.498887] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.499410] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 16.499440] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 16.501516] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.504774] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.506960] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0f00 >[ 16.508070] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.511896] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.515118] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.518346] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.519251] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0a80 >[ 16.522091] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.525319] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.528524] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.531611] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e840 >[ 16.532645] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.537601] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.540824] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.544180] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.550252] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.550967] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.557425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.560693] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.562423] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e780 >[ 16.563939] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.567181] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.570456] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.574384] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.574702] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.577627] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.580868] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.584111] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.587347] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.588400] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e780 >[ 16.591398] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.591855] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 16.594054] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 16.600704] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.612999] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e780 >[ 16.619371] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 16.619376] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 16.619386] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 16.620238] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 16.622625] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.627375] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.630605] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.631505] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.633995] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.637236] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.641086] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.643816] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e780 >[ 16.644370] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.647604] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.650838] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.654078] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.656074] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.657966] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.661197] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.664392] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.667637] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.668375] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e780 >[ 16.670870] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.675025] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.679035] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.681757] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0f00 >[ 16.683305] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.686585] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.689798] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.695655] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.699040] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.701124] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0840 >[ 16.702322] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.705632] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.709121] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.712339] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.713536] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0f00 >[ 16.715561] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.718887] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.722109] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.725359] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.725939] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce06c0 >[ 16.728002] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.731217] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.735277] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.739639] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.742656] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.744302] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0f00 >[ 16.745928] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.749139] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.752410] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.755625] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.757560] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a6106c0 >[ 16.762054] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.767955] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.769871] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.771188] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.774852] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.778100] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.781326] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.782540] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47ef00 >[ 16.784569] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.787786] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.791494] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.794867] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.795582] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.799771] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.803088] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.809585] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.809739] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e480 >[ 16.812891] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.816128] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.819326] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.820730] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.822630] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.825860] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.829155] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.832326] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.834770] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e480 >[ 16.835563] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.838788] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.841998] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.845221] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.847038] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.848537] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.853599] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.858653] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.861894] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.865116] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.865507] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e480 >[ 16.868401] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.871624] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.874733] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.878078] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.880926] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.881319] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.885157] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.888392] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.893977] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e480 >[ 16.894842] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.898140] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.901497] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.904867] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.906129] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a47e180 >[ 16.908005] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.912093] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.916287] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.918452] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce06c0 >[ 16.919587] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.923396] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.926630] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.930814] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.934040] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.937266] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.937514] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0a80 >[ 16.940478] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.943691] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.946920] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.950141] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.951346] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce06c0 >[ 16.953283] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.956506] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.959721] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.961566] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0a80 >[ 16.962936] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 16.966916] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.971084] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.974359] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.976523] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a610600 >[ 16.977694] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.980958] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.984167] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.987027] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0180 >[ 16.987360] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.990584] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 16.993864] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 16.997092] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 16.999525] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce00c0 >[ 17.000281] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.003516] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.006736] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.009976] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.013250] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.016470] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.016927] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 17.018184] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0180 >[ 17.018896] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 17.030545] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce00c0 >[ 17.033283] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 17.033287] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 17.033297] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 17.034140] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 17.036537] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.040776] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.042744] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0180 >[ 17.043997] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.047215] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.050437] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.053811] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.055044] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce00c0 >[ 17.057054] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.060342] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.063597] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.066806] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.070023] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.071352] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0180 >[ 17.073240] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.076464] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.079701] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.082924] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.083737] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0a80 >[ 17.086145] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.090221] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.094313] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.096019] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8ce0c00 >[ 17.097645] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.100858] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.104094] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.108260] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478900 >[ 17.108576] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.111790] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.115025] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.118215] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.120573] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800db478d80 >[ 17.121453] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.124704] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.127949] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.131160] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.134297] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.137518] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.140289] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878300 >[ 17.140818] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.144965] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.149157] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.152503] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.152597] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878900 >[ 17.155799] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.159014] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.162196] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.165396] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.165737] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ffae1d80 >[ 17.168650] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.172022] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.176228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.178872] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878300 >[ 17.179492] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.182658] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 17.182680] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 17.182747] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.186596] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.190095] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.191101] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409733e40 >[ 17.193270] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.196484] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.200539] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.204649] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.208402] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.210610] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878e40 >[ 17.213261] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.216658] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.220666] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.221849] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c316c00 >[ 17.224016] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.227289] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.230547] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.233794] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.234130] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c316480 >[ 17.237020] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.240259] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.243471] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.246708] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.251777] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.252625] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878600 >[ 17.255002] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.259458] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.263802] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.265374] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409733c00 >[ 17.267017] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.267460] [drm:edp_panel_vdd_off_sync] Turning eDP port A VDD off >[ 17.267467] [drm:edp_panel_vdd_off_sync] PP_STATUS: 0x80000008 PP_CONTROL: 0xabcd0007 >[ 17.270179] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.273849] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.277068] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.277609] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409733900 >[ 17.280246] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.283468] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.286752] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.289967] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.290712] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878d80 >[ 17.293245] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.296453] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.299728] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.302946] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.303117] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878900 >[ 17.309229] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.312526] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.315491] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878d80 >[ 17.316601] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.320773] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.324000] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.327229] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.330453] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.333741] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.333853] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878900 >[ 17.336973] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.340233] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.343465] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.346062] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800d3878d80 >[ 17.346770] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.350018] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.352947] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.356198] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.358256] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a622300 >[ 17.359491] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.362849] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.366089] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.370237] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.374949] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.377621] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.380860] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.384079] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.387676] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.391311] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.394651] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.397951] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.401237] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.404637] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.409465] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.412381] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.415767] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.419011] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.422322] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.422788] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 17.424759] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 17.436917] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 17.436921] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 17.436939] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 17.437793] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 17.440171] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.444354] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.447578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.450799] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.454026] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.457182] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.460388] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.463604] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.466809] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.470019] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.473173] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.476399] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.479621] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.482851] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.484335] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325240 >[ 17.486091] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.489314] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.496805] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a840 >[ 17.497406] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.501539] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.504837] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.508332] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.508966] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928aa80 >[ 17.511567] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.514791] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.518015] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.521229] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.523846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.527073] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.527329] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a840 >[ 17.530325] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.533548] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.536770] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.539563] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80480 >[ 17.540005] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.543254] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.546495] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.550605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.551759] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 17.554822] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.558056] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.561266] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.564244] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80480 >[ 17.564522] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.567758] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.570981] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.574150] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.576485] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 17.577600] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.580842] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.584064] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.587307] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.588648] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325c00 >[ 17.590387] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.593667] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.596887] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.600046] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.604119] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.607312] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928aa80 >[ 17.608366] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.611646] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.614874] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.618136] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.619519] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a900 >[ 17.621371] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.624628] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.627877] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.631053] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.632945] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80480 >[ 17.634283] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.637524] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.640772] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.644055] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.645398] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928aa80 >[ 17.647279] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.650399] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.653611] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.657679] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.657948] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325600 >[ 17.661898] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.665121] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.668349] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.670321] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80780 >[ 17.671613] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.674846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.678033] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.681256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.684491] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.687720] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.690052] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 17.690955] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.694268] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.697467] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.700705] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.702333] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80780 >[ 17.704124] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.707364] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.711538] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.715737] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.718995] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.720726] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 17.722280] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.725566] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.728795] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.732097] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.733028] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80780 >[ 17.735331] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.738566] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.739171] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 17.741620] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.744873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.745525] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80780 >[ 17.748079] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.751360] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.752635] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928ac00 >[ 17.754699] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.757954] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.759143] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325c00 >[ 17.761082] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.765310] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80c00 >[ 17.766394] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.770986] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.771405] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325240 >[ 17.773852] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.777080] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.777501] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80f00 >[ 17.780390] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.783589] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325c00 >[ 17.785044] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.788354] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.791670] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.794913] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.798185] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.801422] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.802114] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 17.804853] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.808051] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.810920] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.814197] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.814364] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80600 >[ 17.816848] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.817355] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 17.819608] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 17.826768] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 17.838088] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 17.838100] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 17.838125] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 17.838838] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80600 >[ 17.838975] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 17.841367] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.844977] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 17.845640] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.848944] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.852166] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.854277] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928aa80 >[ 17.855404] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.858649] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.861894] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.865035] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.867152] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a900 >[ 17.868249] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.871462] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.873296] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80600 >[ 17.874727] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.877955] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.879507] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80840 >[ 17.881218] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.884463] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.885616] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928aa80 >[ 17.887729] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.890955] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.891724] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325f00 >[ 17.894430] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.897915] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80600 >[ 17.898716] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.902028] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.904014] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325f00 >[ 17.905259] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.908532] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.910199] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80a80 >[ 17.911822] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.915020] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.918266] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.921572] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.922360] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325c00 >[ 17.924936] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.928172] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.928492] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80cc0 >[ 17.931418] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.934647] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.934688] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 17.938119] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.940822] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80cc0 >[ 17.941400] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.944644] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 17.946937] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a840 >[ 17.948162] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.952367] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.955605] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.958864] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.962117] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.965357] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.965990] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928acc0 >[ 17.968647] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.971902] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.975140] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.978370] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.979217] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325600 >[ 17.981606] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.984842] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.988005] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 17.991246] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 17.991498] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c325c00 >[ 17.994531] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 17.997792] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.001924] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.003730] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.006149] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.009421] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.012658] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.015910] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.015974] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80240 >[ 18.019321] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.022601] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.025909] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.029237] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.033131] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.034347] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928a840 >[ 18.036480] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.041150] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.044408] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.047654] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.050544] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040928ac00 >[ 18.050895] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.054136] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.058264] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.062638] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.062784] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.065875] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.069137] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.073330] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.076519] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.076865] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80840 >[ 18.079939] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.083183] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.086431] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.089077] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.089679] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.092926] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.096188] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.099423] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.101395] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80840 >[ 18.102672] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.106092] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.109327] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.113425] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.113637] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.117617] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.120848] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.124080] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.127313] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.127672] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80840 >[ 18.130555] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.133787] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.136952] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.139883] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.140193] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.143432] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.146663] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.149846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.153082] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.156349] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.159182] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80840 >[ 18.159620] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.162872] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.166954] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.171190] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.172489] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39540 >[ 18.174415] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.177701] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.180845] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.184067] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.184835] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.187309] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.190573] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.193826] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.197085] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.197117] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80600 >[ 18.200325] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.203563] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.206811] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.209368] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.210089] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.213336] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.216579] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.217028] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 18.218481] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 18.221700] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80600 >[ 18.233340] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 18.233344] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 18.233511] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 18.234367] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 18.236755] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.240084] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39d80 >[ 18.241070] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.244368] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.247622] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.250822] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.252750] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf43840 >[ 18.254046] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.257291] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.260549] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.263832] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.267075] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.270337] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.271148] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf43780 >[ 18.273766] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.277011] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.280294] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.283476] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.283662] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.287012] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.291138] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.295405] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.295791] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80a80 >[ 18.298665] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.301900] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.305204] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.308468] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.308969] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80180 >[ 18.311747] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.315474] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.318887] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.321211] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 18.325931] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.329343] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.332639] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.333455] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39240 >[ 18.335888] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.339152] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.342502] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.345065] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.349153] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.352301] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf43f00 >[ 18.353264] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.356494] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.359745] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.362973] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.364500] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80a80 >[ 18.366196] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.369419] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.372591] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.375875] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.376904] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c316240 >[ 18.379121] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.382382] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.385632] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.388777] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.390305] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80cc0 >[ 18.392010] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.395245] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.398485] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.402551] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80240 >[ 18.402583] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.406784] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.410063] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.413311] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.414736] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c316900 >[ 18.416571] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.419816] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.423073] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.426347] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.429596] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.432770] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.433275] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80cc0 >[ 18.436002] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.439440] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.442705] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.445736] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 18.445986] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.449241] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.452492] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.456143] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.458117] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80cc0 >[ 18.460425] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.463742] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.466998] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.470363] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.471756] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80900 >[ 18.473645] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.476904] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.480155] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.482708] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.484018] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c3166c0 >[ 18.485941] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.489195] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.492480] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.495192] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.498416] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.501669] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.502364] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80cc0 >[ 18.504940] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.509049] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.513204] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.514614] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c3166c0 >[ 18.516455] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.519709] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.522962] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.526216] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.526844] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c316900 >[ 18.529468] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.532739] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.535988] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.539242] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.542485] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.545439] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040c316e40 >[ 18.545802] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.549043] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.552277] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.555457] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.557744] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 18.558711] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.562814] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.567048] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.570030] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 18.570321] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.573570] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.576873] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.580135] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.582341] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb4c00 >[ 18.583387] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.586728] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.589976] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.593236] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.594564] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb43c0 >[ 18.596484] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.599721] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.602962] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.606294] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.606950] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb4c00 >[ 18.609528] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.612718] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.613172] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 18.615338] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 18.619530] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 18.619533] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 18.619544] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 18.620537] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 18.622974] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.626565] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb43c0 >[ 18.627222] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.630473] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.633776] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.637036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.638979] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb4c00 >[ 18.640362] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.643617] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.646773] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.650003] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.651193] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 18.653409] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.656702] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.659970] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.662775] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.663388] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39240 >[ 18.666023] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.669297] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.672533] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.675620] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 18.676655] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.680866] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.684112] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.687348] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.688126] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39240 >[ 18.690622] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.693757] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.696999] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.700269] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.703523] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.706522] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80780 >[ 18.706755] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.709987] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.713219] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.716446] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.718767] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 18.719666] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.723638] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.726879] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.730982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.732588] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39540 >[ 18.735191] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.738446] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.741686] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.744792] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 18.744980] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.748217] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.751442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.754667] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.756988] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb43c0 >[ 18.757902] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.761190] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.764612] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.767853] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.771085] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.773909] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.775404] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040abb4d80 >[ 18.777306] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.780628] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.784726] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.787627] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39900 >[ 18.789327] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.792570] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.795831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.799077] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.799811] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800dbafc300 >[ 18.802303] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.805549] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.808716] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.811961] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.815220] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.818172] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d0240 >[ 18.818466] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.821715] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.824976] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.828245] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.831499] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.832855] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf390c0 >[ 18.834691] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.838783] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.843015] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.845119] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39540 >[ 18.846254] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.849489] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.852697] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.855953] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.858590] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39900 >[ 18.859237] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.862499] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.865693] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.868941] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.870857] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39540 >[ 18.872203] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.875457] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.878715] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.881975] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.883092] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39900 >[ 18.885216] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.888477] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.892633] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.896917] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.900289] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.901533] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a738c00 >[ 18.902979] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.906257] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.909667] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.912939] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.913743] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a738f00 >[ 18.915590] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.918828] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.922078] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.925344] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.926640] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 18.928669] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.931907] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.935175] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.938430] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.938886] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf396c0 >[ 18.941594] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.945701] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.949931] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.951279] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 18.953177] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.956413] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.959579] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.962789] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.963466] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf396c0 >[ 18.966031] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.969277] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.972532] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.975649] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.978903] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.982124] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.982814] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d09c0 >[ 18.985369] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 18.988566] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 18.991822] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 18.994390] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 18.994899] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 18.995192] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 18.997203] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 19.003225] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 19.003229] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 19.003252] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 19.004126] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 19.006525] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.012846] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.013602] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39480 >[ 19.016231] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.019552] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.022806] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.026152] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.029405] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.029812] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 19.032631] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.035873] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.039162] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.042414] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.043838] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39480 >[ 19.045545] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.048785] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.052036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.055279] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.056042] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a738780 >[ 19.058543] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.062631] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.066839] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.068516] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a738240 >[ 19.070169] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.073396] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.076605] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.079854] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.080743] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d06c0 >[ 19.083124] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.086394] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.089610] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.092850] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.092981] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a738780 >[ 19.096374] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.099598] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.102822] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.105236] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040a738900 >[ 19.105610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.108833] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.112422] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.116515] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.117487] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 19.120733] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.123967] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.127206] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.130443] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.133591] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.136239] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39cc0 >[ 19.136836] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.139525] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.142765] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.145991] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.149239] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.149795] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 19.152486] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.155835] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.159263] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.162153] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39cc0 >[ 19.162530] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.165775] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.169899] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.174124] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.174371] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 19.177381] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.180580] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.183840] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.186672] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39cc0 >[ 19.187117] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.190372] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.193570] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.196821] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.199051] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 19.200103] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.203365] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.206565] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.209814] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.213118] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.216370] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.218579] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39cc0 >[ 19.219653] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.224355] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.228455] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.231233] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803ff9d0000 >[ 19.231681] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.234904] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.238452] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.241678] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.243400] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803bf0bce40 >[ 19.244906] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.248153] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.251412] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.254542] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.255658] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39c00 >[ 19.257801] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.261189] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.264479] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.267744] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.267907] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.271210] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.274485] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.278606] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.282835] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.286077] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.286221] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39c00 >[ 19.289316] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.292540] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.295779] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.298470] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.299089] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.302352] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.305658] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.308914] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.310640] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39c00 >[ 19.312180] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.315445] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.318704] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.322076] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.325344] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.328531] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.329396] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.332639] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.336858] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.340108] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.341563] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39c00 >[ 19.342652] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.345945] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.349202] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.352512] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.353893] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.355760] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.359012] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.362270] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.365499] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.366110] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39c00 >[ 19.368727] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.371966] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.375268] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.378295] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803bf0bccc0 >[ 19.378425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.381660] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.382111] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 19.384059] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 19.390528] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.408831] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39240 >[ 19.413752] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 19.413755] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 19.413784] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 19.414648] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 19.417054] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.421286] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.421851] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.424499] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.427805] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.431063] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.434326] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.434879] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39240 >[ 19.437476] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.440735] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.444069] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.447228] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803bf0bcc00 >[ 19.447321] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.450484] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.453738] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.457058] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.459401] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.460327] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.463478] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.466732] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.470817] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.471554] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 19.475024] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.478264] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.481467] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.484722] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.488017] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.489851] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.491258] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.494462] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.497706] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.500997] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.502277] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 19.504241] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.507485] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.510750] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.514018] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.517270] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.520459] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.521611] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.524574] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.528805] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.532050] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.533822] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 19.535335] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.538579] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.541826] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.545069] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.546666] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.548365] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.551609] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.554848] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.558112] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.559021] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 19.561350] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.564595] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.567852] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.571100] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.571175] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39e40 >[ 19.574371] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.578464] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.582666] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.583435] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803bf0bcb40 >[ 19.585990] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.589233] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.592427] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.595078] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.598423] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.601662] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803eb124840 >[ 19.601679] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.604919] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.608158] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.611344] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.614589] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.615398] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 19.615445] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 19.617380] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.620706] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.623965] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.627228] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.631389] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.635611] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.638856] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.642098] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.645341] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.648583] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.652000] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.655366] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.658596] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.660189] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 19.660226] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 19.661186] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.664395] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.667625] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.670831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.674083] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.677258] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.680514] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.684592] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.688770] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.692013] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.695331] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.698582] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.701340] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.704585] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.707835] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.711075] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.714303] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.717553] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.720822] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.724089] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.727298] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.730524] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.733757] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.737868] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.742075] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.745289] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.748531] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.751790] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.755040] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.758303] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.761526] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.764751] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.768058] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.771378] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.775140] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.780649] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.783175] zeitgeist-datah (3005) used greatest stack depth: 12712 bytes left >[ 19.784088] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.787263] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.790549] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.791020] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 19.792908] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 19.798088] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 19.798092] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 19.798102] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 19.798999] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 19.801379] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.809834] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.810173] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 19.810198] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 19.813669] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.813926] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 19.816460] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.820382] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.823653] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.826990] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.830233] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.833473] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.836712] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.837185] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 19.837209] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 19.840003] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.843238] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.846482] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.849314] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.852542] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.855757] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.859859] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.864138] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.867326] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.869342] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 19.869369] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 19.870016] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.873230] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.874538] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 19.876447] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.879674] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.882923] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.886157] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.889321] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.892624] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.895899] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.898277] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 19.898304] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 19.899165] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.902420] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.905658] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.908908] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.913097] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.917230] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.920484] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.923880] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.926992] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 19.927019] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 19.927239] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.930611] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.934012] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.935480] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 19.937450] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.940685] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.944132] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.947188] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 19.947218] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 19.947300] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.951190] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.954456] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.957688] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.960925] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.964146] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 19.968238] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.972529] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.975442] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 19.975473] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 19.976797] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.980086] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.983272] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.986487] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.989831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 19.993065] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 19.996165] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39f00 >[ 19.996306] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 19.999522] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.002918] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.006478] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.009711] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.013014] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.016083] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803bf0bc840 >[ 20.016183] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.016300] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 20.016324] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 20.019514] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.023603] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.027780] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.030994] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.033731] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39000 >[ 20.034487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.037716] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.038416] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 20.038443] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 20.041006] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.044169] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.047449] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.047865] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf39cc0 >[ 20.050688] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.053927] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.054320] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803eb03c480 >[ 20.057161] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.061213] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.063430] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf3b600 >[ 20.063546] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8800daf3b900 >[ 20.064442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.067619] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.069769] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946a900 >[ 20.070862] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.074187] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.074838] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d803c0 >[ 20.079240] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.083424] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.086730] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.087523] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 20.087552] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 20.088887] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946acc0 >[ 20.090119] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.093404] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.096644] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.099872] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.103108] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.103973] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946a000 >[ 20.106239] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.109467] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.112688] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.115912] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.116372] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946acc0 >[ 20.118796] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.122007] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.125169] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.128431] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.130896] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946a000 >[ 20.132549] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.136800] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.140051] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.143225] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.144947] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80300 >[ 20.146466] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.149748] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.152978] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.156277] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.157547] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020600 >[ 20.159506] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.162733] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.165983] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.169142] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.171624] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8804090206c0 >[ 20.172486] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.175749] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.178973] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.182213] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.182664] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 20.184759] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 20.185625] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020600 >[ 20.199478] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8804090206c0 >[ 20.199552] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 20.199554] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 20.199564] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 20.200418] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 20.202790] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.207010] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.210200] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.213435] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.213543] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80c00 >[ 20.216781] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.220118] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.223377] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.226498] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946acc0 >[ 20.226742] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.229981] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.233111] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.236378] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.239641] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.240108] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946ae40 >[ 20.242881] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.246110] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.249352] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.252570] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.254242] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946acc0 >[ 20.256733] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.260923] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.264082] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.267297] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.267466] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80d80 >[ 20.270536] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.273758] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.276982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.280175] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.281352] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020600 >[ 20.283387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.286596] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.290075] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.293295] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.296044] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80480 >[ 20.296515] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.299748] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.302975] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.306172] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.308864] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 20.310281] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.313579] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.316803] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.320001] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.322553] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80480 >[ 20.323162] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.326390] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.329645] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.332878] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.336060] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.339306] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.342540] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.342815] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 20.345770] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.349029] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.352249] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.355121] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80480 >[ 20.355484] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.358721] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.362801] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.367001] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.367363] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff88040946ae40 >[ 20.370308] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.373675] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.376917] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.380056] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.383275] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.385625] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020300 >[ 20.385709] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020600 >[ 20.386161] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 20.386514] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.389747] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.392982] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.396131] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.398930] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80000 >[ 20.399367] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.402592] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.405855] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.409040] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.412026] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 20.412258] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.416325] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.420510] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.423736] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.424383] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80000 >[ 20.426950] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.430117] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.433343] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.436441] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 20.436589] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.439826] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.443029] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.446241] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.448722] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d80000 >[ 20.449453] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.452684] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.455909] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.459106] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.462332] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.465551] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.467025] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020300 >[ 20.469625] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.473817] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.477020] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.479278] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8804090206c0 >[ 20.480243] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.483490] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.486724] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.489959] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.492376] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020300 >[ 20.493192] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.496422] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.499731] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.503084] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.506342] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.509637] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.510630] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8803f8d800c0 >[ 20.512884] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.516004] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.519225] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.523322] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.524076] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8804090206c0 >[ 20.527636] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.530998] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.534217] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.536381] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020300 >[ 20.537449] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.540677] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.543916] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.547079] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.548569] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8804090206c0 >[ 20.550312] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.553551] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.556798] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.559998] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.560819] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020300 >[ 20.563231] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.566472] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.569706] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.572944] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.573395] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 20.575631] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 20.579052] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff8804090206c0 >[ 20.585501] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 20.585504] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 20.585514] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 20.586371] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 20.588755] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.591938] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020300 >[ 20.593055] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.596274] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.599514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.602744] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.605391] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020600 >[ 20.605991] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.609197] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.612447] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.615682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.617682] [drm:drm_atomic_set_fb_for_plane] Set [FB:78] for plane state ffff880409020300 >[ 20.618926] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.622058] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.625307] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.628553] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.631804] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.635196] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.638425] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.642515] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.646726] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.649946] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.653178] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.656419] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.659667] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.662938] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.666191] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.669573] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.672832] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.676036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.679273] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.682496] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.685808] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.688968] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.692214] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.696307] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.700415] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.703668] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.706925] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.710158] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.713385] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.716627] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.719880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.723024] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.726276] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.729529] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.732773] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.735936] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.739188] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.742416] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.745664] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.749761] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.754015] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.757281] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.760513] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.763769] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.766423] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.769583] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.772909] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.776156] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.779390] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.782635] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.785991] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.789227] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.792632] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.795990] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.799309] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.803417] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.807627] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.810857] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.814084] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.817318] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.820548] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.823776] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.826983] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.830226] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.830994] [drm:drm_atomic_set_fb_for_plane] Set [NOFB] for plane state ffff8803f8d80540 >[ 20.833460] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.836713] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.840156] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.843407] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.846681] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.849989] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.853279] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.857626] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.860897] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.864201] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.867456] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.870721] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.873974] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.877214] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.880464] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.883720] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.886964] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.890231] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.893481] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.896734] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.899959] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.903211] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.906472] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.910514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.914747] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.918159] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.921408] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.924663] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.927854] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.931106] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.934371] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.937625] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.940869] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.944129] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.947396] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.950651] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.953865] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.957115] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.960384] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 20.960837] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 20.962492] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 20.966113] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 20.966116] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 20.966198] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 20.967120] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 20.969493] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.973725] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.976936] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.980196] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.983449] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.986707] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.989926] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 20.993182] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 20.996435] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 20.999693] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.002911] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.006158] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.009428] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.012699] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.015921] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.019185] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.023300] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.027518] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.030807] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.034068] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.037351] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.040612] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.043822] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.047063] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.050313] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.053576] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.056821] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.060052] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.063304] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.066575] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.069829] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.073079] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.077193] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.081392] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.084663] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.087819] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.091086] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.094345] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.097613] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.100890] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.104159] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.107487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.110774] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.114026] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.117285] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.120471] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.123731] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.126886] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.131099] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.135272] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.138537] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.141806] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.145075] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.148311] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.151561] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.154800] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.158061] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.161385] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.164683] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.167562] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.171179] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.174471] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.177860] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.181123] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.185341] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.189578] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.192864] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.196130] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.199402] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.202642] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.205852] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.209100] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.212347] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.215589] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.218839] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.222073] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.225328] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.228599] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.231752] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.235011] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.239108] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.243226] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.246472] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.249707] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.253111] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.256403] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.259665] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.262840] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.265983] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.269292] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.272539] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.274497] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae10c0 >[ 21.274526] [drm:drm_atomic_set_fb_for_plane] Set [FB:77] for plane state ffff8803ffae1840 >[ 21.275778] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.279124] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.282380] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.285665] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.288825] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.292944] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.297182] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.300430] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.303898] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.307140] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.310370] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.313617] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.316807] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.320090] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.323385] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.326640] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.329813] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.333055] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.336315] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.339550] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.342730] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.343185] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 21.345345] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 21.355365] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 21.355368] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 21.355398] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 21.356247] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 21.358645] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.362800] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.366063] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.369341] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.372611] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.375793] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.379045] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.382331] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.385578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.388766] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.392025] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.395288] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.398524] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.401771] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.404994] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.408242] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.412329] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.416530] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.419693] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.422937] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.426209] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.429448] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.432689] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.435751] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.439003] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.442271] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.445523] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.448667] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.451930] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.455188] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.458412] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.461646] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.465745] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.469954] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.473204] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.476440] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.479746] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.482995] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.486225] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.489479] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.492742] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.495990] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.499254] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.502499] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.505738] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.508980] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.512228] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.515479] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.519643] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.523844] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.527066] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.530289] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.533687] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.536843] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.540080] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.543334] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.546585] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.549271] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.552500] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.555750] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.558994] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.562256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.565519] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.568717] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.572814] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.577036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.580286] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.583542] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.586710] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.589943] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.593228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.596499] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.599907] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.603144] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.606381] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.609688] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.612932] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.616175] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.619424] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.622618] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.626795] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.631008] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.634256] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.637485] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.640724] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.643964] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.647261] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.650519] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.653685] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.656915] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.660171] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.663419] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.666004] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.669257] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.672507] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.675680] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.679775] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.683997] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.687245] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.690490] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.693674] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.696923] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.700156] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.703412] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.706577] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.709734] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.712992] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.716238] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.719491] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.722659] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.725906] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.729131] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.729582] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 21.731211] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 21.741572] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 21.741577] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 21.741584] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 21.742440] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 21.744811] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.749022] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.752268] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.755504] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.758648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.761914] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.765192] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.768452] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.771933] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.775174] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.778412] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.781649] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.784896] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.788177] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.791412] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.794637] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.798720] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.802924] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.806334] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.809629] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.813629] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.816854] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.820166] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.823396] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.826624] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.829849] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.833159] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.836385] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.839607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.842849] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.846166] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.849464] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.853562] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.857760] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.860986] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.864209] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.867500] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.870733] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.873950] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.877177] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.880390] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.883589] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.886870] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.890146] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.893367] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.896581] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.899885] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.903132] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.907230] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.911470] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.914695] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.917929] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.921186] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.924431] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.927578] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.930817] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.934064] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.937372] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.940566] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.943795] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.947014] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.950234] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.953513] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.956724] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 21.960799] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.964942] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.968146] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.971356] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.974555] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.977784] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.981021] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.984245] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.987453] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 21.990654] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 21.993871] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 21.997084] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.000291] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.003452] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.006665] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.009887] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.013954] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.018111] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.021319] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.024437] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.027657] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.030859] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.034061] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.037276] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.040429] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.043594] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.046834] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.050057] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.053286] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.056453] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.059668] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.062886] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.066950] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.071133] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.074362] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.077524] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.080763] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.084002] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.087232] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.090437] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.093647] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.096875] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.100114] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.103340] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.106514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.109756] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.112988] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.116219] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.116674] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 22.119057] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 22.143047] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 22.143050] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 22.143075] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 22.143918] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 22.146294] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.150472] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.153702] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.156919] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.160157] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.163388] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.166491] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.169724] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.172937] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.176215] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.179481] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.182704] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.186000] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.189238] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.192390] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.195603] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.199687] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.203930] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.207159] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.210395] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.213479] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.216708] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.219981] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.223219] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.226389] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.229589] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.232833] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.236065] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.239311] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.242465] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.245695] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.248904] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.253022] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.257232] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.260377] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.263607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.266849] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.270081] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.273330] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.276776] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.280007] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.283238] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.286365] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.289592] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.292819] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.296056] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.299571] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.302791] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.306851] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.311056] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.314285] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.317424] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.320662] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.323921] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.327150] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.330350] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.333577] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.336804] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.340040] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.343294] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.346427] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.349667] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.352910] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.356139] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.360247] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.364336] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.367564] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.370792] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.374033] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.377289] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.380414] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.383652] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.386905] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.390141] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.393337] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.396564] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.399780] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.403005] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.406235] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.409406] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.413485] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.417680] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.420880] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.424109] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.427316] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.430530] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.433744] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.436982] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.440213] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.443378] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.446615] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.449836] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.453101] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.456306] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.459521] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.462814] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.466880] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.471066] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.474278] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.477494] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.480730] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.483933] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.487147] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.490302] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.493522] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.496737] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.499985] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.503217] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.506371] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.509613] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.512825] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.516047] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.516497] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 22.518905] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 22.530398] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 22.530401] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 22.530405] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 22.531249] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 22.533611] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.537722] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.540932] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.544139] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.547342] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.550580] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.553834] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.557045] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.560267] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.563498] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.566738] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.569968] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.573197] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.576345] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.579576] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.582843] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.586900] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.591097] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.594258] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.597474] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.600697] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.603916] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.607220] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.610446] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.613677] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.616888] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.620131] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.623316] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.626544] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.629773] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.633462] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.636704] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.640810] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.644992] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.648907] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.652524] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.655764] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.658988] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.662224] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.665451] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.668682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.671913] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.675153] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.678307] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.681520] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.684740] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.687973] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.691208] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.695275] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.699474] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.702705] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.705944] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.709202] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.712427] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.715724] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.718955] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.722186] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.725402] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.728289] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.731525] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.734782] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.737938] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.741162] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.744414] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.748481] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.752694] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.755933] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.759166] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.762391] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.765608] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.768829] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.772069] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.775192] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.778396] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.781626] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.784859] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.788093] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.791268] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.794503] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.797722] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.801804] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.806005] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.809151] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.812368] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.815604] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.818810] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.822034] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.825175] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.828383] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.831604] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.834846] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.838081] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.841252] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.844503] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.847744] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.850982] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.855070] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.859158] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.862373] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.865601] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.868838] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.872069] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.875236] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.878473] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.881671] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.884898] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.888139] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.891338] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.894566] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.897805] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.901033] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.904239] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.904688] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 22.906763] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 22.928864] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 22.928868] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 22.929004] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 22.929850] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 22.932211] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.936408] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.939654] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.942884] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.946125] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.949345] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.952572] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.955810] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.959039] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.962205] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.965444] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.968665] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.971895] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.975119] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.978335] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.981552] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 22.985613] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.989783] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 22.993017] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 22.996193] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 22.999434] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.002652] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.005881] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.009108] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.012313] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.015522] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.018768] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.022007] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.025183] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.028425] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.031633] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.034868] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.038952] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.043095] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.046314] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.049533] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.052777] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.056012] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.059174] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.062419] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.065659] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.069023] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.072171] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.075411] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.078647] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.081893] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.085088] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.088323] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.092409] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.096510] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.099720] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.102934] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.106168] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.109384] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.112595] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.115816] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.119034] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.122245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.125461] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.128688] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.131906] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.135047] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.138252] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.141472] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.145541] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.149716] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.152944] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.156162] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.159388] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.162596] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.165809] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.169118] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.172338] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.175552] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.178790] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.182006] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.185124] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.188362] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.191577] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.194812] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.198875] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.203062] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.206274] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.209488] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.212726] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.215970] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.219112] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.222347] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.225576] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.228843] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.232025] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.235251] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.238470] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.241697] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.244929] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.248091] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.252168] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.256363] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.259602] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.262833] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.266012] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.269232] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.272473] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.275695] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.278926] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.282090] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.285315] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.288534] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.291763] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.295003] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.298218] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.301462] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.301909] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 23.303627] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 23.338286] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 23.338289] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 23.338315] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 23.339165] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 23.341550] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.345751] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.348971] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.352191] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.355415] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.358649] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.361886] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.365062] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.368281] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.371538] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.374779] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.377972] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.381188] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.384430] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.387660] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.390895] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.394972] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.399155] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.402387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.405619] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.408861] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.412041] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.415272] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.418495] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.421726] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.424956] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.428168] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.431383] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.434617] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.437856] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.441035] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.444269] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.448335] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.452510] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.455730] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.458943] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.462166] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.465378] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.468607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.471844] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.475019] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.478250] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.481499] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.484733] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.487931] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.491141] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.494359] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.497592] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.501702] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.505897] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.509111] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.512340] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.515557] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.518786] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.521908] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.525131] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.528361] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.531589] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.534829] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.537997] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.541224] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.544447] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.547679] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.550911] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.554990] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.559186] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.562420] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.565651] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.568893] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.572087] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.575307] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.578531] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.581765] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.584981] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.588229] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.591445] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.594674] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.597879] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.601095] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.604315] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.608399] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.612584] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.615800] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.618955] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.622195] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.625419] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.628652] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.631911] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.635131] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.638355] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.641583] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.644861] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.648103] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.651332] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.654553] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.657859] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.662695] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.666854] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.670086] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.673326] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.676575] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.679806] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.682945] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.686184] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.689429] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.692663] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.695863] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.699069] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.702303] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.705527] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.708737] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.711927] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.712384] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 23.714474] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 23.736655] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 23.736658] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 23.736671] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 23.737519] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 23.739898] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.744063] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.747272] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.750490] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.753723] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.756920] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.760161] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.763376] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.766610] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.769831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.773059] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.776290] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.779517] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.782757] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.785908] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.789142] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.793228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.797410] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.800640] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.803802] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.807031] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.810247] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.813476] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.816718] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.819895] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.823124] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.826347] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.829561] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.832774] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.835888] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.838574] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.841810] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.845884] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.850083] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.853318] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.856547] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.859785] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.862986] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.866217] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.869454] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.872668] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.875790] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.879013] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.882243] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.885470] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.888694] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.891869] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.895099] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.899167] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.903331] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.906557] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.909779] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.913007] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.916224] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.919456] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.922697] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.925913] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.929207] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.932571] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.935754] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.938985] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.942213] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.945434] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.949072] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 23.955717] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.959844] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.963076] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.966290] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.969541] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.972761] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.975974] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.979212] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.982418] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.985638] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.988835] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 23.992066] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 23.995282] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 23.998522] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.001747] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.004966] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.009045] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.013215] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.016436] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.019666] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.022934] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.026155] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.029388] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.032627] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.035818] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.039037] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.042250] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.044960] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.048182] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.051424] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.054657] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.057812] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.061897] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.065205] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.068434] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.071654] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.074802] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.078033] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.081260] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.084501] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.087714] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.090916] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.094145] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.097374] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.100642] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.103791] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.107007] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.110206] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.110651] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 24.112341] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 24.118061] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 24.118064] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 24.118191] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 24.119047] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 24.121453] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.125647] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.128972] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.132203] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.135430] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.138680] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.141897] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.145141] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.148358] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.151586] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.154773] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.158002] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.161234] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.164473] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.167687] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.170905] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.174963] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.179142] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.182371] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.185601] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.188764] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.191995] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.195214] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.198448] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.201677] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.204894] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.207750] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.210957] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.214161] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.217375] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.220579] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.223746] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.227967] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.232104] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.235321] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.238524] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.241728] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.244930] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.248137] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.251353] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.254557] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.257731] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.260944] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.264147] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.267352] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.270566] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.273720] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.276933] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.281010] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.285201] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.288416] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.291629] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.294843] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.298062] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.301279] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.304526] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.307706] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.310918] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.314154] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.317431] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.320606] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.323821] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.327043] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.330267] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.334269] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.338429] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.341613] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.344839] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.348068] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.351298] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.354516] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.357693] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.360911] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.364139] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.367355] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.370558] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.373694] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.376912] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.380124] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.383337] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.387398] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.391586] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.394787] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.398018] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.401259] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.404474] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.407681] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.410920] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.414137] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.417359] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.420597] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.423811] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.427014] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.430253] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.433470] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.436674] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.440751] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.444948] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.448200] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.451429] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.454583] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.457735] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.460965] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.464206] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.467409] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.470580] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.473805] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.477027] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.480257] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.483498] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.486656] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.489891] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.490341] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 24.492208] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 24.519536] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 24.519540] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 24.519739] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 24.520591] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 24.522958] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.527132] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.530352] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.533559] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.536185] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.539421] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.542466] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.545635] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.548865] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.552103] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.555346] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.558533] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.561741] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.564975] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.568210] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.571455] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.575538] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.579729] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.582965] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.586204] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.589455] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.592619] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.595857] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.599138] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.602375] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.605615] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.608862] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.612156] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.615394] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.618536] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.621773] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.625002] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.629117] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.633320] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.636605] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.639842] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.643131] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.646370] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.649600] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.652850] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.656133] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.659372] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.662595] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.665833] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.669111] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.672362] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.675514] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.678724] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.682815] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.687054] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.690283] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.693582] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.696835] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.700122] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.703365] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.706586] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.709853] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.713150] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.716496] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.719771] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.723111] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.726347] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.729488] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.732709] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.736842] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.741030] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.744259] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.747465] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.750695] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.753990] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.757222] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.760473] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.763689] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.766922] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.770162] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.773400] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.776624] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.779865] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.783097] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.786328] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.790420] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.794545] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.797779] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.801043] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.804270] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.807457] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.810689] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.813928] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.817169] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.820427] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.823654] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.826890] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.830127] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.833395] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.836530] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.839754] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.843819] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.847995] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.851228] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.854442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.857683] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.860926] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.864159] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.867411] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.870519] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.873755] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.877020] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.880257] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.883328] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.886513] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.889652] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.892890] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.893337] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 24.895066] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 24.897835] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 24.897838] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 24.898108] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 24.898965] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 24.901335] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.905505] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.908724] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.912037] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.915284] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.918421] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.921646] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.924884] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.928122] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.931361] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.934495] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.937740] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.941014] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.944260] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.947404] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.950617] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 24.954691] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.958886] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.961489] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.964700] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.967994] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.971234] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.974480] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.977722] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.980935] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.984175] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.987397] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 24.990622] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 24.993848] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 24.997099] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.000366] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.003597] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.007694] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.011391] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.014635] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.017881] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.021141] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.024387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.027626] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.030878] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.034105] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.037375] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.040624] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.043868] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.047098] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.050370] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.053597] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.056840] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.060949] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.065127] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.068350] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.071560] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.074794] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.078043] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.081255] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.084435] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.087656] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.090890] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.094131] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.097353] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.100571] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.103808] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.107022] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.110235] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.114318] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.118414] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.121621] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.124838] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.128058] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.131271] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.134410] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.137630] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.140850] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.144080] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.147294] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.150416] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.153653] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.156867] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.160099] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.163330] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.167406] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.171607] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.174846] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.178076] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.181321] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.184404] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.187635] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.190860] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.194090] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.197329] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.200558] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.203778] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.207009] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.210236] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.213394] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.216618] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.220700] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.224866] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.228094] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.231310] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.234537] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.237761] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.240996] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.244241] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.247369] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.250605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.253958] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.257180] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.260374] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.263610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.266859] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.270096] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.270552] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 25.272934] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 25.304252] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 25.304256] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 25.304279] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 25.305129] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 25.307515] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.311738] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.314981] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.318225] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.321358] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.324600] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.327843] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.331096] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.334274] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.337519] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.340779] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.344023] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.347245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.350486] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.353719] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.356963] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.360168] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.363348] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.366592] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.369855] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.373104] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.376272] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.379491] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.382719] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.385962] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.389208] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.392334] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.395577] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.398823] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.402075] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.405253] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.408499] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.412594] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.416722] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.419968] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.423215] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.426445] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.429675] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.432920] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.436179] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.439314] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.442557] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.445820] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.449069] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.452245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.455486] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.458735] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.461986] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.466118] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.470612] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.473852] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.477086] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.480297] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.483517] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.486806] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.490050] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.493210] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.496438] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.499682] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.502915] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.506168] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.509276] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.512509] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.515784] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.519841] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.524041] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.527276] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.530502] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.533737] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.536934] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.540163] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.543372] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.546612] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.549849] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.553102] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.556269] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.559505] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.562753] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.565978] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.569183] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.573294] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.577514] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.580799] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.584028] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.587260] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.590503] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.593729] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.596982] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.600242] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.603483] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.606731] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.609969] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.613238] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.616481] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.619718] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.622953] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.627050] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.631164] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.634385] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.637606] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.640849] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.644089] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.647831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.651215] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.654431] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.657674] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.660926] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.664145] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.667363] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.670605] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.673833] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.677070] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.677522] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 25.679774] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 25.689628] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 25.689631] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 25.689652] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 25.690505] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 25.692783] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.696991] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.700219] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.703461] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.706699] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.709961] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.713135] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.716356] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.719588] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.722828] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.726085] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.729215] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.732461] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.735718] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.738964] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.742118] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.746218] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.750433] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.753662] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.756901] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.760120] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.763347] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.766579] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.769831] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.773076] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.776192] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.779458] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.782700] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.785940] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.789187] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.792464] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.795709] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.799879] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.804083] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.807167] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.810390] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.813610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.816818] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.820054] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.823279] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.826495] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.829729] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.832949] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.836062] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.839271] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.842491] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.845712] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.848932] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.853006] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.857158] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.860393] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.863648] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.866888] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.870156] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.873377] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.876648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.879881] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.883080] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.886323] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.889556] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.892786] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.896013] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.899145] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.902377] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.906438] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.910627] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.913857] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.917059] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.920298] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.923529] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.926770] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.930028] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.933248] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.936467] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.939719] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.942966] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.946209] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.949447] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.952688] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.955914] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 25.959152] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.963342] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.965917] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.969119] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.971713] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.975016] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.978264] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.981554] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.984789] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.988032] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 25.991283] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 25.994511] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 25.997753] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.000964] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.004116] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.007346] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.011428] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.015626] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.018866] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.022031] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.025283] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.028532] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.031789] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.035019] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.038235] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.041462] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.044714] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.047942] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.052089] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.055930] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.059093] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.062340] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.062790] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 26.064646] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 26.086112] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 26.086116] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 26.086129] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 26.086977] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 26.089357] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.093534] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.096751] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.100069] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.103308] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.106535] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.109779] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.112994] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.116206] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.119448] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.122703] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.125946] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.129067] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.132316] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.135531] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.138776] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.142928] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.147049] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.150290] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.153533] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.156784] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.160056] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.163290] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.166546] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.169779] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.173049] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.176306] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.179552] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.182784] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.186047] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.189294] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.192528] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.196610] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.200804] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.204155] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.207405] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.210663] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.213935] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.217158] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.220388] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.223609] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.226863] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.230033] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.233276] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.236539] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.239796] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.242937] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.246156] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.250236] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.254417] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.257662] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.260925] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.264169] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.267362] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.270576] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae10c0 >[ 26.270608] [drm:drm_atomic_set_fb_for_plane] Set [FB:58] for plane state ffff8803ffae1840 >[ 26.270618] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.273946] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.277184] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.280402] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.283644] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.286900] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.290117] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.293362] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.296600] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.299854] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.303933] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.307999] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.311236] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.314482] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.317730] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.320913] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.324148] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.327377] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.330612] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.333846] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.336980] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.340219] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.343455] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.346691] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.349908] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.353133] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.357219] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.361372] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.364566] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.367805] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.370977] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.374214] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.377459] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.380707] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.383881] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.387108] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.390369] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.393604] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.396876] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.400111] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.403337] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.406583] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.410708] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.414886] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.418117] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.421357] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.424618] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.427964] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.431206] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.434375] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.437617] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.440876] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.444127] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.447365] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.450607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.453872] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.457155] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.460477] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.460926] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 26.462500] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 26.466662] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 26.466666] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 26.466690] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 26.467545] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 26.469922] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.474114] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.477336] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.480554] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.483784] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.486935] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.490154] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.493391] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.496610] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.499830] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.503060] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.506280] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.509503] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.512743] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.515926] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.519151] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.523234] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.527625] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.530822] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.534051] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.537319] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.540571] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.543857] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.547126] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.550373] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.553616] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.556381] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.559604] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.562836] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.566091] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.569340] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.572681] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.576774] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.580906] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.584148] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.587446] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.590710] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.593904] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.597155] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.600451] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.603691] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.606895] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.610276] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.613500] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.616750] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.619980] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.623221] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.626455] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.630583] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.634801] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.638208] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.641444] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.644699] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.648037] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.651287] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.654558] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.657855] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.661108] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.664430] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.667792] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.671040] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.674400] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.677660] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.680872] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.684981] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.689172] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.692387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.695605] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.698754] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.701976] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.705186] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.708400] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.711608] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.714768] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.717984] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.721191] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.724398] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.727616] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.730752] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.733958] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.738025] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.742202] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.745434] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.748669] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.751838] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.755042] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.758265] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.761481] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.764695] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.767821] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.771036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.774245] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.777463] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.780717] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.783940] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.787148] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.791223] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.795416] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.798652] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.801819] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.805054] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.808291] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.811954] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.815175] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.818398] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.821621] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.824809] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.828020] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.831298] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.834527] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.837815] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.841031] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.841489] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 26.843346] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 26.849595] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 26.849598] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 26.849607] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 26.850549] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 26.852946] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.857126] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.860379] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.863627] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.866799] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.870020] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.873308] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.876546] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.879713] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.882901] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.886147] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.889379] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.892603] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.895789] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.899028] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.902255] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.906396] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.910568] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.913781] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.917019] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.920294] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.923531] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.926700] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.929947] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.933175] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.936385] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.939644] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.942772] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.946011] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.949643] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.952931] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.956178] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 26.960270] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.964485] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.967662] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.970875] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.974117] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.977356] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.980607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.983762] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.986999] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.990278] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 26.993529] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 26.996674] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 26.999918] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.003164] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.006398] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.009660] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.013750] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.017947] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.021263] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.024509] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.027667] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.030881] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.034109] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.037363] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.040607] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.043737] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.046981] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.050243] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.053487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.056658] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.059884] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.063118] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.067198] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.071387] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.074635] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.077864] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.081103] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.084349] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.088365] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.091616] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.094845] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.098072] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.101323] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.104567] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.107716] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.110969] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.114217] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.117459] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.121555] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.125710] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.128927] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.132144] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.135369] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.138603] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.141692] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.144946] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.147614] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.151012] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.154277] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.157520] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.160693] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.163972] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.167206] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.170441] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.174520] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.178682] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.181915] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.185151] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.188393] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.191597] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.194817] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.198050] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.201312] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.204568] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.207802] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.211021] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.214257] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.217526] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.220669] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.223910] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.224366] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 27.226217] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 27.253801] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 27.253804] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 27.253828] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 27.254678] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 27.257048] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.261238] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.264488] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.267653] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.270898] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.274120] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.277358] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.280567] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.283789] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.287006] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.290256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.293497] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.296643] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.299893] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.303123] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.306336] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.310435] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.314560] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.317795] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.321037] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.324288] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.327536] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.330766] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.334017] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.337257] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.340502] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.343740] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.346974] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.350213] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.353462] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.356621] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.359855] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.363946] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.368136] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.371383] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.374540] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.377789] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.381030] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.384270] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.387523] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.390771] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.393997] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.397247] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.400481] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.403606] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.406858] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.410108] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.413353] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.417501] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.421697] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.424938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.428182] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.431433] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.434594] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.437836] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.441098] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.444327] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.447513] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.450750] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.453982] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.457225] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.460478] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.463691] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.466922] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.471014] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.475233] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.478465] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.481691] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.484939] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.488186] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.491430] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.494575] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.497807] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.501053] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.504319] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.507478] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.510708] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.513960] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.517257] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.520512] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.524607] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.528829] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.532066] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.535313] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.538481] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.541726] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.544970] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.548197] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.551423] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.554643] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.557880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.561090] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.564302] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.567434] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.570647] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.573861] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.577936] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.582103] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.585308] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.588438] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.591664] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.594885] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.598109] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.601334] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.604520] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.607743] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.610961] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.614183] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.617397] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.620623] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.623842] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.627078] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.627525] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 27.629074] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 27.641143] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 27.641147] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 27.641168] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 27.642013] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 27.644390] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.648513] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.651746] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.655011] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.658251] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.661426] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.664663] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.667909] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.671364] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.674506] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.677756] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.681646] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.684874] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.688439] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.691682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.694936] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.699029] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.703225] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.706416] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.709642] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.712880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.716121] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.719365] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.722601] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.725830] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.729075] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.732329] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.735485] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.738699] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.741955] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.745203] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.748407] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.752505] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.756724] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.759956] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.763200] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.766399] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.769643] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.772889] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.776147] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.779434] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.782682] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.785922] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.789188] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.792390] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.795645] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.798899] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.802144] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.806264] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.810382] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.813630] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.816880] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.820141] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.823383] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.826602] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.829815] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.833062] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.836312] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.839452] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.842702] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.845947] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.849209] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.852371] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.855622] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.859724] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.863841] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.867088] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.870335] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.873575] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.876808] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.880053] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.883313] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.886433] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.889678] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.892923] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.896168] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.899351] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.902575] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.905803] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.909058] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.913161] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.917346] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.920594] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.923843] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.927101] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.930342] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.933572] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.936813] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.940053] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.943284] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.946519] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.949776] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.953028] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.956279] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.959518] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.962770] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 27.966873] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.971080] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.974303] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.977536] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.980783] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.984029] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.987270] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 27.990541] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 27.993780] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 27.997033] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.000284] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.003463] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.006713] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.009969] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.013225] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.016391] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.016846] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 28.018935] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 28.041650] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 28.041653] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 28.041678] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 28.042528] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 28.044929] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.049112] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.052264] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.055477] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.058700] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.061912] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.065124] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.068268] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.071480] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.074699] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.077923] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.081150] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.084355] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.087579] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.090853] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.094070] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.098210] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.102339] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.105553] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.108826] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.112050] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.115334] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.118549] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.121831] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.125047] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.128331] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.131557] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.134826] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.138044] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.141234] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.144449] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.147676] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.151784] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.155970] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.159214] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.162437] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.165667] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.168885] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.172105] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.175323] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.178543] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.181833] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.185092] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.188319] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.191556] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.194885] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.198117] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.200697] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.204834] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.209026] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.212317] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.215537] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.218811] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.222033] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.225298] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.228529] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.231809] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.235032] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.238304] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.241532] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.244810] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.248061] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.251292] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.254518] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.258612] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.262807] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.266038] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.269284] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.272519] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.275793] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.279018] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.282279] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.285504] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.288791] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.292027] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.295283] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.298508] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.301784] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.305009] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.308271] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.312360] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.316556] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.319819] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.323075] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.326279] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.329534] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.332788] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.336045] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.339194] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.342441] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.345694] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.348946] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.352179] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.355268] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.358516] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.361751] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.365819] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.370045] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.373184] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.376432] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.379705] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.382966] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.386183] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.389255] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.392644] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.395961] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.399154] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.402387] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.405647] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.408903] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.412148] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.415378] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.415832] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 28.417799] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 28.427937] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 28.427940] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 28.427967] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 28.428817] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 28.431204] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.435407] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.438650] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.441881] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.445146] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.448378] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.451613] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.454854] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.458142] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.461372] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.464613] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.467845] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.471112] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.474350] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.477561] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.480770] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.484772] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.488944] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.492104] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.495334] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.498565] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.501799] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.505003] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.508235] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.511457] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.514665] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.517882] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.521091] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.524300] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.527519] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.530734] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.533947] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.538018] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.542086] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.545301] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.548510] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.551727] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.554932] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.558102] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.561329] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.564545] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.567778] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.571021] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.574178] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.577381] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.580677] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.583910] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.587094] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.591177] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.595392] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.598694] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.601941] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.605095] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.608424] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.611722] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.614981] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.618173] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.621428] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.624698] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.627949] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.631088] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.634349] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.637694] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.640950] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.645058] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.649270] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.652531] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.655784] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.659078] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.662326] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.665664] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.668926] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.672074] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.675293] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.678552] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.681788] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.685133] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.688400] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.691893] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.695150] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.699263] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.703472] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.706741] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.710043] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.713312] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.716578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.719832] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.723059] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.726317] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.729674] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.732947] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.736132] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.739387] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.742679] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.745913] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.749129] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.753237] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.757484] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.760744] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.764036] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.767301] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.770660] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.773920] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.777216] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.780480] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.783739] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.787042] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.790298] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.793647] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.796915] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.800108] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.803364] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.803816] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 28.805658] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 28.840404] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 28.840407] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 28.840420] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 28.841268] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 28.843651] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.847909] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.851106] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.854365] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.857632] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.860896] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.864084] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.867347] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.870609] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.873871] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.877084] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.880343] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.883574] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.886812] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.890000] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.893259] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.897368] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.901577] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.904834] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.907993] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.911257] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.914692] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.917981] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.921247] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.924610] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.927875] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.931063] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.934325] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.937596] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.940868] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.944062] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.947325] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 28.951426] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.955648] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.958943] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.962199] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.965473] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.968734] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.972047] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.975319] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.978589] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.981850] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.985042] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.988281] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 28.991552] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 28.994820] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 28.998031] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.001262] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.005368] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.009558] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.012817] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.016037] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.019300] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.022554] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.025801] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.029009] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.032250] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.035477] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.038723] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.041938] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.045171] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.048428] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.051674] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.054936] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.059032] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.063238] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.066638] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.069922] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.073180] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.076440] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.079691] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.082927] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.086178] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.089436] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.092695] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.095920] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.099171] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.102440] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.105693] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.108917] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.113021] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.117248] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.120497] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.123743] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.126908] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.130125] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.133360] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.136617] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.139868] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.142985] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.146386] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.149641] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.152903] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.156217] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.159462] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.162683] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.166811] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.170964] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.174220] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.177478] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.180743] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.183730] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.186968] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.190233] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.193484] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.196724] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.199903] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.203159] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.206418] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.209685] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.212883] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.216139] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.216592] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 29.218498] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 29.224769] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 29.224773] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 29.224798] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 29.225651] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 29.228039] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.232246] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.235482] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.238719] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.241936] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.245169] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.248407] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.251651] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.254844] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.258075] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.261318] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.264549] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.267785] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.270934] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.274169] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.277406] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.281487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.285692] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.288829] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.292060] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.295298] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.298529] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.301763] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.305009] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.308244] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.311476] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.314729] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.317919] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.321173] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.324431] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.327685] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.330843] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.334949] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.339179] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.342422] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.345652] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.348834] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.352062] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.355310] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.358577] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.361832] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.365074] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.368356] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.371616] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.374829] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.378080] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.381357] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.384616] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.388746] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.392895] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.396156] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.399404] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.402674] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.405893] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.409152] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.412420] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.415682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.418886] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.422157] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.425404] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.428666] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.431880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.435141] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.438391] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.442439] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.446668] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.449874] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.453139] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.456417] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.459682] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.462872] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.466131] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.469445] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.472721] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.475987] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.479260] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.482539] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.485865] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.489133] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.492387] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.496415] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.500644] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.503858] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.507121] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.510396] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.513660] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.516854] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.520127] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.523389] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.526652] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.529848] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.533111] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.536376] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.539647] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.542832] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.546095] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.550228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.554451] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.557720] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.560980] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.564256] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.567522] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.570831] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.574105] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.577378] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.580649] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.583819] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.587046] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.590276] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.593491] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.596700] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.599811] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.600258] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 29.602348] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 29.614637] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 29.614640] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 29.614649] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 29.615496] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 29.617861] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.622020] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.625222] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.628429] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.631670] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.634782] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.637988] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.641205] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.644411] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.647616] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.650777] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.653987] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.657269] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.660484] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.663706] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.666915] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.670995] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.675170] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.678403] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.681635] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.684779] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.688012] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.691228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.694469] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.697691] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.700912] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.704146] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.707393] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.710640] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.713880] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.717124] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.720380] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.724510] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.728691] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.731939] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.735189] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.738447] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.741688] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.744941] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.747585] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.750764] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.754014] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.757262] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.760513] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.763954] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.767190] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.770440] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.774278] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.778448] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.782659] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.785887] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.789121] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.792354] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.795488] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.798732] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.801968] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.805265] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.808487] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.811724] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.814945] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.818245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.821477] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.824719] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.827943] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.832030] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.836222] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.839467] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.842644] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.845897] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.849128] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.852375] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.855620] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.858849] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.862080] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.865334] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.868580] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.871718] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.874974] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.878225] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.881472] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.885570] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.889713] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.892958] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.896210] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.899464] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.902624] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.905867] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.909107] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.912351] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.915596] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.918835] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.922078] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.925321] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.928575] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.931804] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.935058] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.939180] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.943400] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.946611] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.949855] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.953114] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.956358] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.959604] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.962855] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.966082] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.969322] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.972574] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.975804] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.979031] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 29.982281] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 29.985531] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 29.988676] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 29.989128] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 29.991213] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 30.023151] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 30.023155] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 30.023180] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 30.024033] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 30.026421] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.030594] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.033850] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.037116] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.040373] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.043577] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.046725] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.049983] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.053234] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.056482] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.059650] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.062901] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.066209] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.069468] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.072648] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.075900] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.079998] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.084639] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.087885] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.091225] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.094602] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.097857] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.101220] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.104540] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.107774] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.111014] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.114340] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.117540] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.120772] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.124031] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.127278] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.130533] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.134632] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.138852] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.142100] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.145319] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.148542] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.151776] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.155011] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.158268] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.161522] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.164744] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.168203] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.171453] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.174608] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.177977] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.181230] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.184491] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.188594] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.192819] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.196083] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.199327] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.202601] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.205843] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.209104] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.212356] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.215527] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.218781] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.222031] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.225177] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.228436] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.231039] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.234278] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.237515] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.241619] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.245849] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.249102] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.252354] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.255497] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.258751] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.261974] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.265229] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.268481] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.271701] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.274945] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.278191] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.281442] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.284672] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.287908] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.291158] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.295245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.299461] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.302692] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.305925] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.309230] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.312471] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.315703] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.318947] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.322345] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.325552] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.328805] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.332055] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.335301] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.338468] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.341687] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.344910] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.349008] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.353210] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.356446] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.359676] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.362917] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.366165] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.369412] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.372651] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.375890] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.379135] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.382376] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.385533] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.388779] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.392038] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.395285] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.398449] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.398902] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 30.401071] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 30.406532] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 30.406535] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 30.406560] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 30.407408] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 30.409795] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.413921] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.417172] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.420421] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.423663] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.426914] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.430159] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.433435] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.436680] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.439909] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.443163] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.446404] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.449634] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.452861] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.456106] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.459353] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.463449] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.467658] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.470905] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.474150] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.477414] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.480631] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.483863] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.487116] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.490365] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.493495] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.496754] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.500011] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.503260] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.506412] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.509655] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.512907] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.517007] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.521226] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.524400] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.527646] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.530916] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.534167] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.537397] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.540477] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.543723] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.546960] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.550224] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.553396] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.556647] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.559914] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.563171] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.566380] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.570484] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.574719] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.577976] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.581231] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.584479] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.587730] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.590988] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.594248] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.597617] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.600316] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.608048] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.613613] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.617022] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.620595] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.624318] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.627681] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.631787] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.635955] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.639197] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.642569] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.645815] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.648460] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.651698] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.654952] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.658556] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.661817] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.665047] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.668277] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.671411] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.674651] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.678071] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.681294] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.685382] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.689562] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.692780] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.696000] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.699220] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.702439] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.705674] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.708899] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.712099] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.715430] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.718650] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.721860] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.725065] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.728299] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.731496] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.734728] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.738793] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.742963] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.746175] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.749381] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.752610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.755826] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.759028] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.762257] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.765388] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.768620] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.771860] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.775090] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.778299] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.781524] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.784761] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.787993] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.788439] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 30.789930] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 30.804958] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 30.804962] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 30.804988] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 30.805840] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 30.808230] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.812377] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.815629] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.818852] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.822097] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.825263] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.828494] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.831741] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.834991] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.838273] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.841533] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.844773] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.848016] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.851272] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.854366] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.857623] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.861738] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.865939] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.869191] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.872360] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.875601] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.878839] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.882126] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.885355] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.888594] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.891828] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.895086] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.898270] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.901514] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.904780] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.908025] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.911265] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.915363] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.919580] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.922817] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.926064] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.929246] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.932464] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.935699] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.938957] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.942206] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.945317] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.948577] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.951832] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.955084] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.958251] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.961500] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.964760] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 30.968863] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.973088] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.976246] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.979491] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.982766] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.986022] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.989243] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 30.992497] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 30.995747] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 30.998994] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.002239] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.005467] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.008715] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.011980] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.015249] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.018518] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.022633] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.026852] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.030113] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.033303] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.036568] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.039824] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.043245] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.046553] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.049775] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.052997] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.056205] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.059452] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.062694] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.065932] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.069089] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.072289] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.076403] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.080610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.083863] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.087119] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.090288] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.093543] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.096776] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.100036] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.103195] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.106447] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.109723] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.112983] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.116201] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.119466] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.122724] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.125983] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.130134] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.134267] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.137496] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.140797] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.144045] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.147243] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.150491] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.153764] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.156994] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.160228] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.163467] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.166719] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.169968] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.173182] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.176424] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.179697] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.180147] [drm:intel_dp_complete_link_train] *ERROR* failed to train DP, aborting >[ 31.181805] [drm:intel_dp_check_mst_status] got esi 41 00 00 >[ 31.195296] [drm:intel_hpd_irq_handler] hotplug event received, stat 0x00400000, dig 0x10101110 >[ 31.195299] [drm:intel_hpd_irq_handler] digital hpd port C - short >[ 31.195352] [drm:intel_dp_hpd_pulse] got hpd irq on port C - short >[ 31.196212] [drm:intel_dp_check_mst_status] channel EQ not ok, retraining >[ 31.198608] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.202802] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.206052] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.209235] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.212467] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.215764] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.219008] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.222146] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.225385] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.228627] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.231883] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.235143] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.237743] [drm:drm_atomic_set_fb_for_plane] Set [FB:56] for plane state ffff8800daf3a540 >[ 31.238434] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.241808] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.245054] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.248219] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.252316] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.256533] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.259788] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.263032] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.266212] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.269454] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.272723] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.275973] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.279127] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.282368] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.285628] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.288878] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.292123] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.295379] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.298648] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.301896] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.306051] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.309589] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.312836] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.316086] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.319329] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.322578] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.325833] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.329097] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.332328] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.335547] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.338801] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.342050] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.345183] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.348443] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.351699] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.354948] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.359042] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.363178] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.366425] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.369641] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.372899] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.376099] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.379345] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.382610] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.385856] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.389092] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.392325] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.395574] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.398821] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.402088] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.405335] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.408586] [drm:intel_dp_start_link_train] *ERROR* too many full retries, give up >[ 31.412710] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.416932] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.420080] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.423326] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.426591] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.429847] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.433083] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.436342] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.439683] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.442934] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.446150] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.453350] [drm:intel_dp_set_signal_levels] Using signal levels 07000000 >[ 31.456765] [drm:intel_dp_set_signal_levels] Using signal levels 00000000 >[ 31.460508] [drm:intel_dp_set_signal_levels] Using signal levels 04000000 >[ 31.464972] [drm:intel_dp_set