Attachment 44596 Details for Bug 35072 – Fix tiling corruption (v2.6.38)

[patch] Fix tiling corruption (v2.6.38)

0001-drm-i915-Fix-tiling-corruption-from-pipelined-fencin.patch (text/plain), 2.54 KB, created by Chris Wilson on 2011-03-18 14:15:20 UTC

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Creator: Chris Wilson

Created: 2011-03-18 14:15:20 UTC

Size: 2.54 KB

patch

obsolete

>From a6abed3f4af3f4d526a66b7f5a5ef57b94cac4c2 Mon Sep 17 00:00:00 2001
>From: Chris Wilson <chris@chris-wilson.co.uk>
>Date: Thu, 17 Mar 2011 15:23:22 +0000
>Subject: [PATCH] drm/i915: Fix tiling corruption from pipelined fencing
>
>... even though it was disabled. A mistake in the handling of fence reuse
>caused us to skip the vital delay of waiting for the object to finish
>rendering before changing the register.
>
>Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=34584
>Cc: Andy Whitcroft <apw@canonical.com>
>Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
>[Note for 2.6.38-stable, we need to reintroduce the interruptible passing]
>Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>---
> drivers/gpu/drm/i915/i915_gem.c |   44 +++++++++++++++-----------------------
> 1 files changed, 17 insertions(+), 27 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
>index d4bf061..c5dfb59 100644
>--- a/drivers/gpu/drm/i915/i915_gem.c
>+++ b/drivers/gpu/drm/i915/i915_gem.c
>@@ -2581,8 +2581,23 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
> 		reg = &dev_priv->fence_regs[obj->fence_reg];
> 		list_move_tail(&reg->lru_list, &dev_priv->mm.fence_list);
> 
>-		if (!obj->fenced_gpu_access && !obj->last_fenced_seqno)
>-			pipelined = NULL;
>+		if (obj->tiling_changed) {
>+			ret = i915_gem_object_flush_fence(obj, pipelined);
>+			if (ret)
>+				return ret;
>+
>+			if (!obj->fenced_gpu_access && !obj->last_fenced_seqno)
>+				pipelined = NULL;
>+
>+			if (pipelined) {
>+				reg->setup_seqno =
>+					i915_gem_next_request_seqno(pipelined);
>+				obj->last_fenced_seqno = reg->setup_seqno;
>+				obj->last_fenced_ring = pipelined;
>+			}
>+
>+			goto update;
>+		}
> 
> 		if (!pipelined) {
> 			if (reg->setup_seqno) {
>@@ -2601,31 +2616,6 @@ i915_gem_object_get_fence(struct drm_i915_gem_object *obj,
> 			ret = i915_gem_object_flush_fence(obj, pipelined);
> 			if (ret)
> 				return ret;
>-		} else if (obj->tiling_changed) {
>-			if (obj->fenced_gpu_access) {
>-				if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) {
>-					ret = i915_gem_flush_ring(obj->ring,
>-								  0, obj->base.write_domain);
>-					if (ret)
>-						return ret;
>-				}
>-
>-				obj->fenced_gpu_access = false;
>-			}
>-		}
>-
>-		if (!obj->fenced_gpu_access && !obj->last_fenced_seqno)
>-			pipelined = NULL;
>-		BUG_ON(!pipelined && reg->setup_seqno);
>-
>-		if (obj->tiling_changed) {
>-			if (pipelined) {
>-				reg->setup_seqno =
>-					i915_gem_next_request_seqno(pipelined);
>-				obj->last_fenced_seqno = reg->setup_seqno;
>-				obj->last_fenced_ring = pipelined;
>-			}
>-			goto update;
> 		}
> 
> 		return 0;
>-- 
>1.7.2.3
>

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