Attachment 35684 Details for Bug 27490 – dmesg output after cat /sys/.../drm/card0/card0-DVI-D-1/status

dmesg output after cat /sys/.../drm/card0/card0-DVI-D-1/status

dmesg.cat.vga1.status.cinerama (text/plain), 123.60 KB, created by grenouille on 2010-05-15 13:55:12 UTC

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Creator: grenouille

Created: 2010-05-15 13:55:12 UTC

Size: 123.60 KB

patch

obsolete

>>[  320.562625] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  320.562628] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  320.562630] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  320.562632] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  320.562634] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  320.562636] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  320.562638] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  320.562640] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  320.562642] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  320.562644] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  320.562646] 
>[  320.562647] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  320.673025] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  320.673027] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  320.673029] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  320.673031] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  320.673033] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  320.673035] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  320.673037] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  320.673040] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  320.673042] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  320.673044] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  320.673045] 
>[  320.673047] i915 0000:00:02.0: DVI-D-1: EDID invalid.
>[  320.680021] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  320.680036] [drm:drm_mode_getconnector], connector id 7:
>[  320.680041] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  320.680046] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  320.694284] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  320.694290] [drm:intel_sdvo_detect], SDVO response 1 0
>[  320.694293] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  320.808877] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  320.808879] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  320.808881] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  320.808883] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  320.808885] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  320.808888] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  320.808890] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  320.808892] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  320.808894] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  320.808896] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  320.808898] 
>[  320.808899] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  320.919271] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  320.919274] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  320.919276] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  320.919278] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  320.919280] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  320.919282] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  320.919284] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  320.919286] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  320.919288] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  320.919290] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  320.919292] 
>[  320.919293] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  321.029668] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  321.029670] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  321.029672] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  321.029674] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  321.029676] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  321.029678] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  321.029680] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  321.029682] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  321.029684] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  321.029686] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  321.029688] 
>[  321.029695] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  321.140059] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  321.140061] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  321.140064] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  321.140066] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  321.140068] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  321.140070] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  321.140072] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  321.140074] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  321.140077] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  321.140079] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  321.140080] 
>[  321.140082] i915 0000:00:02.0: DVI-D-1: EDID invalid.
>[  321.144531] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  321.144568] [drm:drm_mode_getconnector], connector id 9:
>[  321.144574] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  321.144583] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  321.157054] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  321.157060] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.157063] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  321.157066] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  321.180380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  321.180383] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  321.204517] [drm:intel_pipe_set_base], No FB bound
>[  321.204522] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.204527] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  321.204532] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  321.228560] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.228566] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  321.228571] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  321.300007] [drm:intel_tv_detect_type], No TV connection detected
>[  321.300013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  321.312482] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  321.312489] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.312491] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  321.336167] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  321.336182] [drm:drm_mode_getconnector], connector id 9:
>[  321.336193] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  321.336197] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  321.348668] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  321.348674] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.348676] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  321.348679] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  321.372380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  321.372383] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  321.396026] [drm:intel_pipe_set_base], No FB bound
>[  321.396031] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.396036] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  321.396041] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  321.420037] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.420043] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  321.420048] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  321.492008] [drm:intel_tv_detect_type], No TV connection detected
>[  321.492013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  321.504482] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  321.504489] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  321.504492] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  321.528172] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  321.528975] [drm:intel_crtc_cursor_set], 
>[  321.528978] [drm:intel_crtc_cursor_set], cursor off
>[  321.529123] [drm:drm_crtc_helper_set_config], 
>[  321.529126] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f54eaa80 connectors: f64e98a0 num_connectors: 1 (x, y) (0, 0)
>[  321.529133] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  321.539317] [drm:intel_pipe_set_base], Writing base 01EF0000 00000000 0 0
>[  321.539323] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  321.539326] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  321.560017] [drm:i8xx_disable_fbc], disabled FBC
>[  321.585116] [drm:intel_crtc_cursor_set], 
>[  321.585365] [drm:drm_crtc_helper_set_config], 
>[  321.585368] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f54eaa80 connectors: f64e98a0 num_connectors: 1 (x, y) (0, 0)
>[  321.585376] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  321.585379] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  321.585384] [drm:drm_mode_debug_printmodeline], Modeline 33:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  321.585389] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  321.585391] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  321.585394] [drm:drm_mode_debug_printmodeline], Modeline 33:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  321.585401] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  321.597873] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  321.597880] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  321.597883] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  321.620025] [drm:i8xx_disable_fbc], disabled FBC
>[  321.644372] [drm:intel_crtc_mode_set], Mode for pipe A:
>[  321.644375] [drm:drm_mode_debug_printmodeline], Modeline 33:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  321.670796] [drm:intel_pipe_set_base], Writing base 01EF0000 00000000 0 0
>[  321.670800] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  321.670802] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  321.692028] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  321.692033] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  321.692038] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  321.692043] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  321.692050] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  321.692055] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  321.692086] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  321.692090] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  321.692096] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  321.704576] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  321.704583] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  321.704585] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  321.732246] [drm:drm_mode_getconnector], connector id 5:
>[  321.732251] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  321.748947] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  321.748950] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  321.748955] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  321.748960] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  321.748964] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  321.748969] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  321.748976] [drm:drm_mode_getconnector], connector id 5:
>[  321.749748] [drm:drm_mode_getconnector], connector id 7:
>[  321.749752] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  321.749755] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  321.763989] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  321.763995] [drm:intel_sdvo_detect], SDVO response 1 0
>[  321.763999] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  321.874378] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  321.874382] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  321.874384] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  321.874387] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  321.874389] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  321.874391] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  321.874393] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  321.874395] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  321.874397] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  321.874399] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  321.874401] 
>[  321.874403] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  321.885851] i2c i2c-2: sendbytes: NAK bailout.
>[  321.892531] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  321.892548] [drm:drm_mode_getconnector], connector id 7:
>[  321.892554] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  321.892558] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  321.907921] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  321.907927] [drm:intel_sdvo_detect], SDVO response 1 0
>[  321.907929] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  321.928502] i2c i2c-2: readbytes: ack/nak timeout
>[  321.944023] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  321.944055] [drm:drm_mode_getconnector], connector id 9:
>[  321.944060] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  321.944070] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  322.125496] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.125503] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.125506] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  322.125509] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.148382] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  322.148384] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  322.172518] [drm:intel_pipe_set_base], No FB bound
>[  322.172523] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.172528] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  322.172533] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.196050] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.196055] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  322.196060] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.268018] [drm:intel_tv_detect_type], No TV connection detected
>[  322.268024] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  322.280493] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.280508] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.280511] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  322.304187] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  322.304202] [drm:drm_mode_getconnector], connector id 9:
>[  322.304212] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  322.304216] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  322.316683] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.316689] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.316691] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  322.316694] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.340380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  322.340383] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  322.364023] [drm:intel_pipe_set_base], No FB bound
>[  322.364028] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.364033] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  322.364038] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.388048] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.388053] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  322.388058] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.460007] [drm:intel_tv_detect_type], No TV connection detected
>[  322.460013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  322.472481] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.472488] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.472491] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  322.492178] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  322.492841] [drm:drm_crtc_helper_set_config], 
>[  322.492844] [drm:drm_crtc_helper_set_config], crtc: f6f9b000 4 fb: f54eaa80 connectors: f64e9888 num_connectors: 1 (x, y) (0, 0)
>[  322.492852] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  322.492854] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  322.492857] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  322.492861] [drm:drm_mode_debug_printmodeline], Modeline 36:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  322.492866] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  322.492868] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  322.492871] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  322.492873] [drm:drm_crtc_helper_set_config], setting connector 7 crtc to f6f9b000
>[  322.492876] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  322.492879] [drm:drm_mode_debug_printmodeline], Modeline 36:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  322.492884] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  322.505350] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.505357] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.505359] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  322.505362] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.528384] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  322.528387] [drm:drm_mode_debug_printmodeline], Modeline 36:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  322.552029] [drm:intel_pipe_set_base], Writing base 01EF0000 00000000 0 0
>[  322.552035] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  322.552040] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  322.576016] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  322.576021] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  322.576026] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.576031] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  322.576036] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.576042] [drm:intel_sdvo_debug_write], SDVOB: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
>[  322.594300] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.594306] [drm:intel_sdvo_debug_write], SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>[  322.606771] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.606777] [drm:intel_sdvo_debug_write], SDVOB: W: 16 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>[  322.636605] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.636611] [drm:intel_sdvo_debug_write], SDVOB: W: 17 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>[  322.666435] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.666441] [drm:intel_sdvo_debug_write], SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>[  322.676012] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.676017] [drm:intel_sdvo_debug_write], SDVOB: W: 14 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>[  322.705846] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.705852] [drm:intel_sdvo_debug_write], SDVOB: W: 15 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>[  322.735677] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.735683] [drm:intel_sdvo_debug_write], SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>[  322.745257] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.745264] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.745267] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  322.745269] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  322.745298] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  322.745301] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  322.792028] [drm:intel_sdvo_debug_write], SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>[  322.802496] [drm:intel_sdvo_debug_response], SDVOB: R: 01                      (Success)
>[  322.802502] [drm:intel_sdvo_debug_write], SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  322.814966] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.814973] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  322.827439] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  322.827446] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  322.827449] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  322.848418] [drm:intel_crtc_cursor_set], 
>[  322.852464] [drm:drm_mode_getconnector], connector id 5:
>[  322.852469] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  322.868978] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  322.868981] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  322.868986] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  322.868990] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  322.868995] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  322.868999] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  322.869006] [drm:drm_mode_getconnector], connector id 5:
>[  322.869782] [drm:drm_mode_getconnector], connector id 7:
>[  322.869786] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  322.869789] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  322.884022] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  322.884029] [drm:intel_sdvo_detect], SDVO response 1 0
>[  322.884032] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  322.994399] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  322.994402] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  322.994404] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  322.994407] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  322.994409] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  322.994411] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  322.994413] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  322.994415] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  322.994417] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  322.994419] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  322.994421] 
>[  322.994428] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  323.104795] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  323.104797] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  323.104799] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  323.104801] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  323.104804] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  323.104806] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  323.104808] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  323.104810] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  323.104812] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  323.104814] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  323.104816] 
>[  323.104817] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  323.215182] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  323.215185] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  323.215187] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  323.215189] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  323.215191] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  323.215193] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  323.215195] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  323.215197] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  323.215199] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  323.215201] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  323.215203] 
>[  323.215205] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  323.244027] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  323.244043] [drm:drm_mode_getconnector], connector id 7:
>[  323.244048] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  323.244052] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  323.258294] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  323.258300] [drm:intel_sdvo_detect], SDVO response 1 0
>[  323.258302] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  323.276502] i2c i2c-2: readbytes: ack/nak timeout
>[  323.292032] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  323.292064] [drm:drm_mode_getconnector], connector id 9:
>[  323.292070] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  323.292079] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  323.548542] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  323.548545] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Target not specified)
>[  323.548552] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.548554] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  323.548558] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  323.572355] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  323.572357] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  323.596023] [drm:intel_pipe_set_base], No FB bound
>[  323.596028] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.596033] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  323.596038] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  323.620048] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.620053] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  323.620059] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  323.692007] [drm:intel_tv_detect_type], No TV connection detected
>[  323.692013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  323.710199] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  323.710206] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.710208] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  323.732184] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  323.732198] [drm:drm_mode_getconnector], connector id 9:
>[  323.732209] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  323.732213] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  323.744680] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  323.744686] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.744689] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  323.744692] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  323.768380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  323.768383] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  323.792034] [drm:intel_pipe_set_base], No FB bound
>[  323.792038] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.792043] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  323.792048] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  323.816048] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.816053] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  323.816059] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  323.888018] [drm:intel_tv_detect_type], No TV connection detected
>[  323.888024] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  323.900493] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  323.900507] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.900511] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  323.924187] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  323.924965] [drm:intel_crtc_cursor_set], 
>[  323.924967] [drm:intel_crtc_cursor_set], cursor off
>[  323.924971] [drm:intel_crtc_cursor_set], 
>[  323.924973] [drm:intel_crtc_cursor_set], cursor off
>[  323.925122] [drm:drm_crtc_helper_set_config], 
>[  323.925124] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f54ea900 connectors: f64e99a8 num_connectors: 1 (x, y) (0, 0)
>[  323.925132] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  323.946580] [drm:intel_pipe_set_base], Writing base 026F0000 00000000 0 0
>[  323.946586] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  323.946589] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  323.968096] [drm:drm_crtc_helper_set_config], 
>[  323.968100] [drm:drm_crtc_helper_set_config], crtc: f6f9b000 4 fb: f54ea900 connectors: f64e99a8 num_connectors: 1 (x, y) (0, 0)
>[  323.968113] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  323.968118] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  323.968123] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  323.968131] [drm:drm_mode_debug_printmodeline], Modeline 39:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  323.968140] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  323.968144] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  323.968149] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  323.968154] [drm:drm_crtc_helper_set_config], setting connector 7 crtc to f6f9b000
>[  323.968159] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  323.968163] [drm:drm_mode_debug_printmodeline], Modeline 39:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  323.968174] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  323.980649] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  323.980656] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  323.980659] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  323.980662] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  324.004391] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  324.004394] [drm:drm_mode_debug_printmodeline], Modeline 39:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  324.028030] [drm:intel_pipe_set_base], Writing base 026F0000 00000000 0 0
>[  324.028037] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  324.028042] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  324.052023] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  324.052028] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  324.052033] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  324.052038] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  324.052043] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  324.052049] [drm:intel_sdvo_debug_write], SDVOB: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
>[  324.070353] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.070359] [drm:intel_sdvo_debug_write], SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>[  324.082824] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.082829] [drm:intel_sdvo_debug_write], SDVOB: W: 16 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>[  324.112659] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.112664] [drm:intel_sdvo_debug_write], SDVOB: W: 17 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>[  324.142490] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.142495] [drm:intel_sdvo_debug_write], SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>[  324.152072] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.152077] [drm:intel_sdvo_debug_write], SDVOB: W: 14 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>[  324.181925] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.181931] [drm:intel_sdvo_debug_write], SDVOB: W: 15 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>[  324.211757] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.211763] [drm:intel_sdvo_debug_write], SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>[  324.221338] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.221345] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  324.221348] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  324.221351] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  324.221380] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  324.221382] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  324.268019] [drm:intel_sdvo_debug_write], SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>[  324.278482] [drm:intel_sdvo_debug_response], SDVOB: R: 01                      (Success)
>[  324.278488] [drm:intel_sdvo_debug_write], SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  324.290955] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.290963] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  324.303428] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.303436] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  324.303439] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  324.324772] [drm:intel_crtc_cursor_set], 
>[  324.324777] [drm:intel_crtc_cursor_set], 
>[  324.325222] [drm:drm_crtc_helper_set_config], 
>[  324.325225] [drm:drm_crtc_helper_set_config], crtc: f6f9b000 4 fb: f54ea900 connectors: f5f728d8 num_connectors: 1 (x, y) (1280, 0)
>[  324.325233] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  324.325235] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  324.325238] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  324.325241] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  324.325243] [drm:drm_crtc_helper_set_config], setting connector 7 crtc to f6f9b000
>[  324.325246] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  324.325249] [drm:drm_mode_debug_printmodeline], Modeline 31:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  324.325255] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  324.337720] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.337727] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  324.337729] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  324.337733] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  324.360378] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  324.360381] [drm:drm_mode_debug_printmodeline], Modeline 31:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  324.389490] [drm:intel_pipe_set_base], Writing base 026F0000 00001400 1280 0
>[  324.389494] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  324.389497] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  324.412030] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  324.412035] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  324.412040] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  324.412045] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  324.412051] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  324.412057] [drm:intel_sdvo_debug_write], SDVOB: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
>[  324.430316] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.430323] [drm:intel_sdvo_debug_write], SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>[  324.442788] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.442793] [drm:intel_sdvo_debug_write], SDVOB: W: 16 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>[  324.472625] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.472631] [drm:intel_sdvo_debug_write], SDVOB: W: 17 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>[  324.502459] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.502465] [drm:intel_sdvo_debug_write], SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>[  324.512042] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.512048] [drm:intel_sdvo_debug_write], SDVOB: W: 14 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>[  324.541884] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.541890] [drm:intel_sdvo_debug_write], SDVOB: W: 15 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>[  324.571724] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.571730] [drm:intel_sdvo_debug_write], SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>[  324.581308] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.581315] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  324.581318] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  324.581320] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  324.581349] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  324.581352] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  324.628041] [drm:intel_sdvo_debug_write], SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>[  324.638505] [drm:intel_sdvo_debug_response], SDVOB: R: 01                      (Success)
>[  324.638511] [drm:intel_sdvo_debug_write], SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  324.651039] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.651047] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  324.663519] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  324.663527] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  324.663530] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  324.684420] [drm:intel_crtc_cursor_set], 
>[  324.684422] [drm:intel_crtc_cursor_set], cursor off
>[  324.687852] [drm:drm_mode_getconnector], connector id 5:
>[  324.687857] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  324.704446] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  324.704450] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  324.704455] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  324.704459] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  324.704464] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  324.704468] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  324.704475] [drm:drm_mode_getconnector], connector id 5:
>[  324.705240] [drm:drm_mode_getconnector], connector id 7:
>[  324.705243] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  324.705246] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  324.719481] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  324.719487] [drm:intel_sdvo_detect], SDVO response 1 0
>[  324.719490] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  324.829879] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  324.829882] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  324.829885] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  324.829888] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  324.829890] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  324.829892] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  324.829894] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  324.829896] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  324.829898] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  324.829900] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  324.829902] 
>[  324.829904] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  324.940274] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  324.940276] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  324.940278] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  324.940280] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  324.940282] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  324.940284] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  324.940286] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  324.940288] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  324.940290] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  324.940292] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  324.940294] 
>[  324.940296] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  324.972010] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  324.972025] [drm:drm_mode_getconnector], connector id 7:
>[  324.972030] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  324.972035] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  324.986275] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  324.986281] [drm:intel_sdvo_detect], SDVO response 1 0
>[  324.986284] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  325.004003] i2c i2c-2: readbytes: ack/nak timeout
>[  325.020032] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  325.020065] [drm:drm_mode_getconnector], connector id 9:
>[  325.020071] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  325.020080] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  325.276042] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  325.276045] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Target not specified)
>[  325.276051] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.276054] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  325.276057] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  325.300383] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  325.300386] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  325.324022] [drm:intel_pipe_set_base], No FB bound
>[  325.324027] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.324032] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  325.324037] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  325.348038] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.348044] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  325.348049] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  325.420007] [drm:intel_tv_detect_type], No TV connection detected
>[  325.420013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  325.501855] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  325.501862] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.501865] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  325.524178] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  325.524193] [drm:drm_mode_getconnector], connector id 9:
>[  325.524203] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  325.524208] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  325.536675] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  325.536681] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.536684] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  325.536687] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  325.560387] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  325.560389] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  325.584043] [drm:intel_pipe_set_base], No FB bound
>[  325.584047] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.584052] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  325.584057] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  325.608049] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.608054] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  325.608060] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  325.680017] [drm:intel_tv_detect_type], No TV connection detected
>[  325.680023] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  325.692500] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  325.692507] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  325.692509] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  325.716193] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  325.717529] [drm:drm_mode_getconnector], connector id 5:
>[  325.717533] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  325.736934] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  325.736937] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  325.736942] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  325.736946] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  325.736951] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  325.736955] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  325.736962] [drm:drm_mode_getconnector], connector id 5:
>[  325.737723] [drm:drm_mode_getconnector], connector id 7:
>[  325.737727] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  325.737729] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  325.752077] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  325.752084] [drm:intel_sdvo_detect], SDVO response 1 0
>[  325.752087] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  325.862494] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  325.862496] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  325.862499] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  325.862501] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  325.862503] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  325.862505] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  325.862507] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  325.862510] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  325.862512] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  325.862514] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  325.862515] 
>[  325.862582] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  325.880502] i2c i2c-2: readbytes: ack/nak timeout
>[  325.904027] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  325.904042] [drm:drm_mode_getconnector], connector id 7:
>[  325.904048] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  325.904052] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  326.032543] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  326.096542] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  326.160542] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  326.160545] [drm:intel_sdvo_debug_response], SDVOB: R: 00 00                   (Power on)
>[  326.160551] [drm:intel_sdvo_detect], SDVO response 0 0
>[  326.160554] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  326.288548] [drm:intel_sdvo_set_control_bus_switch], I2c transfer returned 250
>[  326.360032] [drm:drm_helper_probe_single_connector_modes], Probed modes for DVI-D-1
>[  326.360037] [drm:drm_mode_debug_printmodeline], Modeline 44:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  326.360045] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  326.360054] [drm:drm_mode_debug_printmodeline], Modeline 41:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  326.360062] [drm:drm_mode_debug_printmodeline], Modeline 43:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  326.360070] [drm:drm_mode_debug_printmodeline], Modeline 40:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  326.360087] [drm:drm_mode_getconnector], connector id 7:
>[  326.360092] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  326.360097] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  326.488542] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  326.526389] [drm:intel_sdvo_debug_response], SDVOB: R: 00 00                   (Success)
>[  326.526395] [drm:intel_sdvo_detect], SDVO response 0 0
>[  326.526398] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  326.526401] [drm:drm_mode_debug_printmodeline], Modeline 44:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  326.526405] [drm:drm_mode_prune_invalid], Not using 1024x768 mode -3
>[  326.526408] [drm:drm_mode_debug_printmodeline], Modeline 42:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  326.526413] [drm:drm_mode_prune_invalid], Not using 800x600 mode -3
>[  326.526415] [drm:drm_mode_debug_printmodeline], Modeline 41:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  326.526420] [drm:drm_mode_prune_invalid], Not using 800x600 mode -3
>[  326.526422] [drm:drm_mode_debug_printmodeline], Modeline 43:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  326.526426] [drm:drm_mode_prune_invalid], Not using 848x480 mode -3
>[  326.526429] [drm:drm_mode_debug_printmodeline], Modeline 40:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  326.526433] [drm:drm_mode_prune_invalid], Not using 640x480 mode -3
>[  326.526441] [drm:drm_mode_getconnector], connector id 7:
>[  326.526444] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  326.526446] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  326.540849] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  326.540855] [drm:intel_sdvo_detect], SDVO response 1 0
>[  326.540858] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  326.651223] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  326.651225] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  326.651227] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  326.651230] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  326.651232] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  326.651234] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  326.651236] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  326.651238] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  326.651240] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  326.651242] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  326.651244] 
>[  326.651246] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  326.761617] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  326.761619] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  326.761621] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  326.761623] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  326.761626] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  326.761628] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  326.761630] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  326.761632] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  326.761634] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  326.761636] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  326.761638] 
>[  326.761640] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  326.872006] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  326.872008] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  326.872010] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  326.872013] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  326.872015] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  326.872017] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  326.872019] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  326.872021] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  326.872023] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  326.872025] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  326.872027] 
>[  326.872029] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  326.982397] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  326.982399] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  326.982401] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  326.982403] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  326.982405] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  326.982407] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  326.982410] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  326.982412] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  326.982414] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  326.982416] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  326.982417] 
>[  326.982420] i915 0000:00:02.0: DVI-D-1: EDID invalid.
>[  326.988537] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  326.988591] [drm:drm_mode_getconnector], connector id 9:
>[  326.988597] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  326.988606] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  327.001079] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  327.001085] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.001088] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  327.001091] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  327.024381] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  327.024384] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  327.048033] [drm:intel_pipe_set_base], No FB bound
>[  327.048038] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.048043] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  327.048048] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  327.072048] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.072053] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  327.072058] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  327.144007] [drm:intel_tv_detect_type], No TV connection detected
>[  327.144013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  327.156482] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  327.156488] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.156491] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  327.180176] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  327.180208] [drm:drm_mode_getconnector], connector id 9:
>[  327.180211] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  327.180216] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  327.192683] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  327.192689] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.192691] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  327.192694] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  327.216386] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  327.216389] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  327.240034] [drm:intel_pipe_set_base], No FB bound
>[  327.240038] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.240043] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  327.240048] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  327.264047] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.264053] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  327.264058] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  327.336007] [drm:intel_tv_detect_type], No TV connection detected
>[  327.336013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  327.348482] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  327.348488] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  327.348491] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  327.368178] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  327.369226] [drm:drm_mode_getconnector], connector id 5:
>[  327.369229] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  327.380958] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  327.380961] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  327.380966] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  327.380971] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  327.380975] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  327.380980] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  327.380987] [drm:drm_mode_getconnector], connector id 5:
>[  327.381748] [drm:drm_mode_getconnector], connector id 7:
>[  327.381751] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  327.381754] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  327.396134] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  327.396140] [drm:intel_sdvo_detect], SDVO response 1 0
>[  327.396143] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  327.506509] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  327.506512] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  327.506514] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  327.506516] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  327.506518] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  327.506521] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  327.506523] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  327.506525] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  327.506527] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  327.506529] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  327.506531] 
>[  327.506532] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  327.616900] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  327.616902] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  327.616904] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  327.616906] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  327.616908] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  327.616910] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  327.616912] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  327.616915] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  327.616917] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  327.616919] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  327.616920] 
>[  327.616922] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  327.728139] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  327.728141] <3>df df df df df df df df df df df df df df df df  ................
>[  327.728143] <3>df df df df df df df df df df df df df df df df  ................
>[  327.728145] <3>df df df df df df df df df df df df df ff ff ff  ................
>[  327.728147] <3>ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
>[  327.728149] <3>ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
>[  327.728151] <3>ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
>[  327.728153] <3>ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
>[  327.728155] <3>ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff  ................
>[  327.728157] 
>[  327.728158] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  327.838527] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  327.838529] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  327.838531] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  327.838533] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  327.838536] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  327.838538] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  327.838540] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  327.838542] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  327.838544] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  327.838546] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  327.838548] 
>[  327.838549] i915 0000:00:02.0: DVI-D-1: EDID invalid.
>[  327.844531] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  327.844593] [drm:drm_mode_getconnector], connector id 7:
>[  327.844598] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  327.844603] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  327.858847] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  327.858853] [drm:intel_sdvo_detect], SDVO response 1 0
>[  327.858856] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  327.969221] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  327.969223] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  327.969225] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  327.969228] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  327.969230] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  327.969232] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  327.969234] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  327.969236] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  327.969238] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  327.969240] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  327.969242] 
>[  327.969243] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  328.079608] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  328.079610] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  328.079613] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  328.079615] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  328.079617] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  328.079619] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  328.079621] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  328.079623] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  328.079625] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  328.079627] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  328.079629] 
>[  328.079638] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  328.100035] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  328.100090] [drm:drm_mode_getconnector], connector id 9:
>[  328.100096] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  328.100105] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  328.112580] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  328.112586] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.112589] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.112592] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  328.136385] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  328.136387] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  328.160022] [drm:intel_pipe_set_base], No FB bound
>[  328.160027] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.160032] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.160037] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  328.184041] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.184047] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.184052] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  328.256008] [drm:intel_tv_detect_type], No TV connection detected
>[  328.256014] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  328.268508] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  328.268514] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.268517] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  328.292174] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  328.292211] [drm:drm_mode_getconnector], connector id 9:
>[  328.292214] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  328.292218] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  328.304685] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  328.304691] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.304694] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.304696] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  328.328386] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  328.328389] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  328.352032] [drm:intel_pipe_set_base], No FB bound
>[  328.352037] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.352042] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.352047] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  328.376039] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.376044] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.376049] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  328.448007] [drm:intel_tv_detect_type], No TV connection detected
>[  328.448013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  328.460485] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  328.460491] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.460494] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  328.484177] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  328.493047] [drm:drm_mode_getconnector], connector id 5:
>[  328.493053] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  328.504460] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  328.504464] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  328.504468] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  328.504473] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  328.504478] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  328.504482] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  328.504489] [drm:drm_mode_getconnector], connector id 5:
>[  328.505250] [drm:drm_mode_getconnector], connector id 7:
>[  328.505253] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  328.505256] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  328.519490] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  328.519496] [drm:intel_sdvo_detect], SDVO response 1 0
>[  328.519499] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  328.540002] i2c i2c-2: readbytes: ack/nak timeout
>[  328.556034] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  328.556050] [drm:drm_mode_getconnector], connector id 7:
>[  328.556055] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  328.556060] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  328.576330] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  328.576336] [drm:intel_sdvo_detect], SDVO response 1 0
>[  328.576339] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  328.686706] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  328.686708] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  328.686710] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  328.686713] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  328.686715] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  328.686717] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  328.686719] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  328.686721] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  328.686723] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  328.686725] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  328.686727] 
>[  328.686744] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  328.797123] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  328.797125] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  328.797127] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  328.797130] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  328.797132] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  328.797134] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  328.797136] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  328.797138] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  328.797140] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  328.797142] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  328.797144] 
>[  328.797145] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  328.907509] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  328.907511] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  328.907513] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  328.907515] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  328.907517] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  328.907519] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  328.907521] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  328.907523] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  328.907526] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  328.907528] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  328.907529] 
>[  328.907531] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  328.918980] i2c i2c-2: sendbytes: NAK bailout.
>[  328.932039] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  328.932072] [drm:drm_mode_getconnector], connector id 9:
>[  328.932078] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  328.932087] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  328.945683] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  328.945690] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.945693] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.945696] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  328.968392] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  328.968394] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  328.992030] [drm:intel_pipe_set_base], No FB bound
>[  328.992035] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  328.992040] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  328.992045] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  329.016071] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  329.016077] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  329.016082] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  329.088008] [drm:intel_tv_detect_type], No TV connection detected
>[  329.088014] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  329.100485] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  329.100492] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  329.100495] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  329.124183] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  329.124198] [drm:drm_mode_getconnector], connector id 9:
>[  329.124208] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  329.124213] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  329.136679] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  329.136685] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  329.136688] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  329.136691] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  329.160380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  329.160382] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  329.184019] [drm:intel_pipe_set_base], No FB bound
>[  329.184023] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  329.184028] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  329.184034] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  329.208049] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  329.208054] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  329.208059] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  329.280011] [drm:intel_tv_detect_type], No TV connection detected
>[  329.280017] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  329.292488] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  329.292494] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  329.292497] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  329.316188] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  329.316313] [drm:drm_mode_getconnector], connector id 5:
>[  329.316316] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  329.336451] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  329.336454] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  329.336459] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  329.336463] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  329.336468] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  329.336472] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  329.336482] [drm:drm_mode_getconnector], connector id 5:
>[  329.337231] [drm:drm_mode_getconnector], connector id 7:
>[  329.337234] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  329.337237] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  329.351661] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  329.351667] [drm:intel_sdvo_detect], SDVO response 1 0
>[  329.351670] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  329.463634] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  329.463636] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  329.463639] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  329.463641] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  329.463643] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  329.463645] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  329.463648] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  329.463650] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  329.463652] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  329.463654] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  329.463656] 
>[  329.463666] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  329.574035] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  329.574038] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  329.574040] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  329.574043] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  329.574045] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  329.574047] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  329.574049] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  329.574051] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  329.574053] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  329.574055] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  329.574057] 
>[  329.574059] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  329.684422] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  329.684425] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  329.684427] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  329.684429] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  329.684431] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  329.684433] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  329.684435] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  329.684437] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  329.684439] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  329.684441] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  329.684443] 
>[  329.684444] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  329.704025] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  329.704044] [drm:drm_mode_getconnector], connector id 7:
>[  329.704050] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  329.704054] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  329.718294] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  329.718300] [drm:intel_sdvo_detect], SDVO response 1 0
>[  329.718303] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  329.736502] i2c i2c-2: readbytes: ack/nak timeout
>[  329.760035] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  329.760076] [drm:drm_mode_getconnector], connector id 9:
>[  329.760082] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  329.760091] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  330.016542] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  330.016545] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Target not specified)
>[  330.016551] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.016554] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.016557] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.040392] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  330.040394] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  330.064034] [drm:intel_pipe_set_base], No FB bound
>[  330.064039] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.064044] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.064049] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.088037] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.088043] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.088048] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.160007] [drm:intel_tv_detect_type], No TV connection detected
>[  330.160013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  330.172482] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  330.172489] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.172492] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  330.196165] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  330.196180] [drm:drm_mode_getconnector], connector id 9:
>[  330.196191] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  330.196195] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  330.208662] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  330.208668] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.208671] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.208674] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.232381] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  330.232383] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  330.256043] [drm:intel_pipe_set_base], No FB bound
>[  330.256047] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.256052] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.256057] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.280047] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.280053] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.280058] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.352007] [drm:intel_tv_detect_type], No TV connection detected
>[  330.352013] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  330.364482] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  330.364488] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.364491] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  330.388669] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  330.389444] [drm:drm_mode_getconnector], connector id 5:
>[  330.389448] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  330.408944] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  330.408948] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  330.408952] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  330.408957] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  330.408961] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  330.408966] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  330.408972] [drm:drm_mode_getconnector], connector id 5:
>[  330.409734] [drm:drm_mode_getconnector], connector id 7:
>[  330.409738] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  330.409740] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  330.423980] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  330.423986] [drm:intel_sdvo_detect], SDVO response 1 0
>[  330.423989] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  330.452038] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  330.452052] [drm:drm_mode_getconnector], connector id 7:
>[  330.452057] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  330.452062] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  330.466301] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  330.466307] [drm:intel_sdvo_detect], SDVO response 1 0
>[  330.466310] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  330.484502] i2c i2c-2: readbytes: ack/nak timeout
>[  330.508517] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  330.508547] [drm:drm_mode_getconnector], connector id 9:
>[  330.508553] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  330.508561] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  330.764542] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  330.764544] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Target not specified)
>[  330.764551] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.764554] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.764557] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.788381] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  330.788384] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  330.812024] [drm:intel_pipe_set_base], No FB bound
>[  330.812028] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.812033] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.812039] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.836037] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.836042] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.836048] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.908018] [drm:intel_tv_detect_type], No TV connection detected
>[  330.908024] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  330.920492] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  330.920507] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.920511] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  330.944176] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  330.944191] [drm:drm_mode_getconnector], connector id 9:
>[  330.944201] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  330.944205] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  330.956672] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  330.956678] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  330.956681] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  330.956684] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  330.980380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  330.980383] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  331.004527] [drm:intel_pipe_set_base], No FB bound
>[  331.004532] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  331.004537] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  331.004542] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  331.028060] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  331.028065] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  331.028070] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  331.100018] [drm:intel_tv_detect_type], No TV connection detected
>[  331.100023] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  331.112492] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  331.112507] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  331.112510] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  331.136187] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  341.240998] [drm:intel_crtc_cursor_set], 
>[  341.241003] [drm:intel_crtc_cursor_set], cursor off
>[  341.337052] [drm:drm_crtc_helper_set_config], 
>[  341.337055] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f66aaf00 connectors: f6f3be90 num_connectors: 1 (x, y) (0, 0)
>[  341.337063] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  341.337065] [drm:drm_mode_debug_printmodeline], Modeline 33:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  341.337069] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  341.337074] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  341.337076] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  341.337078] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  341.337086] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  341.349552] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  341.349557] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  341.349560] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  341.372043] [drm:i8xx_disable_fbc], disabled FBC
>[  341.396371] [drm:intel_crtc_mode_set], Mode for pipe A:
>[  341.396373] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  341.420018] [drm:intel_pipe_set_base], Writing base 007F0000 00000000 0 0
>[  341.420024] [drm:intel_update_fbc], framebuffer not tiled, disabling compression
>[  341.420027] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  341.444018] [drm:intel_update_fbc], framebuffer not tiled, disabling compression
>[  341.444022] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  341.444026] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  341.444030] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  341.444036] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  341.444040] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  341.444070] [drm:intel_update_fbc], framebuffer not tiled, disabling compression
>[  341.444074] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  341.444079] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  341.456547] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  341.456552] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  341.456554] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  341.480197] [drm:drm_crtc_helper_set_config], 
>[  341.480200] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f66aaf00 connectors: f6f3be90 num_connectors: 1 (x, y) (0, 0)
>[  341.480214] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  346.959044] [drm:drm_crtc_helper_set_config], 
>[  346.959049] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f54ea900 connectors: f5f72938 num_connectors: 1 (x, y) (0, 0)
>[  346.959061] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  346.959064] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  346.959069] [drm:drm_mode_debug_printmodeline], Modeline 40:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  346.959073] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  346.959076] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  346.959079] [drm:drm_mode_debug_printmodeline], Modeline 40:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  346.959087] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  346.971605] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  346.971613] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  346.971616] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  346.996008] [drm:i8xx_disable_fbc], disabled FBC
>[  347.020383] [drm:intel_crtc_mode_set], Mode for pipe A:
>[  347.020387] [drm:drm_mode_debug_printmodeline], Modeline 40:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  347.047619] [drm:intel_pipe_set_base], Writing base 026F0000 00000000 0 0
>[  347.047627] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  347.047631] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  347.068024] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  347.068029] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  347.068034] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  347.068039] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  347.068046] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  347.068051] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  347.068082] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  347.068086] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  347.068095] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  347.080605] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.080612] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  347.080615] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  347.104250] [drm:drm_crtc_helper_set_config], 
>[  347.104252] [drm:drm_crtc_helper_set_config], crtc: f6f9b000 4 fb: f54ea900 connectors: f5f72938 num_connectors: 1 (x, y) (1280, 0)
>[  347.104259] [drm:drm_crtc_helper_set_config], crtc has no fb, full mode set
>[  347.104262] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  347.104264] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  347.104269] [drm:drm_mode_debug_printmodeline], Modeline 41:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  347.104273] [drm:drm_crtc_helper_set_config], encoder changed, full mode switch
>[  347.104276] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  347.104278] [drm:drm_crtc_helper_set_config], crtc changed, full mode switch
>[  347.104281] [drm:drm_crtc_helper_set_config], setting connector 7 crtc to f6f9b000
>[  347.104284] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  347.104286] [drm:drm_mode_debug_printmodeline], Modeline 41:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  347.104292] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  347.116768] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.116775] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  347.116777] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  347.116780] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  347.140380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  347.140383] [drm:drm_mode_debug_printmodeline], Modeline 41:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  347.164018] [drm:intel_pipe_set_base], Writing base 026F0000 00001400 1280 0
>[  347.164025] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  347.164030] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  347.188028] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  347.188033] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  347.188037] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  347.188042] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  347.188048] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  347.188054] [drm:intel_sdvo_debug_write], SDVOB: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
>[  347.206333] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.206340] [drm:intel_sdvo_debug_write], SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>[  347.218898] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.218904] [drm:intel_sdvo_debug_write], SDVOB: W: 16 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>[  347.248831] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.248837] [drm:intel_sdvo_debug_write], SDVOB: W: 17 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>[  347.278662] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.278668] [drm:intel_sdvo_debug_write], SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>[  347.288243] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.288248] [drm:intel_sdvo_debug_write], SDVOB: W: 14 BC 34 00 98 51 00 2A 40 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>[  347.318081] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.318087] [drm:intel_sdvo_debug_write], SDVOB: W: 15 10 90 13 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>[  347.347918] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.347923] [drm:intel_sdvo_debug_write], SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>[  347.357497] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.357504] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  347.357507] [drm:intel_update_watermarks], plane B (pipe 1) clock: 135000
>[  347.357510] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  347.357539] [drm:intel_update_fbc], framebuffer too large, disabling compression
>[  347.357541] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  347.404039] [drm:intel_sdvo_debug_write], SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>[  347.414504] [drm:intel_sdvo_debug_response], SDVOB: R: 01                      (Success)
>[  347.414510] [drm:intel_sdvo_debug_write], SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  347.426975] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.426982] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  347.439446] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  347.439454] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  347.439457] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  347.460208] [drm:drm_mode_getconnector], connector id 5:
>[  347.460212] [drm:drm_helper_probe_single_connector_modes], VGA-1
>[  347.472446] [drm:drm_helper_probe_single_connector_modes], Probed modes for VGA-1
>[  347.472449] [drm:drm_mode_debug_printmodeline], Modeline 28:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  347.472454] [drm:drm_mode_debug_printmodeline], Modeline 26:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[  347.472459] [drm:drm_mode_debug_printmodeline], Modeline 25:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[  347.472463] [drm:drm_mode_debug_printmodeline], Modeline 27:"848x480" 60 33750 848 864 976 1088 480 486 494 517 0x40 0x5
>[  347.472467] [drm:drm_mode_debug_printmodeline], Modeline 24:"640x480" 60 25175 640 656 752 800 480 489 492 525 0x40 0xa
>[  347.472474] [drm:drm_mode_getconnector], connector id 5:
>[  347.473257] [drm:drm_mode_getconnector], connector id 7:
>[  347.473261] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  347.473263] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  347.487498] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  347.487504] [drm:intel_sdvo_detect], SDVO response 1 0
>[  347.487507] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  347.597877] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  347.597880] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  347.597883] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  347.597885] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  347.597887] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  347.597889] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  347.597891] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  347.597894] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  347.597896] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  347.597898] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  347.597899] 
>[  347.597901] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  347.708286] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  347.708288] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  347.708290] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  347.708292] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  347.708294] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  347.708296] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  347.708299] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  347.708301] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  347.708303] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  347.708305] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  347.708306] 
>[  347.708308] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  347.732034] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  347.732042] [drm:drm_mode_getconnector], connector id 7:
>[  347.732047] [drm:drm_helper_probe_single_connector_modes], DVI-D-1
>[  347.732052] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  347.746297] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  347.746302] [drm:intel_sdvo_detect], SDVO response 1 0
>[  347.746305] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  347.764002] i2c i2c-2: readbytes: ack/nak timeout
>[  347.788027] [drm:drm_helper_probe_single_connector_modes], DVI-D-1 is disconnected
>[  347.788053] [drm:drm_mode_getconnector], connector id 9:
>[  347.788059] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  347.788067] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  348.044042] [drm:intel_sdvo_read_byte], i2c transfer returned -6
>[  348.044045] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Target not specified)
>[  348.044051] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.044054] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  348.044056] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  348.068401] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  348.068404] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  348.092032] [drm:intel_pipe_set_base], No FB bound
>[  348.092037] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.092042] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  348.092047] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  348.116051] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.116056] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  348.116061] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  348.188015] [drm:intel_tv_detect_type], No TV connection detected
>[  348.188021] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  348.200493] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  348.200500] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.200503] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  348.224183] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  348.224192] [drm:drm_mode_getconnector], connector id 9:
>[  348.224197] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1
>[  348.224209] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  348.236678] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  348.236684] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.236687] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  348.236690] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  348.260380] [drm:intel_crtc_mode_set], Mode for pipe B:
>[  348.260382] [drm:drm_mode_debug_printmodeline], Modeline 0:"NTSC 480i" 0 107520 1280 1368 1496 1712 1024 1027 1034 1104 0x40 0x0
>[  348.284032] [drm:intel_pipe_set_base], No FB bound
>[  348.284037] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.284042] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  348.284047] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  348.308049] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.308054] [drm:intel_update_watermarks], plane B (pipe 1) clock: 107520
>[  348.308059] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 1
>[  348.380009] [drm:intel_tv_detect_type], No TV connection detected
>[  348.380015] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  348.392486] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  348.392493] [drm:intel_update_watermarks], plane A (pipe 0) clock: 135000
>[  348.392496] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 21
>[  348.416193] [drm:drm_helper_probe_single_connector_modes], SVIDEO-1 is disconnected
>[  348.416774] [drm:intel_crtc_cursor_set], 
>[  428.833415] [drm:intel_crtc_cursor_set], 
>[  428.833420] [drm:intel_crtc_cursor_set], cursor off
>[  428.927636] [drm:drm_crtc_helper_set_config], 
>[  428.927638] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f66aaf00 connectors: f6f3be90 num_connectors: 1 (x, y) (0, 0)
>[  428.927647] [drm:drm_crtc_helper_set_config], modes are different, full mode set
>[  428.927650] [drm:drm_mode_debug_printmodeline], Modeline 40:"" 0 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x0 0x5
>[  428.927654] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  428.927658] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  428.927661] [drm:drm_crtc_helper_set_config], attempting to set mode from userspace
>[  428.927663] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  428.927672] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  428.940148] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  428.940154] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  428.940156] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  428.964018] [drm:i8xx_disable_fbc], disabled FBC
>[  428.988371] [drm:intel_crtc_mode_set], Mode for pipe A:
>[  428.988373] [drm:drm_mode_debug_printmodeline], Modeline 30:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[  429.012017] [drm:intel_pipe_set_base], Writing base 007F0000 00000000 0 0
>[  429.012023] [drm:intel_update_fbc], framebuffer not tiled, disabling compression
>[  429.012027] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  429.038970] [drm:intel_update_fbc], framebuffer not tiled, disabling compression
>[  429.038975] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  429.038979] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  429.038984] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  429.038990] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  429.038994] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  429.039025] [drm:intel_update_fbc], framebuffer not tiled, disabling compression
>[  429.039028] [drm:intel_update_fbc], unsupported config, disabling FBC
>[  429.039035] [drm:intel_sdvo_debug_write], SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>[  429.051506] [drm:intel_sdvo_debug_response], SDVOB: R:                         (Success)
>[  429.051511] [drm:intel_update_watermarks], plane A (pipe 0) clock: 65000
>[  429.051513] [drm:i965_update_wm], Setting FIFO watermarks - A: 8, B: 8, C: 8, SR 12
>[  429.072180] [drm:drm_crtc_helper_set_config], 
>[  429.072189] [drm:drm_crtc_helper_set_config], crtc: f6f9a000 3 fb: f66aaf00 connectors: f6f3be90 num_connectors: 1 (x, y) (0, 0)
>[  429.072195] [drm:drm_crtc_helper_set_config], setting connector 5 crtc to f6f9a000
>[  578.349334] [drm:intel_sdvo_debug_write], SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>[  578.363577] [drm:intel_sdvo_debug_response], SDVOB: R: 01 00                   (Success)
>[  578.363583] [drm:intel_sdvo_detect], SDVO response 1 0
>[  578.363587] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  578.474032] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  578.475750] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  578.477482] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  578.477485] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  578.477488] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  578.477490] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  578.477493] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  578.477496] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  578.477498] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  578.477501] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  578.477503] 
>[  578.477606] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  578.588023] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  578.589736] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  578.591447] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  578.591449] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  578.591451] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  578.591454] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  578.591456] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  578.591458] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  578.591460] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  578.591462] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  578.591464] 
>[  578.591466] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  578.701890] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  578.703604] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  578.705306] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  578.705309] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  578.705312] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  578.705314] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  578.705317] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  578.705319] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  578.705322] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  578.705325] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  578.705327] 
>[  578.705329] [drm:intel_sdvo_debug_write], SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>[  578.815747] [drm:edid_is_valid] *ERROR* EDID checksum is invalid, remainder is 205
>[  578.817460] [drm:edid_is_valid] *ERROR* Raw EDID:
>[  578.819121] <3>00 ff ff ff ff ff ff 00 06 00 0c 02 80 00 00 00  ................
>[  578.819123] <3>01 0d 01 03 00 22 1b 78 2a 09 00 a0 57 4a 9c 25  .....".x*...WJ.%
>[  578.819126] <3>10 50 54 00 00 00 81 00 01 01 01 01 01 01 01 01  .PT.............
>[  578.819128] <3>01 01 01 01 01 01 3c 24 00 80 40 00 0a 40 10 00  ......<$..@..@..
>[  578.819130] <3>12 00 10 0e 11 00 00 1a 00 00 00 fc 00 00 21 20  ..............! 
>[  578.819132] <3>21 24 41 20 00 20 30 30 20 21 00 00 00 fc 00 31  !$A . 00 !.....1
>[  578.819134] <3>0a 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  ................
>[  578.819136] <3>00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 50  ...............P
>[  578.819138] 
>[  578.819140] i915 0000:00:02.0: DVI-D-1: EDID invalid.

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Attachments on bug 27490: 35143 | 35144 | 35505 | 35683 | 35684

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