Attachment 34434 Details for Bug 27284 – flush command stream if bo domain changes

[patch] flush command stream if bo domain changes

0001-r6xx-EXA-Xv-flush-command-stream-if-bo-domain-chan.patch (text/plain), 2.09 KB, created by Alex Deucher on 2010-03-25 08:38:26 UTC

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Creator: Alex Deucher

Created: 2010-03-25 08:38:26 UTC

Size: 2.09 KB

patch

obsolete

>From 91f29a9e31327cea68c8507b4b423b7e0225302c Mon Sep 17 00:00:00 2001
>From: Alex Deucher <alexdeucher@gmail.com>
>Date: Thu, 25 Mar 2010 11:34:57 -0400
>Subject: [PATCH] r6xx+ EXA/Xv: flush command stream if bo domain changes
>
>bo domain can't change within a command stream.  if the
>bo domain changes, flush the stream.
>
>May fix fdo bug 27284
>---
> src/r600_exa.c |   36 ++++++++++++++++++++++++++++++++++++
> 1 files changed, 36 insertions(+), 0 deletions(-)
>
>diff --git a/src/r600_exa.c b/src/r600_exa.c
>index 0ebc6f4..35794e8 100644
>--- a/src/r600_exa.c
>+++ b/src/r600_exa.c
>@@ -185,6 +185,7 @@ R600SetAccelState(ScrnInfoPtr pScrn,
> {
>     RADEONInfoPtr info = RADEONPTR(pScrn);
>     struct radeon_accel_state *accel_state = info->accel_state;
>+    Bool flushed = FALSE;
>     int ret;
> 
>     accel_state->src_size[0] = src_pitch0 * src_height0 * (src_bpp0/8);
>@@ -246,6 +247,41 @@ R600SetAccelState(ScrnInfoPtr pScrn,
> 	accel_state->vs_mc_addr = vs_offset;
> 	accel_state->ps_mc_addr = ps_offset;
> 
>+	/* check if the domain has changed and flush if necessary */
>+	if (accel_state->src_bo[0]) {
>+	    if (radeon_bo_is_referenced_by_cs(accel_state->src_bo[0], info->cs)) {
>+		if (radeon_bo_get_src_domain(accel_state->src_bo[0]) !=
>+		    accel_state->src_domain[0]) {
>+		    if (!flushed) {
>+			radeon_cs_flush_indirect(pScrn);
>+			flushed = TRUE;
>+		    }
>+		}
>+	    }
>+	}
>+	if (accel_state->src_bo[1]) {
>+	    if (radeon_bo_is_referenced_by_cs(accel_state->src_bo[1], info->cs)) {
>+		if (radeon_bo_get_src_domain(accel_state->src_bo[1]) !=
>+		    accel_state->src_domain[0]) {
>+		    if (!flushed) {
>+			radeon_cs_flush_indirect(pScrn);
>+			flushed = TRUE;
>+		    }
>+		}
>+	    }
>+	}
>+	if (accel_state->dst_bo) {
>+	    if (radeon_bo_is_referenced_by_cs(accel_state->dst_bo, info->cs)) {
>+		if (radeon_bo_get_src_domain(accel_state->dst_bo) !=
>+		    accel_state->dst_domain) {
>+		    if (!flushed) {
>+			radeon_cs_flush_indirect(pScrn);
>+			flushed = TRUE;
>+		    }
>+		}
>+	    }
>+	}
>+
> 	radeon_cs_space_reset_bos(info->cs);
> 	radeon_cs_space_add_persistent_bo(info->cs, accel_state->shaders_bo,
> 					  RADEON_GEM_DOMAIN_VRAM, 0);
>-- 
>1.5.6.3
>

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Attachments on bug 27284: 34394 | 34395 | 34396 | 34397 | 34414 | 34424 | 34425 | 34434 | 34449 | 34450 | 34470 | 34512 | 35012 | 35013

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