Attachment 29373 Details for Bug 23713 – Xorg.0.log with "modedebug" "true"

Xorg.0.log with "modedebug" "true"

Xorg.0.log (text/plain), 76.14 KB, created by asergiu on 2009-09-10 02:47:36 UTC

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Creator: asergiu

Created: 2009-09-10 02:47:36 UTC

Size: 76.14 KB

patch

obsolete

>_XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6
>_XSERVTransOpen: transport open failed for inet6/new:0
>_XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6
>
>X.Org X Server 1.5.2
>Release Date: 10 October 2008
>X Protocol Version 11, Revision 0
>Build Operating System: openSUSE SUSE LINUX
>Current Operating System: Linux new 2.6.27.29-0.1-pae #1 SMP 2009-08-15 17:53:59 +0200 i686
>Build Date: 02 July 2009  08:02:13AM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/var/log/Xorg.0.log", Time: Thu Sep 10 04:16:50 2009
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Layout[all]"
>(**) |-->Screen "Screen[0]" (0)
>(**) |   |-->Monitor "Monitor[0]"
>(**) |   |-->Device "Device[0]"
>(**) |-->Input Device "Keyboard[0]"
>(**) |-->Input Device "Mouse[1]"
>(**) Option "ZapWarning" "on"
>(**) Option "AllowMouseOpenFail" "on"
>(**) Option "Xinerama" "off"
>(**) Option "AIGLX" "on"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(WW) The directory "/usr/share/fonts/local" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/PEX" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/latin2/misc" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/latin2/75dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/latin2/100dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/latin2/Type1" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/latin7/75dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/baekmuk" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/japanese" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/kwintv" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/uni" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/CID" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/ucs/misc" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/ucs/75dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/ucs/100dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/hellas/misc" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/hellas/75dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/hellas/100dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/hellas/Type1" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/misc/sgi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/fonts/xtest" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/opt/kde3/share/fonts" does not exist.
>	Entry deleted from font path.
>(==) Including the default font path /usr/share/fonts/misc:unscaled,/usr/share/fonts/TTF/,/usr/share/fonts/OTF,/usr/share/fonts/Type1/,/usr/share/fonts/100dpi:unscaled,/usr/share/fonts/75dpi:unscaled.
>(**) FontPath set to:
>	/usr/share/fonts/misc:unscaled,
>	/usr/share/fonts/75dpi:unscaled,
>	/usr/share/fonts/100dpi:unscaled,
>	/usr/share/fonts/Type1,
>	/usr/share/fonts/URW,
>	/usr/share/fonts/Speedo,
>	/usr/share/fonts/cyrillic,
>	/usr/share/fonts/truetype,
>	/usr/share/fonts/misc:unscaled,
>	/usr/share/fonts/TTF/,
>	/usr/share/fonts/OTF,
>	/usr/share/fonts/Type1/,
>	/usr/share/fonts/100dpi:unscaled,
>	/usr/share/fonts/75dpi:unscaled
>(**) Input device list set to "/dev/gpmdata,/dev/input/mice"
>(==) ModulePath set to "/usr/lib/xorg/modules/updates,/usr/lib/xorg/modules"
>(**) Extension "Composite" is enabled
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81f95c0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.4
>	X.Org Video Driver: 4.1
>	X.Org XInput driver : 2.1
>	X.Org Server Extension : 1.1
>	X.Org Font Renderer : 0.6
>(II) Loader running on linux
>(--) using VT number 7
>
>(--) PCI:*(0@0:2:0) unknown vendor (0x8086) unknown chipset (0x29c2) rev 16, Mem @ 0xfe980000/0, 0xd0000000/0, 0xfe800000/0, I/O @ 0x0000cc00/0
>(--) PCI: (0@0:2:1) unknown vendor (0x8086) unknown chipset (0x29c3) rev 16, Mem @ 0xfe780000/0
>(II) System resource ranges:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "freetype" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded by default.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) LoadModule: "dri"
>
>(II) Loading /usr/lib/xorg/modules//extensions/libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "dbe"
>
>(II) Loading /usr/lib/xorg/modules//extensions/libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "freetype"
>
>(II) Loading /usr/lib/xorg/modules//fonts/libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.5.2, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.6
>(II) Loading font FreeType
>(II) LoadModule: "extmod"
>
>(II) Loading /usr/lib/xorg/modules//extensions/libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "glx"
>
>(II) Loading /usr/lib/xorg/modules//extensions/libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 1.1
>(**) AIGLX enabled
>(**) Exporting typical set of GLX visuals
>(II) Loading extension GLX
>(II) LoadModule: "record"
>
>(II) Loading /usr/lib/xorg/modules//extensions/librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 1.1
>(II) Loading extension RECORD
>(II) LoadModule: "intel"
>
>(II) Loading /usr/lib/xorg/modules//drivers/intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 2.5.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 4.1
>(II) LoadModule: "kbd"
>
>(II) Loading /usr/lib/xorg/modules//input/kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.3.1
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.1
>(II) LoadModule: "mouse"
>
>(II) Loading /usr/lib/xorg/modules//input/mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.3.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.1
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33,
>	Mobile IntelÂ® GM45 Express Chipset,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43, G41
>(II) Primary Device is: PCI 00@00:02:0
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>(II) resource ranges after probing:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>
>(II) Loading /usr/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 4.1
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "ModeDebug" "true"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) G33
>(--) intel(0): Chipset: "G33"
>(--) intel(0): Linear framebuffer at 0xD0000000
>(--) intel(0): IO registers at addr 0xFE980000
>(WW) intel(0): libpciaccess reported 0 rom size, guessing 64kB
>(==) intel(0): Using EXA for acceleration
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x80300080 (enabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x80300080 (enabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0x94000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000640 (1600 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x0257031f (800, 600)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x031f0257 (800, 600)
>(II) intel(0):            PIPEASTAT: 0x00020203 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):                 FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4020033 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x041f031f (800 active, 1056 total)
>(II) intel(0):             HBLANK_A: 0x041f031f (800 start, 1056 end)
>(II) intel(0):              HSYNC_A: 0x03c70347 (840 start, 968 end)
>(II) intel(0):             VTOTAL_A: 0x02730257 (600 active, 628 total)
>(II) intel(0):             VBLANK_A: 0x02730257 (600 start, 628 end)
>(II) intel(0):              VSYNC_A: 0x025c0258 (601 start, 605 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00020000 (status: VBLANK_INT_ENABLE)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8124008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 160000 n 1 m1 16 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"
>(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"
>(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor[0]
>(**) intel(0): Option "PreferredMode" "800x600"
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVOB: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVOB: R: 02 3C 06 01 01 01 01 00 (Success)
>(II) intel(0): SDVOB: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
>(II) intel(0): SDVOB: R: 00 00                   (Not supported)
>(II) intel(0): Output TMDS-1 has no monitor section
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVOB: R: C4 09 20 4E             (Success)
>(II) intel(0): SDVOB: device VID/DID: 02:3C.06, clock range 25.0MHz - 200.0MHz
>(II) intel(0): SDVOB: 1 input channel
>(II) intel(0): SDVOB: TMDS0 output reported
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): I2C bus "SDVOC DDC Bus" initialized.
>(II) intel(0): SDVOC: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVOC: R: 02 47 02 01 01 01 01 00 (Success)
>(II) intel(0): SDVOC: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
>(II) intel(0): SDVOC: R: 10 12                   (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 9E                         (SDVO_CMD_GET_ENCODE)
>(II) intel(0): SDVOC: R: 00                      (Success)
>(II) intel(0): Output TMDS-2 has no monitor section
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVOC: R: C4 09 74 40             (Success)
>(II) intel(0): SDVOC: device VID/DID: 02:47.02, clock range 25.0MHz - 165.0MHz
>(II) intel(0): SDVOC: 1 input channel
>(II) intel(0): SDVOC: TMDS0 output reported
>(II) intel(0): Output VGA using monitor section Monitor[0]
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R: 01 00                   (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVOC: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R: 00 00                   (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "CRTDDC_A:ddc2" removed.
>(II) intel(0): I2C bus "CRTDDC_A" removed.
>(II) intel(0): I2C bus "CRTDDC_D" initialized.
>(II) intel(0): I2C device "CRTDDC_D:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "CRTDDC_D:ddc2" removed.
>(II) intel(0): I2C bus "CRTDDC_D" removed.
>(II) intel(0): I2C bus "CRTDDC_E" initialized.
>(II) intel(0): I2C device "CRTDDC_E:ddc2" registered at address 0xA0.
>(II) intel(0): I2C device "CRTDDC_E:ddc2" removed.
>(II) intel(0): I2C bus "CRTDDC_E" removed.
>(II) intel(0): EDID for output VGA
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (hsync out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output VGA
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x60.0   38.22  800 832 912 1024  600 601 604 622 (37.3 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVOB: R: 01 00                   (Success)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0.
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Manufacturer: MSI  Model: 6462  Serial#: 64627404
>(II) intel(0): Year: 2007  Week: 35
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Digital Display Input
>(II) intel(0): DFP 1.x compatible TMDS
>(II) intel(0): Max Image Size [cm]: horiz.: 37  vert.: 30
>(II) intel(0): Gamma: 2.64
>(II) intel(0): DPMS capabilities: StandBy Suspend Off
>(II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 
>(II) intel(0): First detailed timing not preferred mode in violation of standard!
>(II) intel(0): redX: 0.632 redY: 0.335   greenX: 0.295 greenY: 0.593
>(II) intel(0): blueX: 0.143 blueY: 0.065   whiteX: 0.282 whiteY: 0.297
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 720x400@70Hz
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 640x480@72Hz
>(II) intel(0): 640x480@75Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 800x600@75Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): 1024x768@70Hz
>(II) intel(0): 1024x768@75Hz
>(II) intel(0): 1280x1024@75Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported Future Video Modes:
>(II) intel(0): #0: hsize: 1280  vsize 960  refresh: 75  vid: 20353
>(II) intel(0): #1: hsize: 1024  vsize 768  refresh: 75  vid: 20321
>(II) intel(0): #2: hsize: 800  vsize 600  refresh: 75  vid: 20293
>(II) intel(0): #3: hsize: 640  vsize 480  refresh: 75  vid: 20273
>(II) intel(0): #4: hsize: 1280  vsize 1024  refresh: 75  vid: 36737
>(II) intel(0): #5: hsize: 1024  vsize 819  refresh: 75  vid: 36705
>(II) intel(0): #6: hsize: 800  vsize 640  refresh: 75  vid: 36677
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 78.8 MHz   Image Size:  376 x 301 mm
>(II) intel(0): h_active: 1024  h_sync: 1040  h_sync_end 1136 h_blank_end 1312 h_border: 0
>(II) intel(0): v_active: 768  v_sync: 769  v_sync_end 772 v_blanking: 800 v_border: 0
>(II) intel(0): Ranges: V min: 50 V max: 85 Hz, H min: 30 H max: 82 kHz, PixClock max 110 MHz
>(II) intel(0): Monitor name: Crystal
>(II) intel(0): Serial No: 000001
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0036696264cc22da03
>(II) intel(0): 	2311010381251ea4e8fbb4a1554b9724
>(II) intel(0): 	10484cad4f00814f614f454f314f818f
>(II) intel(0): 	618f458f0101c31e0020410020301060
>(II) intel(0): 	1300782d1100001e000000fd0032551e
>(II) intel(0): 	520b000a202020202020000000fc0043
>(II) intel(0): 	72797374616c0a0a0a0a0a0a000000ff
>(II) intel(0): 	003030303030310a20202020202000e3
>(II) intel(0): EDID vendor "MSI", prod id 25698
>(II) intel(0): SDVOB: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
>(II) intel(0): SDVOB: R: 00 00                   (Not supported)
>(II) intel(0): Not using mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1792x1344" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1856x1392" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (height too large for virtual size)
>(II) intel(0): Printing probed modes for output TMDS-1
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1280x960"x60.0  108.00  1280 1376 1488 1800  960 961 964 1000 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1152x864"x75.0  108.00  1152 1216 1344 1600  864 865 868 900 +hsync +vsync (67.5 kHz)
>(II) intel(0): Modeline "1024x819"x75.0   88.24  1024 1088 1200 1376  819 820 823 855 -hsync +vsync (64.1 kHz)
>(II) intel(0): Modeline "1024x768"x85.0   94.50  1024 1072 1168 1376  768 769 772 808 +hsync +vsync (68.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   81.80  1024 1080 1192 1360  768 769 772 802 -hsync +vsync (60.2 kHz)
>(II) intel(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) intel(0): Modeline "1024x768"x75.0   78.75  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.0 kHz)
>(II) intel(0): Modeline "1024x768"x70.1   75.00  1024 1048 1184 1328  768 771 777 806 -hsync -vsync (56.5 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "832x624"x74.6   57.28  832 864 928 1152  624 625 628 667 -hsync -vsync (49.7 kHz)
>(II) intel(0): Modeline "800x640"x75.0   52.98  800 840 928 1056  640 641 644 669 -hsync +vsync (50.2 kHz)
>(II) intel(0): Modeline "800x600"x72.2   50.00  800 856 976 1040  600 637 643 666 +hsync +vsync (48.1 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x75.0   48.91  800 840 920 1040  600 601 604 627 -hsync +vsync (47.0 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "800x600"x56.2   36.00  800 824 896 1024  600 601 603 625 +hsync +vsync (35.2 kHz)
>(II) intel(0): Modeline "640x480"x85.0   36.00  640 696 752 832  480 481 484 509 -hsync -vsync (43.3 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x72.8   31.50  640 664 704 832  480 489 492 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x75.0   30.72  640 664 728 816  480 481 484 502 -hsync +vsync (37.7 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x85.0   35.50  720 756 828 936  400 401 404 446 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Modeline "640x400"x85.1   31.50  640 672 736 832  400 401 404 445 -hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x350"x85.1   31.50  640 672 736 832  350 382 385 445 +hsync -vsync (37.9 kHz)
>(II) intel(0): SDVOC: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVOC: R: 00 00                   (Success)
>(II) intel(0): EDID for output TMDS-2
>(II) intel(0): Output VGA connected
>(II) intel(0): Output TMDS-1 connected
>(II) intel(0): Output TMDS-2 disconnected
>(II) intel(0): Using user preference for initial modes
>(II) intel(0): Output VGA using initial mode 800x600
>(II) intel(0): Output TMDS-1 using initial mode 800x600
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 17 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 15 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOC: R: 00                      (Success)
>(EE) intel(0): First SDVOC output reported failure to sync
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): detected 1024 kB GTT.
>(II) intel(0): detected 7164 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Intel XvMC decoder disabled
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(==) intel(0): DPI set to (96, 96)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>
>(II) Loading /usr/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.4
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>
>(II) Loading /usr/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.5.2, module version = 2.4.0
>	ABI class: X.Org Video Driver, version 4.1
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"
>(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] -1	0	0xffffffff - 0xffffffff (0x1) MX[B]
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[5] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[6] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[7] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[8] -1	0	0x00000000 - 0x00000000 (0x1) IX[B]
>	[9] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[10] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 238592 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 954364 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: drmOpenMinor returns 12
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xfe980000
>(II) intel(0): [drm] ring buffer = 0xd0000000
>(II) intel(0): [drm] mapped front buffer at 0xd1000000, handle = 0xd1000000
>(II) intel(0): [drm] mapped back buffer at 0xd4000000, handle = 0xd4000000
>(II) intel(0): [drm] mapped depth buffer at 0xd5000000, handle = 0xd5000000
>(II) intel(0): [drm] mapped classic textures at 0xd6000000, handle = 0xd6000000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 29491200 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R: 08                      (Success)
>(II) intel(0): Current clock rate multiplier: 8
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R: 01 00                   (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: A0 0F 20 00 31 58 1C 20 (Success)
>(II) intel(0): SDVOB: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 28 80 14 00 1E 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVOC: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R: 00 00                   (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOC: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x01000000 (pgoffset 4096)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x02000000 (pgoffset 8192)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x04000000 (pgoffset 16384)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x05000000 (pgoffset 20480)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x06000000 (pgoffset 24576)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x00131fff: fake bufmgr (1024 kB)
>(II) intel(0): 0x00132000-0x00132fff: overlay registers (4 kB)
>(II) intel(0): 0x00133000-0x00133fff: HW status (4 kB)
>(II) intel(0): 0x006ff000:            end of stolen memory
>(II) intel(0): 0x01000000-0x01ffffff: front buffer (16384 kB) X tiled
>(II) intel(0): 0x02000000-0x03c1ffff: exa offscreen (28800 kB)
>(II) intel(0): 0x04000000-0x04ffffff: back buffer (9600 kB) X tiled
>(II) intel(0): 0x05000000-0x05ffffff: depth buffer (9600 kB) X tiled
>(II) intel(0): 0x06000000-0x07ffffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 40000 vco 2400000 ((m 75, m1 11, m2 8), n 1, (p 60, p1 6, p2 10))
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "800x600"x85.1   56.30  800 832 896 1048  600 601 604 631 +hsync +vsync (53.7 kHz)
>(II) intel(0): Adjusted mode for pipe B:
>(II) intel(0): Modeline "800x600"x85.1  112.60  800 832 896 1048  600 601 604 631 +hsync +vsync (107.4 kHz)
>(II) intel(0): chosen: dotclock 112800 vco 2256000 ((m 94, m1 15, m2 7), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): SDVOB: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 FE 15 20 F8 30 58 1F 20 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 17 20 40 13 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 FE 15 20 F8 30 58 1F 20 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 15 20 40 13 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 21 02                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOB: R: 00                      (Success)
>(EE) intel(0): First SDVOB output reported failure to sync
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0xc0480084 (enabled, pipe B, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00300080 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00002f2f
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0xc0480084 (enabled, pipe B, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x00300080 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0xd8000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x0257031f (800, 600)
>(II) intel(0):             DSPABASE: 0x01000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x031f0257 (800, 600)
>(II) intel(0):            PIPEASTAT: 0x00020203 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):                 FPA0: 0x00010b08 (n = 1, m1 = 11, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x94200000 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 6, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x041f031f (800 active, 1056 total)
>(II) intel(0):             HBLANK_A: 0x041f031f (800 start, 1056 end)
>(II) intel(0):              HSYNC_A: 0x03c70347 (840 start, 968 end)
>(II) intel(0):             VTOTAL_A: 0x02730257 (600 active, 628 total)
>(II) intel(0):             VBLANK_A: 0x02730257 (600 start, 628 end)
>(II) intel(0):              VSYNC_A: 0x025c0258 (601 start, 605 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000000 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x0257031f (800, 600)
>(II) intel(0):             DSPBBASE: 0x01000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x031f0257 (800, 600)
>(II) intel(0):            PIPEBSTAT: 0x00020202 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00020f07 (n = 2, m1 = 15, m2 = 7)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0xd4020010 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 2)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x0417031f (800 active, 1048 total)
>(II) intel(0):             HBLANK_B: 0x0417031f (800 start, 1048 end)
>(II) intel(0):              HSYNC_B: 0x037f033f (832 start, 896 end)
>(II) intel(0):             VTOTAL_B: 0x02760257 (600 active, 631 total)
>(II) intel(0):             VBLANK_B: 0x02760257 (600 start, 631 end)
>(II) intel(0):              VSYNC_B: 0x025b0258 (601 start, 604 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 40000 n 1 m1 11 m2 8 p1 6 p2 10
>(II) intel(0): pipe B dot 112800 n 2 m1 15 m2 7 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe A
>(II) intel(0):   Output TMDS-1 is connected to pipe B
>(II) intel(0):   Output TMDS-2 is connected to pipe none
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(II) intel(0): Set up textured video
>(II) intel(0): Set up overlay video
>(II) intel(0): direct rendering: Enabled
>(WW) intel(0): Option "PreferredMode" is not used
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 13, (OK)
>drmOpenByBusid: drmOpenMinor returns 13
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) AIGLX: enabled GLX_MESA_copy_sub_buffer
>(II) AIGLX: enabled GLX_SGI_swap_control and GLX_MESA_swap_control
>(II) AIGLX: enabled GLX_texture_from_pixmap with driver support
>(II) AIGLX: Loaded and initialized /usr/lib/dri/i915_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 211 x 158
>(**) Option "CoreKeyboard"
>(**) Keyboard[0]: always reports core events
>(**) Option "Protocol" "Standard"
>(**) Keyboard[0]: Protocol: Standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xfree86"
>(**) Keyboard[0]: XkbRules: "xfree86"
>(**) Option "XkbModel" "pc101"
>(**) Keyboard[0]: XkbModel: "pc101"
>(**) Option "XkbLayout" "us"
>(**) Keyboard[0]: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard[0]: CustomKeycodes disabled
>(**) Option "Protocol" "explorerps/2"
>(**) Mouse[1]: Device: "/dev/input/mice"
>(**) Mouse[1]: Protocol: "explorerps/2"
>(**) Option "CorePointer"
>(**) Mouse[1]: always reports core events
>(**) Option "Device" "/dev/input/mice"
>(**) Option "Buttons" "4"
>(==) Mouse[1]: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5"
>(**) Mouse[1]: ZAxisMapping: buttons 4 and 5
>(**) Mouse[1]: Buttons: 9
>(**) Mouse[1]: Sensitivity: 1
>(II) evaluating device (Keyboard[0])
>(II) XINPUT: Adding extended input device "Keyboard[0]" (type: KEYBOARD)
>(II) evaluating device (Mouse[1])
>(II) XINPUT: Adding extended input device "Mouse[1]" (type: MOUSE)
>(II) Mouse[1]: ps2EnableDataReporting: succeeded
>Could not init font path element /usr/share/fonts/TTF/, removing from list!
>Could not init font path element /usr/share/fonts/OTF, removing from list!
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOB: R: 00                      (Success)
>(EE) intel(0): First SDVOB output reported failure to sync
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) UnloadModule: "kbd"
>(II) UnloadModule: "mouse"
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOB: R: 00                      (Success)
>(EE) intel(0): First SDVOB output reported failure to sync
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 16 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 17 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 14 A0 0F 20 00 31 58 1C 20 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 15 28 80 14 00 1E 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 21 08                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 17 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 15 18 88 36 00 18 00 00 00 (SDVO_CMD_SET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): SDVOC: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(II) intel(0): SDVOC: R: 00                      (Success)
>(EE) intel(0): First SDVOC output reported failure to sync
>(II) intel(0): SDVOC: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOC: R:                         (Success)
>(II) intel(0): Comparing regs from server start up to After LeaveVT
>(II) intel(0): DumpRegsBegin
>(II) intel(0):            CHDECMISC: 0x0000002c (XOR bank/rank, ch2 enh disabled, ch1 enh enabled, ch0 enh enabled, flex disabled, ep not present)
>(II) intel(0):               C0DRB0: 0x00100008 (0x0008)
>(II) intel(0):               C0DRB1: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB2: 0x00100010 (0x0010)
>(II) intel(0):               C0DRB3: 0x02020010 (0x0010)
>(II) intel(0):               C1DRB0: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB1: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB2: 0x00000000 (0x0000)
>(II) intel(0):               C1DRB3: 0x00000000 (0x0000)
>(II) intel(0):              C0DRA01: 0x00000202 (0x0202)
>(II) intel(0):              C0DRA23: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA01: 0x00000000 (0x0000)
>(II) intel(0):              C1DRA23: 0x00000000 (0x0000)
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006820
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00000000 (clock gates disabled:)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x00300004 (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x80300080 (enabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x00000000
>(II) intel(0):               DSPFW2: 0x00000000
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x00300004 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOC: 0x80300080 (enabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PP_ON_DELAYS: 0x00000000
>(II) intel(0):        PP_OFF_DELAYS: 0x00000000
>(II) intel(0):           PP_DIVISOR: 0x00000000
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0x94000000 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000640 (1600 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x0257031f (800, 600)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0x80000000 (enabled, single-wide)
>(II) intel(0):             PIPEASRC: 0x031f0257 (800, 600)
>(II) intel(0):            PIPEASTAT: 0x00020203 (status: VBLANK_INT_ENABLE VSYNC_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):                 FPA0: 0x00011008 (n = 1, m1 = 16, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0xd4020033 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10, SDVO mult 4)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x041f031f (800 active, 1056 total)
>(II) intel(0):             HBLANK_A: 0x041f031f (800 start, 1056 end)
>(II) intel(0):              HSYNC_A: 0x03c70347 (840 start, 968 end)
>(II) intel(0):             VTOTAL_A: 0x02730257 (600 active, 628 total)
>(II) intel(0):             VBLANK_A: 0x02730257 (600 start, 628 end)
>(II) intel(0):              VSYNC_A: 0x025c0258 (601 start, 605 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0x00000000 (disabled, single-wide)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00020000 (status: VBLANK_INT_ENABLE)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x04800003 (disabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10, SDVO mult 1)
>(II) intel(0):            DPLL_B_MD: 0x00000000
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x8124008e (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000040
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0): pipe A dot 160000 n 1 m1 16 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): xf86UnbindGARTMemory: unbind key 0
>(II) intel(0): xf86UnbindGARTMemory: unbind key 1
>(II) intel(0): xf86UnbindGARTMemory: unbind key 2
>(II) intel(0): xf86UnbindGARTMemory: unbind key 3
>(II) intel(0): xf86UnbindGARTMemory: unbind key 4
>(II) intel(0): [drm] removed 1 reserved context for kernel
>(II) intel(0): [drm] unmapping 8192 bytes of SAREA 0xf8c30000 at 0xb7a49000
>(II) intel(0): [drm] Closed DRM master.

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Attachments on bug 23713: 29221 | 29222 | 29291 | 29292 | 29373 | 29374 | 29377 | 29386 | 29387 | 29653 | 29921 | 33033 | 33035 | 34137 | 34618 | 56882 | 56895 | 56923 | 56970

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