Attachment 29048 Details for Bug 22981 – debug dpms activity

[patch] debug dpms activity

i915-dpms-debug.patch (text/plain), 2.37 KB, created by Jesse Barnes on 2009-08-31 11:27:08 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Jesse Barnes

Created: 2009-08-31 11:27:08 UTC

Size: 2.37 KB

patch

obsolete

>diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
>index 2f631c7..47203fc 100644
>--- a/drivers/gpu/drm/drm_crtc.c
>+++ b/drivers/gpu/drm/drm_crtc.c
>@@ -2280,6 +2280,7 @@ int drm_mode_connector_property_set_ioctl(struct drm_device *dev,
> 
> 	/* Do DPMS ourselves */
> 	if (property == connector->dev->mode_config.dpms_property) {
>+		DRM_ERROR("*** got DPMS set property call\n");
> 		if (connector->funcs->dpms)
> 			(*connector->funcs->dpms)(connector, (int) out_resp->value);
> 		ret = 0;
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index c4b17a7..e267115 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -1534,6 +1534,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
> 	int pipeconf_reg = (pipe == 0) ? PIPEACONF : PIPEBCONF;
> 	u32 temp;
> 
>+	DRM_DEBUG("*** i915 DPMS call: %d\n", mode);
>+
> 	/* XXX: When our outputs are all unaware of DPMS modes other than off
> 	 * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
> 	 */
>@@ -2064,7 +2066,21 @@ static void igd_enable_cxsr(struct drm_device *dev, unsigned long clock,
> 	return;
> }
> 
>-const static int latency_ns = 3000; /* default for non-igd platforms */
>+/*
>+ * Latency for FIFO fetches is dependent on several factors:
>+ *   - memory configuration (speed, channels)
>+ *   - chipset
>+ *   - current MCH state
>+ * It can be fairly high in some situations, so here we assume a fairly
>+ * pessimal value.  It's a tradeoff between extra memory fetches (if we
>+ * set this value too high, the FIFO will fetch frequently to stay full)
>+ * and power consumption (set it too low to save power and we might see
>+ * FIFO underruns and display "flicker").
>+ *
>+ * A value of 5us seems to be a good balance; safe for very low end
>+ * platforms but not overly aggressive on lower latency configs.
>+ */
>+const static int latency_ns = 5000;
> 
> static int intel_get_fifo_size(struct drm_device *dev, int plane)
> {
>diff --git a/drivers/gpu/drm/i915/intel_fb.c b/drivers/gpu/drm/i915/intel_fb.c
>index 1d30802..11ba1d4 100644
>--- a/drivers/gpu/drm/i915/intel_fb.c
>+++ b/drivers/gpu/drm/i915/intel_fb.c
>@@ -340,6 +340,8 @@ static void intelfb_off(struct fb_info *info, int dpms_mode)
> 
> static int intelfb_blank(int blank, struct fb_info *info)
> {
>+	DRM_ERROR("*** fb blank: %d\n", blank);
>+
> 	switch (blank) {
> 	case FB_BLANK_UNBLANK:
> 		intelfb_on(info);

Actions: View | Splinter Review

Attachments on bug 22981: 29048

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.