Attachment 19154 Details for Bug 17756 – Change the order of disables (patch for intel-2.4.1)

[patch] Change the order of disables (patch for intel-2.4.1)

intel-2.4.1-disable-planes.patch (text/plain), 2.29 KB, created by Olivier Fourdan on 2008-09-24 09:34:40 UTC

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Creator: Olivier Fourdan

Created: 2008-09-24 09:34:40 UTC

Size: 2.29 KB

patch

obsolete

>From the Intel 965 Programmerâs Reference Manual, volume 3, 
>chapter 2.2.2 "Mode Switch Programming Sequence".
>
>The disable sequence should be:
>
> - Disable planes (VGA or hires)
> - Disable pipe
> - Disable VGA display in 0x71400 bit 31
>
>This patch implements that order plus waits for a vblank at the end.
>
>Olivier.
>
>--- xf86-video-intel-2.4.1/src/i830_display.c.disable-planes	2008-09-08 12:00:01.000000000 +0100
>+++ xf86-video-intel-2.4.1/src/i830_display.c	2008-09-10 00:39:10.000000000 +0100
>@@ -854,27 +854,31 @@
> 	/* Give the overlay scaler a chance to disable if it's on this pipe */
> 	i830_crtc_dpms_video(crtc, FALSE);
> 
>-	/* Disable the VGA plane that we never use */
>-	OUTREG(VGACNTRL, VGA_DISP_DISABLE);
>+	/* 
>+	 * The documentation says :
>+	 * - Disable planes (VGA or hires)
>+	 * - Disable pipe
>+	 * - Disable VGA display
>+	 */
> 
>-	/* May need to leave pipe A on */
>-	if ((pipe != 0) || !(pI830->quirk_flag & QUIRK_PIPEA_FORCE))
>+	/* Disable display plane */
>+	temp = INREG(dspcntr_reg);
>+	if ((temp & DISPLAY_PLANE_ENABLE) != 0)
> 	{
>-		/* Disable display plane */
>-		temp = INREG(dspcntr_reg);
>-		if ((temp & DISPLAY_PLANE_ENABLE) != 0)
>-		{
>-		    OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
>-		    /* Flush the plane changes */
>-		    OUTREG(dspbase_reg, INREG(dspbase_reg));
>-		    POSTING_READ(dspbase_reg);
>-		}
>+	    OUTREG(dspcntr_reg, temp & ~DISPLAY_PLANE_ENABLE);
>+	    /* Flush the plane changes */
>+	    OUTREG(dspbase_reg, INREG(dspbase_reg));
>+	    POSTING_READ(dspbase_reg);
>+	}
> 
>-		if (!IS_I9XX(pI830)) {
>-		    /* Wait for vblank for the disable to take effect */
>-		    i830WaitForVblank(pScrn);
>-		}
>+	if (!IS_I9XX(pI830)) {
>+	    /* Wait for vblank for the disable to take effect */
>+	    i830WaitForVblank(pScrn);
>+	}
> 
>+	/* May need to leave pipe A on */
>+	if ((pipe != 0) || !(pI830->quirk_flag & QUIRK_PIPEA_FORCE))
>+	{
> 		/* Next, disable display pipes */
> 		temp = INREG(pipeconf_reg);
> 		if ((temp & PIPEACONF_ENABLE) != 0) {
>@@ -890,9 +894,15 @@
> 		    OUTREG(dpll_reg, temp & ~DPLL_VCO_ENABLE);
> 		    POSTING_READ(dpll_reg);
> 		}
>+
>+		/* Wait for the clocks to turn off. */
>+		usleep(150);
> 	}
>-	/* Wait for the clocks to turn off. */
>-	usleep(150);
>+
>+	/* Disable the VGA plane that we never use. */
>+	OUTREG(VGACNTRL, VGA_DISP_DISABLE);
>+	i830WaitForVblank(pScrn);
>+
> 	break;
>     }
>

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