Attachment 17559 Details for Bug 16631 – xorg.0.log

xorg.0.log

Xorg.0.log (text/plain), 84.02 KB, created by liuhaien on 2008-07-06 23:26:16 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: liuhaien

Created: 2008-07-06 23:26:16 UTC

Size: 84.02 KB

patch

obsolete

>
>X.Org X Server 1.4.2
>Release Date: 11 June 2008
>X Protocol Version 11, Revision 0
>Build Operating System: Linux 2.6.17.7 i686 
>Current Operating System: Linux x-q965 2.6.26-rc8 #2 SMP Thu Jul 3 13:19:42 CST 2008 i686
>Build Date: 06 July 2008  05:52:23PM
> 
>	Before reporting problems, check http://wiki.x.org
>	to make sure that you have the latest version.
>Module Loader present
>Markers: (--) probed, (**) from config file, (==) default setting,
>	(++) from command line, (!!) notice, (II) informational,
>	(WW) warning, (EE) error, (NI) not implemented, (??) unknown.
>(==) Log file: "/opt/X11R7/var/log/Xorg.0.log", Time: Mon Jul  7 13:41:24 2008
>(==) Using config file: "/etc/X11/xorg.conf"
>(==) ServerLayout "Default Layout"
>(**) |-->Screen "Screen0" (0)
>(**) |   |-->Monitor "Monitor0"
>(**) |   |-->Device "Videocard0"
>(**) |-->Input Device "Mouse0"
>(**) |-->Input Device "Keyboard0"
>(==) Automatically adding devices
>(==) Automatically enabling devices
>(WW) The directory "/usr/share/X11/fonts/cyrillic" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/X11/fonts/75dpi/" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/usr/share/X11/fonts/75dpi" does not exist.
>	Entry deleted from font path.
>(WW) The directory "/var/lib/defoma/x-ttcidfont-conf.d/dirs/TrueType" does not exist.
>	Entry deleted from font path.
>(==) Including the default font path /opt/X11R7/lib/X11/fonts/misc/,/opt/X11R7/lib/X11/fonts/TTF/,/opt/X11R7/lib/X11/fonts/OTF,/opt/X11R7/lib/X11/fonts/Type1/,/opt/X11R7/lib/X11/fonts/100dpi/,/opt/X11R7/lib/X11/fonts/75dpi/.
>(**) FontPath set to:
>	unix/:7100,
>	/usr/share/X11/fonts/misc,
>	/usr/share/X11/fonts/100dpi/:unscaled,
>	/usr/share/X11/fonts/Type1,
>	/usr/share/X11/fonts/100dpi,
>	/opt/X11R7/lib/X11/fonts/misc/,
>	/opt/X11R7/lib/X11/fonts/TTF/,
>	/opt/X11R7/lib/X11/fonts/OTF,
>	/opt/X11R7/lib/X11/fonts/Type1/,
>	/opt/X11R7/lib/X11/fonts/100dpi/,
>	/opt/X11R7/lib/X11/fonts/75dpi/
>(==) RgbPath set to "/opt/X11R7/share/X11/rgb"
>(**) ModulePath set to "/opt/X11R7/lib/xorg/modules"
>(II) Open ACPI successful (/var/run/acpid.socket)
>(II) Loader magic: 0x81d45a0
>(II) Module ABI versions:
>	X.Org ANSI C Emulation: 0.3
>	X.Org Video Driver: 2.0
>	X.Org XInput driver : 2.0
>	X.Org Server Extension : 0.3
>	X.Org Font Renderer : 0.5
>(II) Loader running on linux
>(II) LoadModule: "pcidata"
>(II) Loading /opt/X11R7/lib/xorg/modules//libpcidata.so
>(II) Module pcidata: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(--) using VT number 7
>
>(II) PCI: PCI scan (all values are in hex)
>(II) PCI: 00:00:0: chip 8086,2990 card 1028,01da rev 02 class 06,00,00 hdr 00
>(II) PCI: 00:02:0: chip 8086,2992 card 1028,01da rev 02 class 03,00,00 hdr 80
>(II) PCI: 00:02:1: chip 8086,2993 card 1028,01da rev 02 class 03,80,00 hdr 80
>(II) PCI: 00:1a:0: chip 8086,2834 card 1028,01da rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1a:1: chip 8086,2835 card 1028,01da rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1a:7: chip 8086,283a card 1028,01da rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1b:0: chip 8086,284b card 1028,01da rev 02 class 04,03,00 hdr 00
>(II) PCI: 00:1c:0: chip 8086,283f card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1c:4: chip 8086,2847 card 0000,0000 rev 02 class 06,04,00 hdr 81
>(II) PCI: 00:1d:0: chip 8086,2830 card 1028,01da rev 02 class 0c,03,00 hdr 80
>(II) PCI: 00:1d:1: chip 8086,2831 card 1028,01da rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:2: chip 8086,2832 card 1028,01da rev 02 class 0c,03,00 hdr 00
>(II) PCI: 00:1d:7: chip 8086,2836 card 1028,01da rev 02 class 0c,03,20 hdr 00
>(II) PCI: 00:1e:0: chip 8086,244e card 0000,0000 rev f2 class 06,04,01 hdr 01
>(II) PCI: 00:1f:0: chip 8086,2810 card 0000,0000 rev 02 class 06,01,00 hdr 80
>(II) PCI: 00:1f:2: chip 8086,2820 card 1028,01da rev 02 class 01,01,8f hdr 00
>(II) PCI: 00:1f:3: chip 8086,283e card 1028,01da rev 02 class 0c,05,00 hdr 00
>(II) PCI: 00:1f:5: chip 8086,2825 card 1028,01da rev 02 class 01,01,85 hdr 00
>(II) PCI: 02:00:0: chip 14e4,167a card 1028,01da rev 02 class 02,00,00 hdr 00
>(II) PCI: End of PCI scan
>(II) Intel Bridge workaround enabled
>(II) Host-to-PCI bridge:
>(II) Bus 0: bridge is at (0:0:0), (0,0,3), BCTRL: 0x0008 (VGA_EN is set)
>(II) Bus 0 I/O range:
>	[0] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) Bus 0 non-prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) Bus 0 prefetchable memory range:
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 1: bridge is at (0:28:0), (0,1,1), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 1 non-prefetchable memory range:
>	[0] -1	0	0xdfc00000 - 0xdfcfffff (0x100000) MX[B]
>(II) PCI-to-PCI bridge:
>(II) Bus 2: bridge is at (0:28:4), (0,2,2), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) Bus 2 non-prefetchable memory range:
>	[0] -1	0	0xdfb00000 - 0xdfbfffff (0x100000) MX[B]
>(II) Subtractive PCI-to-PCI bridge:
>(II) Bus 3: bridge is at (0:30:0), (0,3,3), BCTRL: 0x0002 (VGA_EN is cleared)
>(II) PCI-to-ISA bridge:
>(II) Bus -1: bridge is at (0:31:0), (0,-1,-1), BCTRL: 0x0008 (VGA_EN is set)
>(--) PCI:*(0:2:0) Intel Corporation 82Q963/Q965 Integrated Graphics Controller rev 2, Mem @ 0xdfe00000/20, 0xc0000000/28, I/O @ 0xecb8/3
>(--) PCI: (0:2:1) Intel Corporation 82Q963/Q965 Integrated Graphics Controller rev 2, Mem @ 0xdff00000/20
>(II) Addressable bus resource ranges are
>	[0] -1	0	0x00000000 - 0xffffffff (0x0) MX[B]
>	[1] -1	0	0x00000000 - 0x0000ffff (0x10000) IX[B]
>(II) OS-reported resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) Active PCI resource ranges:
>	[0] -1	0	0xdfbf0000 - 0xdfbfffff (0x10000) MX[B]
>	[1] -1	0	0xdfdfbb00 - 0xdfdfbbff (0x100) MX[B]
>	[2] -1	0	0xff980800 - 0xff980bff (0x400) MX[B]
>	[3] -1	0	0xdfdfc000 - 0xdfdfffff (0x4000) MX[B]
>	[4] -1	0	0xdfdfbc00 - 0xdfdfbfff (0x400) MX[B]
>	[5] -1	0	0xdff00000 - 0xdfffffff (0x100000) MX[B](B)
>	[6] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[7] -1	0	0xdfe00000 - 0xdfefffff (0x100000) MX[B](B)
>	[8] -1	0	0x0000ecd0 - 0x0000ecdf (0x10) IX[B]
>	[9] -1	0	0x0000fed0 - 0x0000fedf (0x10) IX[B]
>	[10] -1	0	0x0000fe70 - 0x0000fe73 (0x4) IX[B]
>	[11] -1	0	0x0000fe60 - 0x0000fe67 (0x8) IX[B]
>	[12] -1	0	0x0000fe50 - 0x0000fe53 (0x4) IX[B]
>	[13] -1	0	0x0000fe40 - 0x0000fe47 (0x8) IX[B]
>	[14] -1	0	0x0000ece0 - 0x0000ecff (0x20) IX[B]
>	[15] -1	0	0x0000ecc0 - 0x0000eccf (0x10) IX[B]
>	[16] -1	0	0x0000fec0 - 0x0000fecf (0x10) IX[B]
>	[17] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[18] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[19] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[20] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[21] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[22] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[23] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[24] -1	0	0x0000ff00 - 0x0000ff1f (0x20) IX[B]
>	[25] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[26] -1	0	0x0000ecb8 - 0x0000ecbf (0x8) IX[B](B)
>(II) Active PCI resource ranges after removing overlaps:
>	[0] -1	0	0xdfbf0000 - 0xdfbfffff (0x10000) MX[B]
>	[1] -1	0	0xdfdfbb00 - 0xdfdfbbff (0x100) MX[B]
>	[2] -1	0	0xff980800 - 0xff980bff (0x400) MX[B]
>	[3] -1	0	0xdfdfc000 - 0xdfdfffff (0x4000) MX[B]
>	[4] -1	0	0xdfdfbc00 - 0xdfdfbfff (0x400) MX[B]
>	[5] -1	0	0xdff00000 - 0xdfffffff (0x100000) MX[B](B)
>	[6] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[7] -1	0	0xdfe00000 - 0xdfefffff (0x100000) MX[B](B)
>	[8] -1	0	0x0000ecd0 - 0x0000ecdf (0x10) IX[B]
>	[9] -1	0	0x0000fed0 - 0x0000fedf (0x10) IX[B]
>	[10] -1	0	0x0000fe70 - 0x0000fe73 (0x4) IX[B]
>	[11] -1	0	0x0000fe60 - 0x0000fe67 (0x8) IX[B]
>	[12] -1	0	0x0000fe50 - 0x0000fe53 (0x4) IX[B]
>	[13] -1	0	0x0000fe40 - 0x0000fe47 (0x8) IX[B]
>	[14] -1	0	0x0000ece0 - 0x0000ecff (0x20) IX[B]
>	[15] -1	0	0x0000ecc0 - 0x0000eccf (0x10) IX[B]
>	[16] -1	0	0x0000fec0 - 0x0000fecf (0x10) IX[B]
>	[17] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[18] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[19] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[20] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[21] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[22] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[23] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[24] -1	0	0x0000ff00 - 0x0000ff1f (0x20) IX[B]
>	[25] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[26] -1	0	0x0000ecb8 - 0x0000ecbf (0x8) IX[B](B)
>(II) OS-reported resource ranges after removing overlaps with PCI:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[5] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>(II) All system resource ranges:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xdfbf0000 - 0xdfbfffff (0x10000) MX[B]
>	[5] -1	0	0xdfdfbb00 - 0xdfdfbbff (0x100) MX[B]
>	[6] -1	0	0xff980800 - 0xff980bff (0x400) MX[B]
>	[7] -1	0	0xdfdfc000 - 0xdfdfffff (0x4000) MX[B]
>	[8] -1	0	0xdfdfbc00 - 0xdfdfbfff (0x400) MX[B]
>	[9] -1	0	0xdff00000 - 0xdfffffff (0x100000) MX[B](B)
>	[10] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[11] -1	0	0xdfe00000 - 0xdfefffff (0x100000) MX[B](B)
>	[12] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[13] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[14] -1	0	0x0000ecd0 - 0x0000ecdf (0x10) IX[B]
>	[15] -1	0	0x0000fed0 - 0x0000fedf (0x10) IX[B]
>	[16] -1	0	0x0000fe70 - 0x0000fe73 (0x4) IX[B]
>	[17] -1	0	0x0000fe60 - 0x0000fe67 (0x8) IX[B]
>	[18] -1	0	0x0000fe50 - 0x0000fe53 (0x4) IX[B]
>	[19] -1	0	0x0000fe40 - 0x0000fe47 (0x8) IX[B]
>	[20] -1	0	0x0000ece0 - 0x0000ecff (0x20) IX[B]
>	[21] -1	0	0x0000ecc0 - 0x0000eccf (0x10) IX[B]
>	[22] -1	0	0x0000fec0 - 0x0000fecf (0x10) IX[B]
>	[23] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[24] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[25] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[26] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[27] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[28] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[29] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[30] -1	0	0x0000ff00 - 0x0000ff1f (0x20) IX[B]
>	[31] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[32] -1	0	0x0000ecb8 - 0x0000ecbf (0x8) IX[B](B)
>(II) "extmod" will be loaded. This was enabled by default and also specified in the config file.
>(II) "dbe" will be loaded. This was enabled by default and also specified in the config file.
>(II) "glx" will be loaded. This was enabled by default and also specified in the config file.
>(II) "freetype" will be loaded. This was enabled by default and also specified in the config file.
>(II) "type1" will be loaded. This was enabled by default and also specified in the config file.
>(II) "record" will be loaded by default.
>(II) "dri" will be loaded. This was enabled by default and also specified in the config file.
>(II) LoadModule: "dbe"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdbe.so
>(II) Module dbe: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension DOUBLE-BUFFER
>(II) LoadModule: "extmod"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libextmod.so
>(II) Module extmod: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension SHAPE
>(II) Loading extension MIT-SUNDRY-NONSTANDARD
>(II) Loading extension BIG-REQUESTS
>(II) Loading extension SYNC
>(II) Loading extension MIT-SCREEN-SAVER
>(II) Loading extension XC-MISC
>(II) Loading extension XFree86-VidModeExtension
>(II) Loading extension XFree86-Misc
>(II) Loading extension XFree86-DGA
>(II) Loading extension DPMS
>(II) Loading extension TOG-CUP
>(II) Loading extension Extended-Visual-Information
>(II) Loading extension XVideo
>(II) Loading extension XVideo-MotionCompensation
>(II) Loading extension X-Resource
>(II) LoadModule: "fbdevhw"
>(II) Loading /opt/X11R7/lib/xorg/modules/linux//libfbdevhw.so
>(II) Module fbdevhw: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 0.0.2
>	ABI class: X.Org Video Driver, version 2.0
>(II) LoadModule: "glx"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libglx.so
>(II) Module glx: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(==) AIGLX enabled
>(II) Loading extension GLX
>(II) LoadModule: "freetype"
>(II) Loading /opt/X11R7/lib/xorg/modules/fonts//libfreetype.so
>(II) Module freetype: vendor="X.Org Foundation & the After X-TT Project"
>	compiled for 1.4.2, module version = 2.1.0
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font FreeType
>(II) LoadModule: "type1"
>(II) Loading /opt/X11R7/lib/xorg/modules/fonts//libtype1.so
>(II) Module type1: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.2
>	Module class: X.Org Font Renderer
>	ABI class: X.Org Font Renderer, version 0.5
>(II) Loading font Type1
>(II) LoadModule: "dri"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//libdri.so
>(II) Module dri: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension XFree86-DRI
>(II) LoadModule: "record"
>(II) Loading /opt/X11R7/lib/xorg/modules/extensions//librecord.so
>(II) Module record: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.13.0
>	Module class: X.Org Server Extension
>	ABI class: X.Org Server Extension, version 0.3
>(II) Loading extension RECORD
>(II) LoadModule: "intel"
>(II) Loading /opt/X11R7/lib/xorg/modules/drivers//intel_drv.so
>(II) Module intel: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 2.2.0
>	Module class: X.Org Video Driver
>	ABI class: X.Org Video Driver, version 2.0
>(II) LoadModule: "mouse"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//mouse_drv.so
>(II) Module mouse: vendor="X.Org Foundation"
>	compiled for 1.5.99.1, module version = 1.3.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) LoadModule: "kbd"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//kbd_drv.so
>(II) Module kbd: vendor="X.Org Foundation"
>	compiled for 1.5.99.1, module version = 1.3.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(II) intel: Driver for Intel Integrated Graphics Chipsets: i810,
>	i810-dc100, i810e, i815, i830M, 845G, 852GM/855GM, 865G, 915G,
>	E7221 (i915), 915GM, 945G, 945GM, 945GME, 965G, G35, 965Q, 946GZ,
>	965GM, 965GME/GLE, G33, Q35, Q33, Intel Integrated Graphics Device,
>	Intel Integrated Graphics Device, G45/G43, Q45/Q43
>(II) Primary Device is: PCI 00:02:0
>(--) Assigning device section with no busID to primary device
>(WW) intel: No matching Device section for instance (BusID PCI:0:2:1) found
>(--) Chipset 965Q found
>(II) resource ranges after xf86ClaimFixedResources() call:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xdfbf0000 - 0xdfbfffff (0x10000) MX[B]
>	[5] -1	0	0xdfdfbb00 - 0xdfdfbbff (0x100) MX[B]
>	[6] -1	0	0xff980800 - 0xff980bff (0x400) MX[B]
>	[7] -1	0	0xdfdfc000 - 0xdfdfffff (0x4000) MX[B]
>	[8] -1	0	0xdfdfbc00 - 0xdfdfbfff (0x400) MX[B]
>	[9] -1	0	0xdff00000 - 0xdfffffff (0x100000) MX[B](B)
>	[10] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[11] -1	0	0xdfe00000 - 0xdfefffff (0x100000) MX[B](B)
>	[12] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[13] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[14] -1	0	0x0000ecd0 - 0x0000ecdf (0x10) IX[B]
>	[15] -1	0	0x0000fed0 - 0x0000fedf (0x10) IX[B]
>	[16] -1	0	0x0000fe70 - 0x0000fe73 (0x4) IX[B]
>	[17] -1	0	0x0000fe60 - 0x0000fe67 (0x8) IX[B]
>	[18] -1	0	0x0000fe50 - 0x0000fe53 (0x4) IX[B]
>	[19] -1	0	0x0000fe40 - 0x0000fe47 (0x8) IX[B]
>	[20] -1	0	0x0000ece0 - 0x0000ecff (0x20) IX[B]
>	[21] -1	0	0x0000ecc0 - 0x0000eccf (0x10) IX[B]
>	[22] -1	0	0x0000fec0 - 0x0000fecf (0x10) IX[B]
>	[23] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[24] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[25] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[26] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[27] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[28] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[29] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[30] -1	0	0x0000ff00 - 0x0000ff1f (0x20) IX[B]
>	[31] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[32] -1	0	0x0000ecb8 - 0x0000ecbf (0x8) IX[B](B)
>(II) resource ranges after probing:
>	[0] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[1] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[2] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[3] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[4] -1	0	0xdfbf0000 - 0xdfbfffff (0x10000) MX[B]
>	[5] -1	0	0xdfdfbb00 - 0xdfdfbbff (0x100) MX[B]
>	[6] -1	0	0xff980800 - 0xff980bff (0x400) MX[B]
>	[7] -1	0	0xdfdfc000 - 0xdfdfffff (0x4000) MX[B]
>	[8] -1	0	0xdfdfbc00 - 0xdfdfbfff (0x400) MX[B]
>	[9] -1	0	0xdff00000 - 0xdfffffff (0x100000) MX[B](B)
>	[10] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[11] -1	0	0xdfe00000 - 0xdfefffff (0x100000) MX[B](B)
>	[12] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B]
>	[13] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B]
>	[14] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B]
>	[15] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[16] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[17] -1	0	0x0000ecd0 - 0x0000ecdf (0x10) IX[B]
>	[18] -1	0	0x0000fed0 - 0x0000fedf (0x10) IX[B]
>	[19] -1	0	0x0000fe70 - 0x0000fe73 (0x4) IX[B]
>	[20] -1	0	0x0000fe60 - 0x0000fe67 (0x8) IX[B]
>	[21] -1	0	0x0000fe50 - 0x0000fe53 (0x4) IX[B]
>	[22] -1	0	0x0000fe40 - 0x0000fe47 (0x8) IX[B]
>	[23] -1	0	0x0000ece0 - 0x0000ecff (0x20) IX[B]
>	[24] -1	0	0x0000ecc0 - 0x0000eccf (0x10) IX[B]
>	[25] -1	0	0x0000fec0 - 0x0000fecf (0x10) IX[B]
>	[26] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[27] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[28] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[29] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[30] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[31] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[32] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[33] -1	0	0x0000ff00 - 0x0000ff1f (0x20) IX[B]
>	[34] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[35] -1	0	0x0000ecb8 - 0x0000ecbf (0x8) IX[B](B)
>	[36] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B]
>	[37] 0	0	0x000003c0 - 0x000003df (0x20) IS[B]
>(II) Setting vga for screen 0.
>(II) Loading sub module "int10"
>(II) LoadModule: "int10"
>(II) Loading /opt/X11R7/lib/xorg/modules//libint10.so
>(II) Module int10: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vbe"
>(II) LoadModule: "vbe"
>(II) Loading /opt/X11R7/lib/xorg/modules//libvbe.so
>(II) Module vbe: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "vgahw"
>(II) LoadModule: "vgahw"
>(II) Loading /opt/X11R7/lib/xorg/modules//libvgahw.so
>(II) Module vgahw: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 0.1.0
>	ABI class: X.Org Video Driver, version 2.0
>(**) intel(0): Depth 24, (--) framebuffer bpp 32
>(==) intel(0): RGB weight 888
>(==) intel(0): Default visual is TrueColor
>(**) intel(0): Option "AccelMethod" "exa"
>(**) intel(0): Option "XVideo" "false"
>(**) intel(0): Option "ModeDebug" "on"
>(II) intel(0): Integrated Graphics Chipset: Intel(R) 965Q
>(--) intel(0): Chipset: "965Q"
>(--) intel(0): Linear framebuffer at 0xC0000000
>(--) intel(0): IO registers at addr 0xDFE00000
>(II) intel(0): Hardware state on X startup:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x00000000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0x0008001c (disabled, pipe A, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00001d9c
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80008000 (enabled, pipe A, -hsync, -vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0x0008001c (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000000
>(II) intel(0):             DSPACNTR: 0x48000000 (disabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00000280 (640 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00000000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEASTAT: 0x00000000 (status:)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000003
>(II) intel(0):             HTOTAL_A: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_A: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_A: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_A: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_A: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_A: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0x01000000 (disabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00000000 (0 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00000000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x027f01df (640, 480)
>(II) intel(0):            PIPEBSTAT: 0x00000206 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0x84800c00 (enabled, non-dvo, VGA, default clock, DAC/serial mode, p1 = 8, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000303
>(II) intel(0):             HTOTAL_B: 0x031f027f (640 active, 800 total)
>(II) intel(0):             HBLANK_B: 0x03170287 (648 start, 792 end)
>(II) intel(0):              HSYNC_B: 0x02ef028f (656 start, 752 end)
>(II) intel(0):             VTOTAL_B: 0x020c01df (480 active, 525 total)
>(II) intel(0):             VBLANK_B: 0x020401e7 (488 start, 517 end)
>(II) intel(0):              VSYNC_B: 0x01eb01e9 (490 start, 492 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x0000008e (enabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x04
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x20
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x07
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x8e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x20
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): pipe B dot 25200 n 3 m1 17 m2 8 p1 8 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): 2 display pipes available.
>(**) intel(0): Using EXA for acceleration
>(II) Loading sub module "ddc"
>(II) LoadModule: "ddc"(II) Module "ddc" already built-in
>(II) Loading sub module "i2c"
>(II) LoadModule: "i2c"(II) Module "i2c" already built-in
>(II) intel(0): Output VGA using monitor section Monitor0
>(II) intel(0): I2C bus "CRTDDC_A" initialized.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOB" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOB:SDVO Controller B" registered at address 0x70.
>(II) intel(0): I2C bus "SDVOB DDC Bus" initialized.
>(II) intel(0): SDVOB: W: 02                         (SDVO_CMD_GET_DEVICE_CAPS)
>(II) intel(0): SDVOB: R: 02 3C 06 01 01 01 01 00 (Success)
>(II) intel(0): SDVOB: W: 9D                         (SDVO_CMD_GET_SUPP_ENCODE)
>(II) intel(0): SDVOB: R: 00 00                   (Not supported)
>(II) intel(0): Output TMDS-1 has no monitor section
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 1D                         (SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE)
>(II) intel(0): SDVOB: R: C4 09 20 4E             (Success)
>(II) intel(0): SDVOB: device VID/DID: 02:3C.06, clock range 25.0MHz - 200.0MHz
>(II) intel(0): SDVOB: 1 input channel
>(II) intel(0): SDVOB: TMDS0 output reported
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized.
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at address 0x72.
>(II) intel(0): No SDVO device found on SDVOC
>(II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed.
>(II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed.
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(II) intel(0): SDVOB: R: 01                      (Success)
>(II) intel(0): Current clock rate multiplier: 1
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R: 00 00                   (Success)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOB: W: 13                         (SDVO_CMD_GET_INPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Success)
>(II) intel(0): SDVOB: W: 19                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2)
>(II) intel(0): SDVOB: R: 18 88 36 00 18 00 00 00 (Success)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(II) intel(0): SDVOB: R:                         (Success)
>(II) intel(0): I2C device "CRTDDC_A:ddc2" registered at address 0xA0.
>(II) intel(0): EDID for output VGA
>(II) intel(0): Manufacturer: DEL  Model: 3010  Serial#: 1145195083
>(II) intel(0): Year: 2004  Week: 10
>(II) intel(0): EDID Version: 1.3
>(II) intel(0): Analog Display Input,  Input Voltage Level: 0.700/0.300 V
>(II) intel(0): Sync:  Separate  Composite  SyncOnGreen
>(II) intel(0): Max H-Image Size [cm]: horiz.: 34  vert.: 27
>(II) intel(0): Gamma: 2.20
>(II) intel(0): DPMS capabilities: StandBy Suspend Off; RGB/Color Display
>(II) intel(0): Default color space is primary color space
>(II) intel(0): First detailed timing is preferred mode
>(II) intel(0): redX: 0.646 redY: 0.359   greenX: 0.278 greenY: 0.612
>(II) intel(0): blueX: 0.145 blueY: 0.117   whiteX: 0.310 whiteY: 0.330
>(II) intel(0): Supported VESA Video Modes:
>(II) intel(0): 720x400@70Hz
>(II) intel(0): 640x480@60Hz
>(II) intel(0): 640x480@75Hz
>(II) intel(0): 800x600@60Hz
>(II) intel(0): 800x600@75Hz
>(II) intel(0): 1024x768@60Hz
>(II) intel(0): 1024x768@75Hz
>(II) intel(0): 1280x1024@75Hz
>(II) intel(0): Manufacturer's mask: 0
>(II) intel(0): Supported Future Video Modes:
>(II) intel(0): #0: hsize: 1152  vsize 864  refresh: 75  vid: 20337
>(II) intel(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid: 32897
>(II) intel(0): Supported additional Video Mode:
>(II) intel(0): clock: 108.0 MHz   Image Size:  338 x 270 mm
>(II) intel(0): h_active: 1280  h_sync: 1328  h_sync_end 1440 h_blank_end 1688 h_border: 0
>(II) intel(0): v_active: 1024  v_sync: 1025  v_sync_end 1028 v_blanking: 1066 v_border: 0
>(II) intel(0): Serial No: F0848432DBJK
>(II) intel(0): Monitor name: DELL 1703FP
>(II) intel(0): Ranges: V min: 56  V max: 76 Hz, H min: 30  H max: 80 kHz, PixClock max 140 MHz
>(II) intel(0): EDID (in hex):
>(II) intel(0): 	00ffffffffffff0010ac10304b4a4244
>(II) intel(0): 	0a0e01030e221b78ee8706a55c479c25
>(II) intel(0): 	1e4f54a54b00714f8180010101010101
>(II) intel(0): 	010101010101302a009851002a403070
>(II) intel(0): 	1300520e1100001e000000ff00463038
>(II) intel(0): 	343834333244424a4b0a000000fc0044
>(II) intel(0): 	454c4c203137303346500a20000000fd
>(II) intel(0): 	00384c1e500e000a20202020202000b9
>(II) intel(0): EDID vendor "DEL", prod id 12304
>(II) intel(0): Using EDID range info for horizontal sync
>(II) intel(0): Using EDID range info for vertical refresh
>(II) intel(0): Printing DDC gathered Modelines:
>(II) intel(0): Modeline "1280x1024"x0.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "800x600"x0.0   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x0.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x0.0   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): Modeline "1280x1024"x0.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) intel(0): Modeline "1024x768"x0.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x0.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "1152x864"x74.8  104.00  1152 1224 1344 1536  864 867 871 905 -hsync +vsync (67.7 kHz)
>(II) intel(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>(II) intel(0): EDID vendor "DEL", prod id 12304
>(II) intel(0): Not using default mode "640x350" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "720x400" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "640x480" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "800x600" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1024x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x864" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x960" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1280x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1200" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1792x1344" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1856x1392" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "832x624" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1152x768" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1400x1050" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1600x1024" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "1920x1440" (bad mode clock/interlace/doublescan)
>(II) intel(0): Not using default mode "2048x1536" (width too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (width too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (width too large for virtual size)
>(II) intel(0): Printing probed modes for output VGA
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): Modeline "1280x1024"x75.0  135.00  1280 1296 1440 1688  1024 1025 1028 1066 +hsync +vsync (80.0 kHz)
>(II) intel(0): Modeline "1280x1024"x59.9  109.00  1280 1368 1496 1712  1024 1027 1034 1063 -hsync +vsync (63.7 kHz)
>(II) intel(0): Modeline "1152x864"x74.8  104.00  1152 1224 1344 1536  864 867 871 905 -hsync +vsync (67.7 kHz)
>(II) intel(0): Modeline "1024x768"x75.1   78.80  1024 1040 1136 1312  768 769 772 800 +hsync +vsync (60.1 kHz)
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x75.0   49.50  800 816 896 1056  600 601 604 625 +hsync +vsync (46.9 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x75.0   31.50  640 656 720 840  480 481 484 500 -hsync -vsync (37.5 kHz)
>(II) intel(0): Modeline "640x480"x60.0   25.20  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Modeline "720x400"x70.1   28.32  720 738 846 900  400 412 414 449 -hsync +vsync (31.5 kHz)
>(II) intel(0): SDVOB: W: 0B                         (SDVO_CMD_GET_ATTACHED_DISPLAYS)
>(II) intel(0): SDVOB: R: 01 00                   (Success)
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" registered at address 0xA0.
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(II) intel(0): SDVOB: W: 7A 02                      (SDVO_CMD_SET_CONTROL_BUS_SWITCH)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(II) intel(0): I2C device "SDVOB DDC Bus:ddc2" removed.
>(II) intel(0): EDID for output TMDS-1
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "640x480"x0.0   31.50  640 664 704 832  480 489 491 520 -hsync -vsync (37.9 kHz)
>(II) intel(0): chosen: dotclock 31500 vco 2520000 ((m 105, m1 17, m2 8), n 2, (p 80, p1 8, p2 10))
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): Not using default mode "640x350" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "720x400" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "640x480" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "800x600" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1024x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x864" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x960" (hsync out of range)
>(II) intel(0): Not using default mode "1280x960" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1280x1024" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (hsync out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1200" (vrefresh out of range)
>(II) intel(0): Not using default mode "1792x1344" (hsync out of range)
>(II) intel(0): Not using default mode "1792x1344" (vrefresh out of range)
>(II) intel(0): Not using default mode "1856x1392" (hsync out of range)
>(II) intel(0): Not using default mode "1856x1392" (vrefresh out of range)
>(II) intel(0): Not using default mode "1920x1440" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "832x624" (vrefresh out of range)
>(II) intel(0): Not using default mode "1152x768" (vrefresh out of range)
>(II) intel(0): Not using default mode "1400x1050" (hsync out of range)
>(II) intel(0): Not using default mode "1400x1050" (vrefresh out of range)
>(II) intel(0): Not using default mode "1600x1024" (hsync out of range)
>(II) intel(0): Not using default mode "1920x1440" (vrefresh out of range)
>(II) intel(0): Not using default mode "2048x1536" (width too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (width too large for virtual size)
>(II) intel(0): Not using default mode "2048x1536" (width too large for virtual size)
>(II) intel(0): Printing probed modes for output TMDS-1
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Modeline "800x600"x60.3   40.00  800 840 968 1056  600 601 605 628 +hsync +vsync (37.9 kHz)
>(II) intel(0): Modeline "640x480"x59.9   25.18  640 656 752 800  480 490 492 525 -hsync -vsync (31.5 kHz)
>(II) intel(0): Output VGA connected
>(II) intel(0): Output TMDS-1 connected
>(II) intel(0): Output VGA using initial mode 1280x1024
>(II) intel(0): Output TMDS-1 using initial mode 1024x768
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 21 01                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): detected 512 kB GTT.
>(II) intel(0): detected 7676 kB stolen memory.
>(==) intel(0): video overlay key set to 0x101fe
>(==) intel(0): Will not try to enable page flipping
>(==) intel(0): Triple buffering disabled
>(==) intel(0): Intel XvMC decoder disabled
>(==) intel(0): Using gamma correction (1.0, 1.0, 1.0)
>(**) intel(0): Display dimensions: (340, 270) mm
>(**) intel(0): DPI set to (149, 188)
>(II) Loading sub module "fb"
>(II) LoadModule: "fb"
>(II) Loading /opt/X11R7/lib/xorg/modules//libfb.so
>(II) Module fb: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 1.0.0
>	ABI class: X.Org ANSI C Emulation, version 0.3
>(II) Loading sub module "exa"
>(II) LoadModule: "exa"
>(II) Loading /opt/X11R7/lib/xorg/modules//libexa.so
>(II) Module exa: vendor="X.Org Foundation"
>	compiled for 1.4.2, module version = 2.2.0
>	ABI class: X.Org Video Driver, version 2.0
>(II) Loading sub module "ramdac"
>(II) LoadModule: "ramdac"(II) Module "ramdac" already built-in
>(II) intel(0): Comparing regs from server start up to After PreInit
>(WW) intel(0): Register 0x61114 (PORT_HOTPLUG_STAT) changed from 0x00000000 to 0x00000b00
>(==) Depth 24 pixmap format is 32 bpp
>(II) do I need RAC?  No, I don't.
>(II) resource ranges after preInit:
>	[0] 0	0	0xc0000000 - 0xcfffffff (0x10000000) MS[B]
>	[1] 0	0	0xdfe00000 - 0xdfefffff (0x100000) MS[B]
>	[2] -1	0	0x00100000 - 0x3fffffff (0x3ff00000) MX[B]E(B)
>	[3] -1	0	0x000f0000 - 0x000fffff (0x10000) MX[B]
>	[4] -1	0	0x000c0000 - 0x000effff (0x30000) MX[B]
>	[5] -1	0	0x00000000 - 0x0009ffff (0xa0000) MX[B]
>	[6] -1	0	0xdfbf0000 - 0xdfbfffff (0x10000) MX[B]
>	[7] -1	0	0xdfdfbb00 - 0xdfdfbbff (0x100) MX[B]
>	[8] -1	0	0xff980800 - 0xff980bff (0x400) MX[B]
>	[9] -1	0	0xdfdfc000 - 0xdfdfffff (0x4000) MX[B]
>	[10] -1	0	0xdfdfbc00 - 0xdfdfbfff (0x400) MX[B]
>	[11] -1	0	0xdff00000 - 0xdfffffff (0x100000) MX[B](B)
>	[12] -1	0	0xc0000000 - 0xcfffffff (0x10000000) MX[B](B)
>	[13] -1	0	0xdfe00000 - 0xdfefffff (0x100000) MX[B](B)
>	[14] 0	0	0x000a0000 - 0x000affff (0x10000) MS[B](OprD)
>	[15] 0	0	0x000b0000 - 0x000b7fff (0x8000) MS[B](OprD)
>	[16] 0	0	0x000b8000 - 0x000bffff (0x8000) MS[B](OprD)
>	[17] 0	0	0x0000ecb8 - 0x0000ecbf (0x8) IS[B]
>	[18] -1	0	0x0000ffff - 0x0000ffff (0x1) IX[B]
>	[19] -1	0	0x00000000 - 0x000000ff (0x100) IX[B]
>	[20] -1	0	0x0000ecd0 - 0x0000ecdf (0x10) IX[B]
>	[21] -1	0	0x0000fed0 - 0x0000fedf (0x10) IX[B]
>	[22] -1	0	0x0000fe70 - 0x0000fe73 (0x4) IX[B]
>	[23] -1	0	0x0000fe60 - 0x0000fe67 (0x8) IX[B]
>	[24] -1	0	0x0000fe50 - 0x0000fe53 (0x4) IX[B]
>	[25] -1	0	0x0000fe40 - 0x0000fe47 (0x8) IX[B]
>	[26] -1	0	0x0000ece0 - 0x0000ecff (0x20) IX[B]
>	[27] -1	0	0x0000ecc0 - 0x0000eccf (0x10) IX[B]
>	[28] -1	0	0x0000fec0 - 0x0000fecf (0x10) IX[B]
>	[29] -1	0	0x0000fe30 - 0x0000fe33 (0x4) IX[B]
>	[30] -1	0	0x0000fe20 - 0x0000fe27 (0x8) IX[B]
>	[31] -1	0	0x0000fe10 - 0x0000fe13 (0x4) IX[B]
>	[32] -1	0	0x0000fe00 - 0x0000fe07 (0x8) IX[B]
>	[33] -1	0	0x0000ff40 - 0x0000ff5f (0x20) IX[B]
>	[34] -1	0	0x0000ff60 - 0x0000ff7f (0x20) IX[B]
>	[35] -1	0	0x0000ff80 - 0x0000ff9f (0x20) IX[B]
>	[36] -1	0	0x0000ff00 - 0x0000ff1f (0x20) IX[B]
>	[37] -1	0	0x0000ff20 - 0x0000ff3f (0x20) IX[B]
>	[38] -1	0	0x0000ecb8 - 0x0000ecbf (0x8) IX[B](B)
>	[39] 0	0	0x000003b0 - 0x000003bb (0xc) IS[B](OprU)
>	[40] 0	0	0x000003c0 - 0x000003df (0x20) IS[B](OprU)
>(II) intel(0): Kernel reported 208896 total, 1 used
>(II) intel(0): I830CheckAvailableMemory: 835580 kB available
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 11, (OK)
>drmOpenByBusid: drmOpenMinor returns 11
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(II) [drm] DRM interface version 1.3
>(II) [drm] DRM open master succeeded.
>(II) intel(0): [drm] Using the DRM lock SAREA also for drawables.
>(II) intel(0): [drm] framebuffer mapped by ddx driver
>(II) intel(0): [drm] added 1 reserved context for kernel
>(II) intel(0): X context handle = 0x1
>(II) intel(0): [drm] installed DRM signal handler
>(**) intel(0): Framebuffer compression disabled
>(**) intel(0): Tiling enabled
>(==) intel(0): VideoRam: 262144 KB
>(II) intel(0): Attempting memory allocation with tiled buffers.
>(II) intel(0): Tiled allocation successful.
>(II) intel(0): [drm] Registers = 0xdfe00000
>(II) intel(0): [drm] ring buffer = 0xc0000000
>(II) intel(0): [drm] mapped front buffer at 0xc0100000, handle = 0xc0100000
>(II) intel(0): [drm] mapped back buffer at 0xc3f80000, handle = 0xc3f80000
>(II) intel(0): [drm] mapped depth buffer at 0xc4f20000, handle = 0xc4f20000
>(II) intel(0): [drm] mapped classic textures at 0xc5ec0000, handle = 0xc5ec0000
>(II) intel(0): [drm] Initialized kernel agp heap manager, 33554432
>(II) intel(0): [dri] visual configs initialized
>(II) intel(0): Page Flipping disabled
>(WW) intel(0): Failed to set up write-combining range (0xc0000000,0x10000000)
>(II) intel(0): vgaHWGetIOBase: hwp->IOBase is 0x03d0, hwp->PIOOffset is 0x0000
>(II) EXA(0): Offscreen pixmap area of 49152000 bytes
>(II) EXA(0): Driver registered support for the following operations:
>(II)         Solid
>(II)         Copy
>(II)         Composite (RENDER acceleration)
>(==) intel(0): Backing store disabled
>(==) intel(0): Silken mouse enabled
>(II) intel(0): Initializing HW Cursor
>(II) intel(0): [DRI] installation complete
>(II) intel(0): SDVOB: W: 20                         (SDVO_CMD_GET_CLOCK_RATE_MULT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R: BF                      (Power on)
>(EE) intel(0): Couldn't get SDVO clock rate multiplier
>(II) intel(0): SDVOB: W: 04                         (SDVO_CMD_GET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R: 00 00                   (Power on)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 12                         (SDVO_CMD_GET_INPUT_TIMINGS_PART1)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Power on)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 18                         (SDVO_CMD_GET_OUTPUT_TIMINGS_PART1)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R: 64 19 00 40 41 00 26 30 (Power on)
>(II) intel(0): xf86BindGARTMemory: bind key 0 at 0x0077f000 (pgoffset 1919)
>(II) intel(0): xf86BindGARTMemory: bind key 1 at 0x010a0000 (pgoffset 4256)
>(II) intel(0): xf86BindGARTMemory: bind key 2 at 0x03f80000 (pgoffset 16256)
>(II) intel(0): xf86BindGARTMemory: bind key 3 at 0x04f20000 (pgoffset 20256)
>(II) intel(0): xf86BindGARTMemory: bind key 4 at 0x05ec0000 (pgoffset 24256)
>(II) intel(0): Fixed memory allocation layout:
>(II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB)
>(II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB)
>(II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB)
>(II) intel(0): 0x00032000-0x0003dfff: exa G965 state buffer (48 kB)
>(II) intel(0): 0x00100000-0x0109ffff: front buffer (16000 kB) X tiled
>(II) intel(0): 0x0077f000:            end of stolen memory
>(II) intel(0): 0x010a0000-0x03f7ffff: exa offscreen (48000 kB)
>(II) intel(0): 0x03f80000-0x04f1ffff: back buffer (16000 kB) X tiled
>(II) intel(0): 0x04f20000-0x05ebffff: depth buffer (16000 kB) Y tiled
>(II) intel(0): 0x05ec0000-0x07ebffff: classic textures (32768 kB)
>(II) intel(0): 0x10000000:            end of aperture
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): Mode for pipe A:
>(II) intel(0): Modeline "1280x1024"x60.0  108.00  1280 1328 1440 1688  1024 1025 1028 1066 +hsync +vsync (64.0 kHz)
>(II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p 20, p1 2, p2 10))
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): Mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0   65.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (48.4 kHz)
>(II) intel(0): Adjusted mode for pipe B:
>(II) intel(0): Modeline "1024x768"x60.0  130.00  1024 1048 1184 1344  768 771 777 806 -hsync -vsync (96.7 kHz)
>(II) intel(0): chosen: dotclock 129600 vco 2592000 ((m 81, m1 12, m2 9), n 1, (p 20, p1 2, p2 10))
>(II) intel(0): SDVOB: W: 07 01 00 00 00             (SDVO_CMD_SET_IN_OUT_MAP)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 11 01 00                   (SDVO_CMD_SET_TARGET_OUTPUT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 16 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_OUTPUT_TIMINGS_PART1)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 10 00                      (SDVO_CMD_SET_TARGET_INPUT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 14 64 19 00 40 41 00 26 30 (SDVO_CMD_SET_INPUT_TIMINGS_PART1)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 21 02                      (SDVO_CMD_SET_CLOCK_RATE_MULT)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R: B7                      (Power on)
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): Hardware state at EnterVT:
>(II) intel(0): DumpRegsBegin
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6)
>(II) intel(0):        VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, p2 = 2)
>(II) intel(0):            DPLL_TEST: 0x00010001 ()
>(II) intel(0):         CACHE_MODE_0: 0x00006800
>(II) intel(0):              D_STATE: 0x00000000
>(II) intel(0):        DSPCLK_GATE_D: 0x00040000 (clock gates disabled: DSSUNIT)
>(II) intel(0):       RENCLK_GATE_D1: 0x70810000
>(II) intel(0):       RENCLK_GATE_D2: 0x00000000
>(II) intel(0):                SDVOB: 0xc000009c (enabled, pipe B, stall disabled, detected)
>(II) intel(0):                SDVOC: 0x00080018 (disabled, pipe A, stall disabled, not detected)
>(II) intel(0):              SDVOUDI: 0x00000000
>(II) intel(0):               DSPARB: 0x00002fb0
>(II) intel(0):               DSPFW1: 0x1f8f0f0f
>(II) intel(0):               DSPFW2: 0x00000f0f
>(II) intel(0):               DSPFW3: 0x00000000
>(II) intel(0):                 ADPA: 0x80000018 (enabled, pipe A, +hsync, +vsync)
>(II) intel(0):                 LVDS: 0x00000000 (disabled, pipe A, 18 bit, 1 channel)
>(II) intel(0):                 DVOA: 0x00000000 (disabled, pipe A, no stall, -hsync, -vsync)
>(II) intel(0):                 DVOB: 0xc000009c (enabled, pipe B, no stall, +hsync, +vsync)
>(II) intel(0):                 DVOC: 0x00080018 (disabled, pipe A, no stall, +hsync, +vsync)
>(II) intel(0):          DVOA_SRCDIM: 0x00000000
>(II) intel(0):          DVOB_SRCDIM: 0x00000000
>(II) intel(0):          DVOC_SRCDIM: 0x00000000
>(II) intel(0):           PP_CONTROL: 0x00000000 (power target: off)
>(II) intel(0):            PP_STATUS: 0x00000000 (off, not ready, sequencing idle)
>(II) intel(0):         PFIT_CONTROL: 0x00000000
>(II) intel(0):      PFIT_PGM_RATIOS: 0x00000000
>(II) intel(0):      PORT_HOTPLUG_EN: 0x00000020
>(II) intel(0):    PORT_HOTPLUG_STAT: 0x00000b00
>(II) intel(0):             DSPACNTR: 0xd8000400 (enabled, pipe A)
>(II) intel(0):           DSPASTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPAPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPASIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPABASE: 0x00000000
>(II) intel(0):             DSPASURF: 0x00100000
>(II) intel(0):          DSPATILEOFF: 0x00000000
>(II) intel(0):            PIPEACONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEASRC: 0x04ff03ff (1280, 1024)
>(II) intel(0):            PIPEASTAT: 0x00000207 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS)
>(II) intel(0):         FBC_CFB_BASE: 0xffffffff
>(II) intel(0):          FBC_LL_BASE: 0xffffffff
>(II) intel(0):          FBC_CONTROL: 0xffffffff
>(II) intel(0):          FBC_COMMAND: 0xffffffff
>(II) intel(0):           FBC_STATUS: 0xffffffff
>(II) intel(0):         FBC_CONTROL2: 0xffffffff
>(II) intel(0):        FBC_FENCE_OFF: 0xffffffff
>(II) intel(0):          FBC_MOD_NUM: 0xffffffff
>(II) intel(0):                 FPA0: 0x00020e08 (n = 2, m1 = 14, m2 = 8)
>(II) intel(0):                 FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_A: 0x94020c00 (enabled, non-dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_A_MD: 0x00000000
>(II) intel(0):             HTOTAL_A: 0x069704ff (1280 active, 1688 total)
>(II) intel(0):             HBLANK_A: 0x069704ff (1280 start, 1688 end)
>(II) intel(0):              HSYNC_A: 0x059f052f (1328 start, 1440 end)
>(II) intel(0):             VTOTAL_A: 0x042903ff (1024 active, 1066 total)
>(II) intel(0):             VBLANK_A: 0x042903ff (1024 start, 1066 end)
>(II) intel(0):              VSYNC_A: 0x04030400 (1025 start, 1028 end)
>(II) intel(0):            BCLRPAT_A: 0x00000000
>(II) intel(0):         VSYNCSHIFT_A: 0x00000000
>(II) intel(0):             DSPBCNTR: 0xd9000400 (enabled, pipe B)
>(II) intel(0):           DSPBSTRIDE: 0x00002000 (8192 bytes)
>(II) intel(0):              DSPBPOS: 0x00000000 (0, 0)
>(II) intel(0):             DSPBSIZE: 0x00000000 (1, 1)
>(II) intel(0):             DSPBBASE: 0x00000000
>(II) intel(0):             DSPBSURF: 0x00100000
>(II) intel(0):          DSPBTILEOFF: 0x00000000
>(II) intel(0):            PIPEBCONF: 0xc0000000 (enabled, active)
>(II) intel(0):             PIPEBSRC: 0x03ff02ff (1024, 768)
>(II) intel(0):            PIPEBSTAT: 0x00000206 (status: VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS)
>(II) intel(0):                 FPB0: 0x00010c09 (n = 1, m1 = 12, m2 = 9)
>(II) intel(0):                 FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8)
>(II) intel(0):               DPLL_B: 0xd4020c00 (enabled, dvo, default clock, DAC/serial mode, p1 = 2, p2 = 10)
>(II) intel(0):            DPLL_B_MD: 0x00000100
>(II) intel(0):             HTOTAL_B: 0x053f03ff (1024 active, 1344 total)
>(II) intel(0):             HBLANK_B: 0x053f03ff (1024 start, 1344 end)
>(II) intel(0):              HSYNC_B: 0x049f0417 (1048 start, 1184 end)
>(II) intel(0):             VTOTAL_B: 0x032502ff (768 active, 806 total)
>(II) intel(0):             VBLANK_B: 0x032502ff (768 start, 806 end)
>(II) intel(0):              VSYNC_B: 0x03080302 (771 start, 777 end)
>(II) intel(0):            BCLRPAT_B: 0x00000000
>(II) intel(0):         VSYNCSHIFT_B: 0x00000000
>(II) intel(0):    VCLK_DIVISOR_VGA0: 0x00031108
>(II) intel(0):    VCLK_DIVISOR_VGA1: 0x00031406
>(II) intel(0):        VCLK_POST_DIV: 0x00020002
>(II) intel(0):             VGACNTRL: 0x80000000 (disabled)
>(II) intel(0):               TV_CTL: 0x00000000
>(II) intel(0):               TV_DAC: 0x00000000
>(II) intel(0):             TV_CSC_Y: 0x00000000
>(II) intel(0):            TV_CSC_Y2: 0x00000000
>(II) intel(0):             TV_CSC_U: 0x00000000
>(II) intel(0):            TV_CSC_U2: 0x00000000
>(II) intel(0):             TV_CSC_V: 0x00000000
>(II) intel(0):            TV_CSC_V2: 0x00000000
>(II) intel(0):         TV_CLR_KNOBS: 0x00000000
>(II) intel(0):         TV_CLR_LEVEL: 0x00000000
>(II) intel(0):           TV_H_CTL_1: 0x00000000
>(II) intel(0):           TV_H_CTL_2: 0x00000000
>(II) intel(0):           TV_H_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_1: 0x00000000
>(II) intel(0):           TV_V_CTL_2: 0x00000000
>(II) intel(0):           TV_V_CTL_3: 0x00000000
>(II) intel(0):           TV_V_CTL_4: 0x00000000
>(II) intel(0):           TV_V_CTL_5: 0x00000000
>(II) intel(0):           TV_V_CTL_6: 0x00000000
>(II) intel(0):           TV_V_CTL_7: 0x00000000
>(II) intel(0):          TV_SC_CTL_1: 0x00000000
>(II) intel(0):          TV_SC_CTL_2: 0x00000000
>(II) intel(0):          TV_SC_CTL_3: 0x00000000
>(II) intel(0):           TV_WIN_POS: 0x00000000
>(II) intel(0):          TV_WIN_SIZE: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_1: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_2: 0x00000000
>(II) intel(0):      TV_FILTER_CTL_3: 0x00000000
>(II) intel(0):        TV_CC_CONTROL: 0x00000000
>(II) intel(0):           TV_CC_DATA: 0x00000000
>(II) intel(0):          TV_H_LUMA_0: 0x00000000
>(II) intel(0):         TV_H_LUMA_59: 0x00000000
>(II) intel(0):        TV_H_CHROMA_0: 0x00000000
>(II) intel(0):       TV_H_CHROMA_59: 0x00000000
>(II) intel(0):              MI_MODE: 0x00000200
>(II) intel(0):         MI_ARB_STATE: 0x00000044
>(II) intel(0):       MI_RDRET_STATE: 0x00000000
>(II) intel(0):              ECOSKPD: 0x00000307
>(II) intel(0):                 DP_B: 0x00000000
>(II) intel(0):       DPB_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPB_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_C: 0x00000000
>(II) intel(0):       DPC_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPC_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 DP_D: 0x00000000
>(II) intel(0):       DPD_AUX_CH_CTL: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA1: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA2: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA3: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA4: 0x00000000
>(II) intel(0):     DPD_AUX_CH_DATA5: 0x00000000
>(II) intel(0):                 SR00: 0x03
>(II) intel(0):                 SR01: 0x00
>(II) intel(0):                 SR02: 0x03
>(II) intel(0):                 SR03: 0x04
>(II) intel(0):                 SR04: 0x02
>(II) intel(0):                 SR05: 0x00
>(II) intel(0):                 SR06: 0x00
>(II) intel(0):                 SR07: 0x00
>(II) intel(0):                  MSR: 0x67
>(II) intel(0):                  ARX: 0x30
>(II) intel(0):                 AR00: 0x00
>(II) intel(0):                 AR01: 0x01
>(II) intel(0):                 AR02: 0x02
>(II) intel(0):                 AR03: 0x03
>(II) intel(0):                 AR04: 0x04
>(II) intel(0):                 AR05: 0x05
>(II) intel(0):                 AR06: 0x06
>(II) intel(0):                 AR07: 0x07
>(II) intel(0):                 AR08: 0x08
>(II) intel(0):                 AR09: 0x09
>(II) intel(0):                 AR0a: 0x0a
>(II) intel(0):                 AR0b: 0x0b
>(II) intel(0):                 AR0c: 0x0c
>(II) intel(0):                 AR0d: 0x0d
>(II) intel(0):                 AR0e: 0x0e
>(II) intel(0):                 AR0f: 0x0f
>(II) intel(0):                 AR10: 0x0c
>(II) intel(0):                 AR11: 0x00
>(II) intel(0):                 AR12: 0x07
>(II) intel(0):                 AR13: 0x08
>(II) intel(0):                 AR14: 0x00
>(II) intel(0):                 CR00: 0x5f
>(II) intel(0):                 CR01: 0x4f
>(II) intel(0):                 CR02: 0x50
>(II) intel(0):                 CR03: 0x82
>(II) intel(0):                 CR04: 0x55
>(II) intel(0):                 CR05: 0x81
>(II) intel(0):                 CR06: 0xbf
>(II) intel(0):                 CR07: 0x1f
>(II) intel(0):                 CR08: 0x00
>(II) intel(0):                 CR09: 0x4f
>(II) intel(0):                 CR0a: 0x0d
>(II) intel(0):                 CR0b: 0x0e
>(II) intel(0):                 CR0c: 0x00
>(II) intel(0):                 CR0d: 0x00
>(II) intel(0):                 CR0e: 0x00
>(II) intel(0):                 CR0f: 0x00
>(II) intel(0):                 CR10: 0x9c
>(II) intel(0):                 CR11: 0x0e
>(II) intel(0):                 CR12: 0x8f
>(II) intel(0):                 CR13: 0x28
>(II) intel(0):                 CR14: 0x1f
>(II) intel(0):                 CR15: 0x96
>(II) intel(0):                 CR16: 0xb9
>(II) intel(0):                 CR17: 0xa3
>(II) intel(0):                 CR18: 0xff
>(II) intel(0):                 CR19: 0x00
>(II) intel(0):                 CR1a: 0x00
>(II) intel(0):                 CR1b: 0x00
>(II) intel(0):                 CR1c: 0x00
>(II) intel(0):                 CR1d: 0x00
>(II) intel(0):                 CR1e: 0x00
>(II) intel(0):                 CR1f: 0x00
>(II) intel(0):                 CR20: 0x00
>(II) intel(0):                 CR21: 0x00
>(II) intel(0):                 CR22: 0x00
>(II) intel(0):                 CR23: 0x00
>(II) intel(0):                 CR24: 0x00
>(II) intel(0): pipe A dot 108000 n 2 m1 14 m2 8 p1 2 p2 10
>(II) intel(0): pipe B dot 129600 n 1 m1 12 m2 9 p1 2 p2 10
>(II) intel(0): DumpRegsEnd
>(II) intel(0): Output configuration:
>(II) intel(0):   Pipe A is on
>(II) intel(0):   Display plane A is now enabled and connected to pipe A.
>(II) intel(0):   Pipe B is on
>(II) intel(0):   Display plane B is now enabled and connected to pipe B.
>(II) intel(0):   Output VGA is connected to pipe A
>(II) intel(0):   Output TMDS-1 is connected to pipe B
>(II) intel(0): [drm] dma control initialized, using IRQ 16
>(II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message.
>(**) Option "dpms"
>(**) intel(0): DPMS enabled
>(II) intel(0): direct rendering: Enabled
>(--) RandR disabled
>(II) Initializing built-in extension MIT-SHM
>(II) Initializing built-in extension XInputExtension
>(II) Initializing built-in extension XTEST
>(II) Initializing built-in extension XKEYBOARD
>(II) Initializing built-in extension XC-APPGROUP
>(II) Initializing built-in extension XAccessControlExtension
>(II) Initializing built-in extension SECURITY
>(II) Initializing built-in extension XINERAMA
>(II) Initializing built-in extension XFIXES
>(II) Initializing built-in extension XFree86-Bigfont
>(II) Initializing built-in extension RENDER
>(II) Initializing built-in extension RANDR
>(II) Initializing built-in extension COMPOSITE
>(II) Initializing built-in extension DAMAGE
>(II) Initializing built-in extension XEVIE
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: Searching for BusID pci:0000:00:02.0
>drmOpenDevice: node name is /dev/dri/card0
>drmOpenDevice: open result is 12, (OK)
>drmOpenByBusid: drmOpenMinor returns 12
>drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0
>(WW) AIGLX: 3D driver claims to not support visual 0x23
>(WW) AIGLX: 3D driver claims to not support visual 0x24
>(WW) AIGLX: 3D driver claims to not support visual 0x25
>(WW) AIGLX: 3D driver claims to not support visual 0x26
>(WW) AIGLX: 3D driver claims to not support visual 0x27
>(WW) AIGLX: 3D driver claims to not support visual 0x28
>(WW) AIGLX: 3D driver claims to not support visual 0x29
>(WW) AIGLX: 3D driver claims to not support visual 0x2a
>(WW) AIGLX: 3D driver claims to not support visual 0x2b
>(WW) AIGLX: 3D driver claims to not support visual 0x2c
>(WW) AIGLX: 3D driver claims to not support visual 0x2d
>(WW) AIGLX: 3D driver claims to not support visual 0x2e
>(WW) AIGLX: 3D driver claims to not support visual 0x2f
>(WW) AIGLX: 3D driver claims to not support visual 0x30
>(WW) AIGLX: 3D driver claims to not support visual 0x31
>(WW) AIGLX: 3D driver claims to not support visual 0x32
>(II) AIGLX: Loaded and initialized /opt/X11R7/lib/dri/i965_dri.so
>(II) GLX: Initialized DRI GL provider for screen 0
>(II) intel(0): Setting screen physical size to 338 x 270
>(**) Option "Protocol" "IMPS/2"
>(**) Mouse0: Device: "/dev/input/mice"
>(**) Mouse0: Protocol: "IMPS/2"
>(**) Option "CorePointer"
>(**) Mouse0: always reports core events
>(**) Option "Device" "/dev/input/mice"
>(**) Option "Emulate3Buttons" "yes"
>(**) Mouse0: Emulate3Buttons, Emulate3Timeout: 50
>(**) Option "ZAxisMapping" "4 5"
>(**) Mouse0: ZAxisMapping: buttons 4 and 5
>(**) Mouse0: Buttons: 9
>(**) Mouse0: Sensitivity: 1
>(**) Option "CoreKeyboard"
>(**) Keyboard0: always reports core events
>(**) Option "Protocol" "standard"
>(**) Keyboard0: Protocol: standard
>(**) Option "AutoRepeat" "500 30"
>(**) Option "XkbRules" "xorg"
>(**) Keyboard0: XkbRules: "xorg"
>(**) Option "XkbModel" "pc105"
>(**) Keyboard0: XkbModel: "pc105"
>(**) Option "XkbLayout" "us"
>(**) Keyboard0: XkbLayout: "us"
>(**) Option "CustomKeycodes" "off"
>(**) Keyboard0: CustomKeycodes disabled
>(II) evaluating device (Keyboard0)
>(II) XINPUT: Adding extended input device "Keyboard0" (type: KEYBOARD)
>(II) evaluating device (Mouse0)
>(II) XINPUT: Adding extended input device "Mouse0" (type: MOUSE)
>(II) Mouse0: ps2EnableDataReporting: succeeded
>Could not init font path element unix/:7100, removing from list!
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R: B7                      (Power on)
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) LoadModule: "evdev"
>(II) Loading /opt/X11R7/lib/xorg/modules/input//evdev_drv.so
>(II) Module evdev: vendor="X.Org Foundation"
>	compiled for 0.0.0, module version = 1.0.0
>	Module class: X.Org XInput Driver
>	ABI class: X.Org XInput driver, version 2.0
>(**) ATEN ATEN  CS-1716/08/04: always reports core events
>(**) ATEN ATEN  CS-1716/08/04: Device: "/dev/input/event3"
>(II) ATEN ATEN  CS-1716/08/04: Found x and y relative axes
>(II) ATEN ATEN  CS-1716/08/04: Found mouse buttons
>(II) ATEN ATEN  CS-1716/08/04: Configuring as mouse
>(II) XINPUT: Adding extended input device "ATEN ATEN  CS-1716/08/04" (type: MOUSE)
>(**) ATEN ATEN  CS-1716/08/04: always reports core events
>(**) ATEN ATEN  CS-1716/08/04: Device: "/dev/input/event2"
>(II) ATEN ATEN  CS-1716/08/04: Found keys
>(II) ATEN ATEN  CS-1716/08/04: Configuring as keyboard
>(II) XINPUT: Adding extended input device "ATEN ATEN  CS-1716/08/04" (type: KEYBOARD)
>(**) Option "xkb_rules" "base"
>(**) ATEN ATEN  CS-1716/08/04: xkb_rules: "base"
>(**) Option "xkb_model" "evdev"
>(**) ATEN ATEN  CS-1716/08/04: xkb_model: "evdev"
>(**) Option "xkb_layout" "us"
>(**) ATEN ATEN  CS-1716/08/04: xkb_layout: "us"
>(II) intel(0): SDVOB: W: 05 00 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)
>(II) intel(0): SDVOB: W: 03                         (SDVO_CMD_GET_TRAINED_INPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R: B7                      (Power on)
>(II) intel(0): SDVOB: W: 05 01 00                   (SDVO_CMD_SET_ACTIVE_OUTPUTS)
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to write to SDVOCTRL_E for SDVOB Slave 0x70.
>(EE) intel(0): Unable to read from SDVOCTRL_E for SDVOB slave 0x70.
>(II) intel(0): SDVOB: R:                         (Power on)

Actions: View

Attachments on bug 16631: 17559 | 17560 | 18913 | 18969 | 19230

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.