Attachment 135694 Details for Bug 102929 – Patch for 4.13 reverting bad commit

[patch] Patch for 4.13 reverting bad commit

0001-Revert-drm-i915-Pass-intel_plane-and-intel_crtc-to-p.patch (text/plain), 18.89 KB, created by Felix W on 2017-11-24 12:27:02 UTC

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Creator: Felix W

Created: 2017-11-24 12:27:02 UTC

Size: 18.89 KB

patch

obsolete

>From 0a39b592033c6ce414834450617bf00a1b7c7504 Mon Sep 17 00:00:00 2001
>From: Felix <felix@localhost>
>Date: Fri, 24 Nov 2017 09:51:40 +0100
>Subject: [PATCH 1/2] Revert "drm/i915: Pass intel_plane and intel_crtc to
> plane hooks"
>
>This reverts commit 282dbf9b017bc6d5fdaeadf14e534c2fe22fee2d.
>---
> drivers/gpu/drm/i915/intel_atomic_plane.c |   6 +-
> drivers/gpu/drm/i915/intel_display.c      |  78 +++++++++++----------
> drivers/gpu/drm/i915/intel_drv.h          |   8 +--
> drivers/gpu/drm/i915/intel_sprite.c       | 110 +++++++++++++++++-------------
> 4 files changed, 112 insertions(+), 90 deletions(-)
>
>diff --git a/drivers/gpu/drm/i915/intel_atomic_plane.c b/drivers/gpu/drm/i915/intel_atomic_plane.c
>index 4325cb0a04f5..8107ff3721dd 100644
>--- a/drivers/gpu/drm/i915/intel_atomic_plane.c
>+++ b/drivers/gpu/drm/i915/intel_atomic_plane.c
>@@ -169,7 +169,7 @@ int intel_plane_atomic_check_with_state(struct intel_crtc_state *crtc_state,
> 	}
> 
> 	intel_state->base.visible = false;
>-	ret = intel_plane->check_plane(intel_plane, crtc_state, intel_state);
>+	ret = intel_plane->check_plane(plane, crtc_state, intel_state);
> 	if (ret)
> 		return ret;
> 
>@@ -219,14 +219,14 @@ static void intel_plane_atomic_update(struct drm_plane *plane,
> 		trace_intel_update_plane(plane,
> 					 to_intel_crtc(crtc));
> 
>-		intel_plane->update_plane(intel_plane,
>+		intel_plane->update_plane(plane,
> 					  to_intel_crtc_state(crtc->state),
> 					  intel_state);
> 	} else {
> 		trace_intel_disable_plane(plane,
> 					  to_intel_crtc(crtc));
> 
>-		intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
>+		intel_plane->disable_plane(plane, crtc);
> 	}
> }
> 
>diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
>index cc484b56eeaa..a2cb3a07da0a 100644
>--- a/drivers/gpu/drm/i915/intel_display.c
>+++ b/drivers/gpu/drm/i915/intel_display.c
>@@ -2763,7 +2763,7 @@ intel_find_initial_plane_obj(struct intel_crtc *intel_crtc,
> 				false);
> 	intel_pre_disable_primary_noatomic(&intel_crtc->base);
> 	trace_intel_disable_plane(primary, intel_crtc);
>-	intel_plane->disable_plane(intel_plane, intel_crtc);
>+	intel_plane->disable_plane(primary, &intel_crtc->base);
> 
> 	return;
> 
>@@ -3074,14 +3074,14 @@ int i9xx_check_plane_surface(struct intel_plane_state *plane_state)
> 	return 0;
> }
> 
>-static void i9xx_update_primary_plane(struct intel_plane *primary,
>+static void i9xx_update_primary_plane(struct drm_plane *primary,
> 				      const struct intel_crtc_state *crtc_state,
> 				      const struct intel_plane_state *plane_state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(primary->base.dev);
>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>-	const struct drm_framebuffer *fb = plane_state->base.fb;
>-	enum plane plane = primary->plane;
>+	struct drm_i915_private *dev_priv = to_i915(primary->dev);
>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
>+	struct drm_framebuffer *fb = plane_state->base.fb;
>+	int plane = intel_crtc->plane;
> 	u32 linear_offset;
> 	u32 dspcntr = plane_state->ctl;
> 	i915_reg_t reg = DSPCNTR(plane);
>@@ -3092,12 +3092,12 @@ static void i9xx_update_primary_plane(struct intel_plane *primary,
> 	linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
> 
> 	if (INTEL_GEN(dev_priv) >= 4)
>-		crtc->dspaddr_offset = plane_state->main.offset;
>+		intel_crtc->dspaddr_offset = plane_state->main.offset;
> 	else
>-		crtc->dspaddr_offset = linear_offset;
>+		intel_crtc->dspaddr_offset = linear_offset;
> 
>-	crtc->adjusted_x = x;
>-	crtc->adjusted_y = y;
>+	intel_crtc->adjusted_x = x;
>+	intel_crtc->adjusted_y = y;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> 
>@@ -3123,29 +3123,31 @@ static void i9xx_update_primary_plane(struct intel_plane *primary,
> 	if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
> 		I915_WRITE_FW(DSPSURF(plane),
> 			      intel_plane_ggtt_offset(plane_state) +
>-			      crtc->dspaddr_offset);
>+			      intel_crtc->dspaddr_offset);
> 		I915_WRITE_FW(DSPOFFSET(plane), (y << 16) | x);
> 	} else if (INTEL_GEN(dev_priv) >= 4) {
> 		I915_WRITE_FW(DSPSURF(plane),
> 			      intel_plane_ggtt_offset(plane_state) +
>-			      crtc->dspaddr_offset);
>+			      intel_crtc->dspaddr_offset);
> 		I915_WRITE_FW(DSPTILEOFF(plane), (y << 16) | x);
> 		I915_WRITE_FW(DSPLINOFF(plane), linear_offset);
> 	} else {
> 		I915_WRITE_FW(DSPADDR(plane),
> 			      intel_plane_ggtt_offset(plane_state) +
>-			      crtc->dspaddr_offset);
>+			      intel_crtc->dspaddr_offset);
> 	}
> 	POSTING_READ_FW(reg);
> 
> 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
> 
>-static void i9xx_disable_primary_plane(struct intel_plane *primary,
>-				       struct intel_crtc *crtc)
>+static void i9xx_disable_primary_plane(struct drm_plane *primary,
>+				       struct drm_crtc *crtc)
> {
>-	struct drm_i915_private *dev_priv = to_i915(primary->base.dev);
>-	enum plane plane = primary->plane;
>+	struct drm_device *dev = crtc->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>+	int plane = intel_crtc->plane;
> 	unsigned long irqflags;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>@@ -3330,15 +3332,16 @@ u32 skl_plane_ctl(const struct intel_crtc_state *crtc_state,
> 	return plane_ctl;
> }
> 
>-static void skylake_update_primary_plane(struct intel_plane *plane,
>+static void skylake_update_primary_plane(struct drm_plane *plane,
> 					 const struct intel_crtc_state *crtc_state,
> 					 const struct intel_plane_state *plane_state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>-	const struct drm_framebuffer *fb = plane_state->base.fb;
>-	enum plane_id plane_id = plane->id;
>-	enum pipe pipe = plane->pipe;
>+	struct drm_device *dev = plane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc_state->base.crtc);
>+	struct drm_framebuffer *fb = plane_state->base.fb;
>+	enum plane_id plane_id = to_intel_plane(plane)->id;
>+	enum pipe pipe = to_intel_plane(plane)->pipe;
> 	u32 plane_ctl = plane_state->ctl;
> 	unsigned int rotation = plane_state->base.rotation;
> 	u32 stride = skl_plane_stride(fb, 0, rotation);
>@@ -3360,10 +3363,10 @@ static void skylake_update_primary_plane(struct intel_plane *plane,
> 	dst_w--;
> 	dst_h--;
> 
>-	crtc->dspaddr_offset = surf_addr;
>+	intel_crtc->dspaddr_offset = surf_addr;
> 
>-	crtc->adjusted_x = src_x;
>-	crtc->adjusted_y = src_y;
>+	intel_crtc->adjusted_x = src_x;
>+	intel_crtc->adjusted_y = src_y;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> 
>@@ -3402,12 +3405,13 @@ static void skylake_update_primary_plane(struct intel_plane *plane,
> 	spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
> }
> 
>-static void skylake_disable_primary_plane(struct intel_plane *primary,
>-					  struct intel_crtc *crtc)
>+static void skylake_disable_primary_plane(struct drm_plane *primary,
>+					  struct drm_crtc *crtc)
> {
>-	struct drm_i915_private *dev_priv = to_i915(primary->base.dev);
>-	enum plane_id plane_id = primary->id;
>-	enum pipe pipe = primary->pipe;
>+	struct drm_device *dev = crtc->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	enum plane_id plane_id = to_intel_plane(primary)->id;
>+	enum pipe pipe = to_intel_plane(primary)->pipe;
> 	unsigned long irqflags;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>@@ -5075,7 +5079,7 @@ static void intel_crtc_disable_planes(struct drm_crtc *crtc, unsigned plane_mask
> 	intel_crtc_dpms_overlay_disable(intel_crtc);
> 
> 	drm_for_each_plane_mask(p, dev, plane_mask)
>-		to_intel_plane(p)->disable_plane(to_intel_plane(p), intel_crtc);
>+		to_intel_plane(p)->disable_plane(p, crtc);
> 
> 	/*
> 	 * FIXME: Once we grow proper nuclear flip support out of this we need
>@@ -13460,11 +13464,11 @@ skl_max_scale(struct intel_crtc *intel_crtc, struct intel_crtc_state *crtc_state
> }
> 
> static int
>-intel_check_primary_plane(struct intel_plane *plane,
>+intel_check_primary_plane(struct drm_plane *plane,
> 			  struct intel_crtc_state *crtc_state,
> 			  struct intel_plane_state *state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>+	struct drm_i915_private *dev_priv = to_i915(plane->dev);
> 	struct drm_crtc *crtc = state->base.crtc;
> 	int min_scale = DRM_PLANE_HELPER_NO_SCALING;
> 	int max_scale = DRM_PLANE_HELPER_NO_SCALING;
>@@ -13679,12 +13683,12 @@ intel_legacy_cursor_update(struct drm_plane *plane,
> 
> 	if (plane->state->visible) {
> 		trace_intel_update_plane(plane, to_intel_crtc(crtc));
>-		intel_plane->update_plane(intel_plane,
>+		intel_plane->update_plane(plane,
> 					  to_intel_crtc_state(crtc->state),
> 					  to_intel_plane_state(plane->state));
> 	} else {
> 		trace_intel_disable_plane(plane, to_intel_crtc(crtc));
>-		intel_plane->disable_plane(intel_plane, to_intel_crtc(crtc));
>+		intel_plane->disable_plane(plane, crtc);
> 	}
> 
> 	intel_cleanup_plane_fb(plane, new_plane_state);
>@@ -15274,7 +15278,7 @@ static void intel_sanitize_crtc(struct intel_crtc *crtc,
> 				continue;
> 
> 			trace_intel_disable_plane(&plane->base, crtc);
>-			plane->disable_plane(plane, crtc);
>+			plane->disable_plane(&plane->base, &crtc->base);
> 		}
> 	}
> 
>diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
>index d93efb49a2e2..7f096352fc12 100644
>--- a/drivers/gpu/drm/i915/intel_drv.h
>+++ b/drivers/gpu/drm/i915/intel_drv.h
>@@ -859,12 +859,12 @@ struct intel_plane {
> 	 * the intel_plane_state structure and accessed via plane_state.
> 	 */
> 
>-	void (*update_plane)(struct intel_plane *plane,
>+	void (*update_plane)(struct drm_plane *plane,
> 			     const struct intel_crtc_state *crtc_state,
> 			     const struct intel_plane_state *plane_state);
>-	void (*disable_plane)(struct intel_plane *plane,
>-			      struct intel_crtc *crtc);
>-	int (*check_plane)(struct intel_plane *plane,
>+	void (*disable_plane)(struct drm_plane *plane,
>+			      struct drm_crtc *crtc);
>+	int (*check_plane)(struct drm_plane *plane,
> 			   struct intel_crtc_state *crtc_state,
> 			   struct intel_plane_state *state);
> };
>diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
>index 0c650c2cbca8..969a37e2fa9a 100644
>--- a/drivers/gpu/drm/i915/intel_sprite.c
>+++ b/drivers/gpu/drm/i915/intel_sprite.c
>@@ -231,14 +231,16 @@ void intel_pipe_update_end(struct intel_crtc *crtc, struct intel_flip_work *work
> }
> 
> static void
>-skl_update_plane(struct intel_plane *plane,
>+skl_update_plane(struct drm_plane *drm_plane,
> 		 const struct intel_crtc_state *crtc_state,
> 		 const struct intel_plane_state *plane_state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	const struct drm_framebuffer *fb = plane_state->base.fb;
>-	enum plane_id plane_id = plane->id;
>-	enum pipe pipe = plane->pipe;
>+	struct drm_device *dev = drm_plane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(drm_plane);
>+	struct drm_framebuffer *fb = plane_state->base.fb;
>+	enum plane_id plane_id = intel_plane->id;
>+	enum pipe pipe = intel_plane->pipe;
> 	u32 plane_ctl = plane_state->ctl;
> 	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> 	u32 surf_addr = plane_state->main.offset;
>@@ -307,11 +309,13 @@ skl_update_plane(struct intel_plane *plane,
> }
> 
> static void
>-skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
>+skl_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	enum plane_id plane_id = plane->id;
>-	enum pipe pipe = plane->pipe;
>+	struct drm_device *dev = dplane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(dplane);
>+	enum plane_id plane_id = intel_plane->id;
>+	enum pipe pipe = intel_plane->pipe;
> 	unsigned long irqflags;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>@@ -325,10 +329,10 @@ skl_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
> }
> 
> static void
>-chv_update_csc(struct intel_plane *plane, uint32_t format)
>+chv_update_csc(struct intel_plane *intel_plane, uint32_t format)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	enum plane_id plane_id = plane->id;
>+	struct drm_i915_private *dev_priv = to_i915(intel_plane->base.dev);
>+	enum plane_id plane_id = intel_plane->id;
> 
> 	/* Seems RGB data bypasses the CSC always */
> 	if (!format_is_yuv(format))
>@@ -428,14 +432,16 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
> }
> 
> static void
>-vlv_update_plane(struct intel_plane *plane,
>+vlv_update_plane(struct drm_plane *dplane,
> 		 const struct intel_crtc_state *crtc_state,
> 		 const struct intel_plane_state *plane_state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	const struct drm_framebuffer *fb = plane_state->base.fb;
>-	enum pipe pipe = plane->pipe;
>-	enum plane_id plane_id = plane->id;
>+	struct drm_device *dev = dplane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(dplane);
>+	struct drm_framebuffer *fb = plane_state->base.fb;
>+	enum pipe pipe = intel_plane->pipe;
>+	enum plane_id plane_id = intel_plane->id;
> 	u32 sprctl = plane_state->ctl;
> 	u32 sprsurf_offset = plane_state->main.offset;
> 	u32 linear_offset;
>@@ -457,7 +463,7 @@ vlv_update_plane(struct intel_plane *plane,
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> 
> 	if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
>-		chv_update_csc(plane, fb->format->format);
>+		chv_update_csc(intel_plane, fb->format->format);
> 
> 	if (key->flags) {
> 		I915_WRITE_FW(SPKEYMINVAL(pipe, plane_id), key->min_value);
>@@ -484,11 +490,13 @@ vlv_update_plane(struct intel_plane *plane,
> }
> 
> static void
>-vlv_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
>+vlv_disable_plane(struct drm_plane *dplane, struct drm_crtc *crtc)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	enum pipe pipe = plane->pipe;
>-	enum plane_id plane_id = plane->id;
>+	struct drm_device *dev = dplane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(dplane);
>+	enum pipe pipe = intel_plane->pipe;
>+	enum plane_id plane_id = intel_plane->id;
> 	unsigned long irqflags;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>@@ -558,13 +566,15 @@ static u32 ivb_sprite_ctl(const struct intel_crtc_state *crtc_state,
> }
> 
> static void
>-ivb_update_plane(struct intel_plane *plane,
>+ivb_update_plane(struct drm_plane *plane,
> 		 const struct intel_crtc_state *crtc_state,
> 		 const struct intel_plane_state *plane_state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	const struct drm_framebuffer *fb = plane_state->base.fb;
>-	enum pipe pipe = plane->pipe;
>+	struct drm_device *dev = plane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(plane);
>+	struct drm_framebuffer *fb = plane_state->base.fb;
>+	enum pipe pipe = intel_plane->pipe;
> 	u32 sprctl = plane_state->ctl, sprscale = 0;
> 	u32 sprsurf_offset = plane_state->main.offset;
> 	u32 linear_offset;
>@@ -611,7 +621,7 @@ ivb_update_plane(struct intel_plane *plane,
> 		I915_WRITE_FW(SPRLINOFF(pipe), linear_offset);
> 
> 	I915_WRITE_FW(SPRSIZE(pipe), (crtc_h << 16) | crtc_w);
>-	if (plane->can_scale)
>+	if (intel_plane->can_scale)
> 		I915_WRITE_FW(SPRSCALE(pipe), sprscale);
> 	I915_WRITE_FW(SPRCTL(pipe), sprctl);
> 	I915_WRITE_FW(SPRSURF(pipe),
>@@ -622,17 +632,19 @@ ivb_update_plane(struct intel_plane *plane,
> }
> 
> static void
>-ivb_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
>+ivb_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	enum pipe pipe = plane->pipe;
>+	struct drm_device *dev = plane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(plane);
>+	int pipe = intel_plane->pipe;
> 	unsigned long irqflags;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
> 
> 	I915_WRITE_FW(SPRCTL(pipe), 0);
> 	/* Can't leave the scaler enabled... */
>-	if (plane->can_scale)
>+	if (intel_plane->can_scale)
> 		I915_WRITE_FW(SPRSCALE(pipe), 0);
> 
> 	I915_WRITE_FW(SPRSURF(pipe), 0);
>@@ -695,13 +707,15 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
> }
> 
> static void
>-g4x_update_plane(struct intel_plane *plane,
>+g4x_update_plane(struct drm_plane *plane,
> 		 const struct intel_crtc_state *crtc_state,
> 		 const struct intel_plane_state *plane_state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	const struct drm_framebuffer *fb = plane_state->base.fb;
>-	enum pipe pipe = plane->pipe;
>+	struct drm_device *dev = plane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(plane);
>+	struct drm_framebuffer *fb = plane_state->base.fb;
>+	int pipe = intel_plane->pipe;
> 	u32 dvscntr = plane_state->ctl, dvsscale = 0;
> 	u32 dvssurf_offset = plane_state->main.offset;
> 	u32 linear_offset;
>@@ -754,10 +768,12 @@ g4x_update_plane(struct intel_plane *plane,
> }
> 
> static void
>-g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
>+g4x_disable_plane(struct drm_plane *plane, struct drm_crtc *crtc)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	enum pipe pipe = plane->pipe;
>+	struct drm_device *dev = plane->dev;
>+	struct drm_i915_private *dev_priv = to_i915(dev);
>+	struct intel_plane *intel_plane = to_intel_plane(plane);
>+	int pipe = intel_plane->pipe;
> 	unsigned long irqflags;
> 
> 	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>@@ -773,12 +789,14 @@ g4x_disable_plane(struct intel_plane *plane, struct intel_crtc *crtc)
> }
> 
> static int
>-intel_check_sprite_plane(struct intel_plane *plane,
>+intel_check_sprite_plane(struct drm_plane *plane,
> 			 struct intel_crtc_state *crtc_state,
> 			 struct intel_plane_state *state)
> {
>-	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>-	struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
>+	struct drm_i915_private *dev_priv = to_i915(plane->dev);
>+	struct drm_crtc *crtc = state->base.crtc;
>+	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
>+	struct intel_plane *intel_plane = to_intel_plane(plane);
> 	struct drm_framebuffer *fb = state->base.fb;
> 	int crtc_x, crtc_y;
> 	unsigned int crtc_w, crtc_h;
>@@ -800,7 +818,7 @@ intel_check_sprite_plane(struct intel_plane *plane,
> 	}
> 
> 	/* Don't modify another pipe's plane */
>-	if (plane->pipe != crtc->pipe) {
>+	if (intel_plane->pipe != intel_crtc->pipe) {
> 		DRM_DEBUG_KMS("Wrong plane <-> crtc mapping\n");
> 		return -EINVAL;
> 	}
>@@ -817,16 +835,16 @@ intel_check_sprite_plane(struct intel_plane *plane,
> 		if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
> 			can_scale = 1;
> 			min_scale = 1;
>-			max_scale = skl_max_scale(crtc, crtc_state);
>+			max_scale = skl_max_scale(intel_crtc, crtc_state);
> 		} else {
> 			can_scale = 0;
> 			min_scale = DRM_PLANE_HELPER_NO_SCALING;
> 			max_scale = DRM_PLANE_HELPER_NO_SCALING;
> 		}
> 	} else {
>-		can_scale = plane->can_scale;
>-		max_scale = plane->max_downscale << 16;
>-		min_scale = plane->can_scale ? 1 : (1 << 16);
>+		can_scale = intel_plane->can_scale;
>+		max_scale = intel_plane->max_downscale << 16;
>+		min_scale = intel_plane->can_scale ? 1 : (1 << 16);
> 	}
> 
> 	/*
>-- 
>2.14.2
>

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Attachments on bug 102929: 134496 | 135694 | 135695

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