Attachment 127440 Details for Bug 98362 – dmesg

dmesg

kms_flip (text/plain), 47.30 KB, created by Luis Botello on 2016-10-20 20:37:10 UTC

(hide)

Description:

Filename:

MIME Type:

Creator: Luis Botello

Created: 2016-10-20 20:37:10 UTC

Size: 47.30 KB

patch

obsolete

>[13304.278122] [IGT] kms_flip: executing
>[13304.278229] [drm:i915_gem_open [i915]] 
>[13304.278339] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13304.278363] [drm:_i915_gem_object_create_stolen [i915]] offset=0x1000, size=16384
>[13304.278642] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13304.278663] [drm:_i915_gem_object_create_stolen [i915]] offset=0x5000, size=16384
>[13304.278729] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13304.278749] [drm:_i915_gem_object_create_stolen [i915]] offset=0x9000, size=16384
>[13304.278784] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13304.278803] [drm:_i915_gem_object_create_stolen [i915]] offset=0xd000, size=16384
>[13304.279237] [drm:i915_gem_open [i915]] 
>[13304.279288] [drm:i915_gem_open [i915]] 
>[13304.279322] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:37:eDP-1]
>[13304.279351] [drm:intel_dp_detect [i915]] [CONNECTOR:37:eDP-1]
>[13304.279378] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink yes
>[13304.279403] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[13304.279425] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000, 540000
>[13304.279447] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000, 540000
>[13304.279478] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[13304.279544] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000f
>[13304.279893] [drm:intel_dp_detect [i915]] Sink OUI: 0022b9
>[13304.280239] [drm:intel_dp_detect [i915]] Branch OUI: 000000
>[13304.280618] [drm:drm_edid_to_eld [drm]] ELD: no CEA Extension found
>[13304.280628] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:37:eDP-1] probed modes :
>[13304.280644] [drm:drm_mode_debug_printmodeline [drm]] Modeline 38:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[13304.280659] [drm:drm_mode_debug_printmodeline [drm]] Modeline 39:"3200x1800" 48 361310 3200 3248 3280 3680 1800 1802 1807 2045 0x40 0xa
>[13304.280671] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:46:DP-1]
>[13304.280696] [drm:intel_dp_detect [i915]] [CONNECTOR:46:DP-1]
>[13304.289141] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.297575] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.306011] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.314442] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.322872] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.331302] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.339731] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.348161] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.356591] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.365020] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.373451] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.381879] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.390308] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.398738] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.407170] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.415600] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.424031] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.432462] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.440892] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.449325] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.457759] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.466190] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.474621] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.483053] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.491483] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.499914] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.508345] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.516775] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.525204] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.533635] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.542067] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.550498] [drm:intel_dp_aux_ch [i915]] dp_aux_ch timeout status 0x7d4003ff
>[13304.550504] [drm:drm_dp_dpcd_access [drm_kms_helper]] Too many retries, giving up. First error: -110
>[13304.550507] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:46:DP-1] disconnected
>[13304.550515] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1]
>[13304.550541] [drm:intel_hdmi_detect [i915]] [CONNECTOR:50:HDMI-A-1]
>[13304.576209] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[13304.576221] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK on first message, retry
>[13304.576519] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpb] NAK for addr: 0040 w(1)
>[13304.576530] [drm:intel_hdmi_set_edid [i915]] Assuming DP dual mode adaptor presence based on VBT
>[13304.576541] [drm:intel_hdmi_set_edid [i915]] DP dual mode adaptor (type 1 DVI) detected (max TMDS clock: 165000 kHz)
>[13304.576552] [drm:drm_detect_monitor_audio [drm]] Monitor has basic audio support
>[13304.576600] [drm:drm_add_edid_modes [drm]] HDMI: DVI dual 0, max TMDS clock 0 kHz
>[13304.576606] [drm:drm_edid_to_eld [drm]] ELD monitor VX279
>[13304.576613] [drm:drm_edid_to_eld [drm]] HDMI: latency present 0 0, video latency 0 0, audio latency 0 0
>[13304.576618] [drm:drm_edid_to_eld [drm]] ELD size 28, SAD count 1
>[13304.576641] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:50:HDMI-A-1] probed modes :
>[13304.576649] [drm:drm_mode_debug_printmodeline [drm]] Modeline 66:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[13304.576655] [drm:drm_mode_debug_printmodeline [drm]] Modeline 146:"1920x1080" 60 148352 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0x5
>[13304.576661] [drm:drm_mode_debug_printmodeline [drm]] Modeline 69:"1920x1080i" 60 74250 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[13304.576667] [drm:drm_mode_debug_printmodeline [drm]] Modeline 148:"1920x1080i" 60 74176 1920 2008 2052 2200 1080 1084 1094 1125 0x40 0x15
>[13304.576672] [drm:drm_mode_debug_printmodeline [drm]] Modeline 143:"1920x1080" 50 148500 1920 2448 2492 2640 1080 1084 1089 1125 0x40 0x5
>[13304.576678] [drm:drm_mode_debug_printmodeline [drm]] Modeline 131:"1920x1080i" 50 74250 1920 2448 2492 2640 1080 1084 1094 1125 0x40 0x15
>[13304.576684] [drm:drm_mode_debug_printmodeline [drm]] Modeline 78:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[13304.576689] [drm:drm_mode_debug_printmodeline [drm]] Modeline 75:"1680x1050" 60 119000 1680 1728 1760 1840 1050 1053 1059 1080 0x40 0x9
>[13304.576694] [drm:drm_mode_debug_printmodeline [drm]] Modeline 74:"1280x1024" 75 135000 1280 1296 1440 1688 1024 1025 1028 1066 0x40 0x5
>[13304.576699] [drm:drm_mode_debug_printmodeline [drm]] Modeline 73:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[13304.576704] [drm:drm_mode_debug_printmodeline [drm]] Modeline 77:"1440x900" 60 88750 1440 1488 1520 1600 900 903 909 926 0x40 0x9
>[13304.576710] [drm:drm_mode_debug_printmodeline [drm]] Modeline 76:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[13304.576715] [drm:drm_mode_debug_printmodeline [drm]] Modeline 72:"1152x864" 75 108000 1152 1216 1344 1600 864 865 868 900 0x40 0x5
>[13304.576720] [drm:drm_mode_debug_printmodeline [drm]] Modeline 70:"1280x720" 60 74250 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[13304.576725] [drm:drm_mode_debug_printmodeline [drm]] Modeline 149:"1280x720" 60 74176 1280 1390 1430 1650 720 725 730 750 0x40 0x5
>[13304.576730] [drm:drm_mode_debug_printmodeline [drm]] Modeline 145:"1280x720" 50 74250 1280 1720 1760 1980 720 725 730 750 0x40 0x5
>[13304.576735] [drm:drm_mode_debug_printmodeline [drm]] Modeline 94:"1024x768" 75 78750 1024 1040 1136 1312 768 769 772 800 0x40 0x5
>[13304.576740] [drm:drm_mode_debug_printmodeline [drm]] Modeline 102:"1024x768" 70 75000 1024 1048 1184 1328 768 771 777 806 0x40 0xa
>[13304.576745] [drm:drm_mode_debug_printmodeline [drm]] Modeline 104:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[13304.576750] [drm:drm_mode_debug_printmodeline [drm]] Modeline 106:"800x600" 75 49500 800 816 896 1056 600 601 604 625 0x40 0x5
>[13304.576755] [drm:drm_mode_debug_printmodeline [drm]] Modeline 109:"800x600" 72 50000 800 856 976 1040 600 637 643 666 0x40 0x5
>[13304.576761] [drm:drm_mode_debug_printmodeline [drm]] Modeline 79:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[13304.576766] [drm:drm_mode_debug_printmodeline [drm]] Modeline 81:"800x600" 56 36000 800 824 896 1024 600 601 603 625 0x40 0x5
>[13304.576770] [drm:drm_mode_debug_printmodeline [drm]] Modeline 135:"720x576" 50 27000 720 732 796 864 576 581 586 625 0x40 0xa
>[13304.576775] [drm:drm_mode_debug_printmodeline [drm]] Modeline 150:"720x480" 60 27027 720 736 798 858 480 489 495 525 0x40 0xa
>[13304.576780] [drm:drm_mode_debug_printmodeline [drm]] Modeline 71:"720x480" 60 27000 720 736 798 858 480 489 495 525 0x40 0xa
>[13304.576785] [drm:drm_mode_debug_printmodeline [drm]] Modeline 82:"640x480" 75 31500 640 656 720 840 480 481 484 500 0x40 0xa
>[13304.576790] [drm:drm_mode_debug_printmodeline [drm]] Modeline 84:"640x480" 73 31500 640 664 704 832 480 489 492 520 0x40 0xa
>[13304.576795] [drm:drm_mode_debug_printmodeline [drm]] Modeline 151:"640x480" 60 25200 640 656 752 800 480 490 492 525 0x40 0xa
>[13304.576800] [drm:drm_mode_debug_printmodeline [drm]] Modeline 85:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[13304.576805] [drm:drm_mode_debug_printmodeline [drm]] Modeline 91:"720x400" 70 28320 720 738 846 900 400 412 414 449 0x40 0x6
>[13304.576816] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:53:DP-2]
>[13304.576829] [drm:intel_dp_detect [i915]] [CONNECTOR:53:DP-2]
>[13304.577222] [drm:intel_dp_read_dpcd [i915]] DPCD: 11 0a 84 01 00 00 01 00 02 02 06 00 00 00 00
>[13304.577498] [drm:intel_dp_detect [i915]] Display Port TPS3 support: source yes, sink no
>[13304.577516] [drm:intel_dp_print_rates [i915]] source rates: 162000, 216000, 270000, 324000, 432000, 540000
>[13304.577531] [drm:intel_dp_print_rates [i915]] sink rates: 162000, 270000
>[13304.577542] [drm:intel_dp_print_rates [i915]] common rates: 162000, 270000
>[13304.577552] [drm:intel_dp_detect [i915]] Sink is not MST capable
>[13304.577867] [drm:drm_edid_to_eld [drm]] ELD: no CEA Extension found
>[13304.577874] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:53:DP-2] probed modes :
>[13304.577893] [drm:drm_mode_debug_printmodeline [drm]] Modeline 80:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[13304.577900] [drm:drm_mode_debug_printmodeline [drm]] Modeline 93:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x40 0xa
>[13304.577906] [drm:drm_mode_debug_printmodeline [drm]] Modeline 89:"1600x1200" 60 162000 1600 1664 1856 2160 1200 1201 1204 1250 0x40 0x5
>[13304.577912] [drm:drm_mode_debug_printmodeline [drm]] Modeline 90:"1680x1050" 60 146250 1680 1784 1960 2240 1050 1053 1059 1089 0x40 0x6
>[13304.577917] [drm:drm_mode_debug_printmodeline [drm]] Modeline 87:"1280x1024" 60 108000 1280 1328 1440 1688 1024 1025 1028 1066 0x40 0x5
>[13304.577922] [drm:drm_mode_debug_printmodeline [drm]] Modeline 88:"1440x900" 60 106500 1440 1520 1672 1904 900 903 909 934 0x40 0x6
>[13304.577928] [drm:drm_mode_debug_printmodeline [drm]] Modeline 86:"1280x960" 60 108000 1280 1376 1488 1800 960 961 964 1000 0x40 0x5
>[13304.577933] [drm:drm_mode_debug_printmodeline [drm]] Modeline 103:"1024x768" 60 65000 1024 1048 1184 1344 768 771 777 806 0x40 0xa
>[13304.577938] [drm:drm_mode_debug_printmodeline [drm]] Modeline 95:"800x600" 60 40000 800 840 968 1056 600 601 605 628 0x40 0x5
>[13304.577944] [drm:drm_mode_debug_printmodeline [drm]] Modeline 98:"640x480" 60 25175 640 656 752 800 480 490 492 525 0x40 0xa
>[13304.577951] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:57:HDMI-A-2]
>[13304.577962] [drm:intel_hdmi_detect [i915]] [CONNECTOR:57:HDMI-A-2]
>[13304.578258] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[13304.578267] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[13304.578559] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0050 w(1)
>[13304.578566] [drm:drm_do_probe_ddc_edid [drm]] drm: skipping non-existent adapter i915 gmbus dpc
>[13304.578863] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[13304.578872] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK on first message, retry
>[13304.579167] [drm:gmbus_xfer [i915]] GMBUS [i915 gmbus dpc] NAK for addr: 0040 w(1)
>[13304.579171] [drm:drm_helper_probe_single_connector_modes [drm_kms_helper]] [CONNECTOR:57:HDMI-A-2] disconnected
>[13304.579447] [IGT] kms_flip: starting subtest plain-flip-fb-recreate-interruptible
>[13304.579590] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13304.579620] [drm:drm_mode_addfb2 [drm]] [FB:112]
>[13304.647807] [drm:drm_mode_setcrtc [drm]] [CRTC:26:pipe A]
>[13304.647861] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 337500, actual 337500
>[13304.647880] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[13304.647911] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:28:plane 1B] scaler_user index 1.3
>[13304.647922] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:32:plane 1C] scaler_user index 2.6
>[13304.647934] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[13304.647960] [drm:intel_find_shared_dpll [i915]] [CRTC:30:pipe B] allocated DPLL 1
>[13304.647970] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe B
>[13304.647980] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:30:pipe B] scaler_user index 1.31
>[13304.647992] [drm:intel_find_shared_dpll [i915]] [CRTC:34:pipe C] allocated DPLL 2
>[13304.648001] [drm:intel_reference_shared_dpll [i915]] using DPLL 2 for pipe C
>[13304.648011] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:34:pipe C] scaler_user index 2.31
>[13304.648039] [drm:intel_edp_backlight_off.part.29 [i915]] 
>[13304.853528] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 0
>[13304.853619] [drm:intel_disable_pipe [i915]] disabling pipe A
>[13304.861671] [drm:edp_panel_off [i915]] Turn eDP port A panel power off
>[13304.861737] [drm:edp_panel_off [i915]] Wait for panel power off time
>[13304.861833] [drm:wait_panel_status [i915]] mask b0000000 value 00000000 status a0000003 control 00000000
>[13304.868389] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[13304.868443] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[13304.868490] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 0
>[13304.868592] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[13304.889019] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[13304.889073] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[13304.889124] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 1
>[13304.889439] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[13304.912780] [drm:wait_panel_status [i915]] Wait complete
>[13304.912858] [drm:intel_disable_shared_dpll [i915]] disable DPLL 0 (active 1, on? 1) for crtc 26
>[13304.912915] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 0
>[13304.913003] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B
>[13304.913061] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[13304.913144] [drm:intel_disable_pipe [i915]] disabling pipe B
>[13304.915066] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[13304.915138] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[13304.915202] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 2
>[13304.915326] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[13304.927951] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 2, on? 1) for crtc 30
>[13304.928026] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[13304.928128] [drm:intel_disable_pipe [i915]] disabling pipe C
>[13304.929971] [drm:intel_disable_shared_dpll [i915]] disable DPLL 2 (active 4, on? 1) for crtc 34
>[13304.930042] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 2
>[13304.930120] [drm:skl_set_cdclk [i915]] Changing CDCLK to 337500 kHz (VCO 8100000 kHz)
>[13304.930330] [drm:intel_update_cdclk [i915]] Current CD clock rate: 337500 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[13304.930394] [drm:intel_atomic_commit_tail [i915]] [ENCODER:36:DDI A]
>[13304.930456] [drm:intel_atomic_commit_tail [i915]] [ENCODER:45:DDI B]
>[13304.930510] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DP-MST A]
>[13304.930563] [drm:intel_atomic_commit_tail [i915]] [ENCODER:48:DP-MST B]
>[13304.930613] [drm:intel_atomic_commit_tail [i915]] [ENCODER:49:DP-MST C]
>[13304.930661] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DDI C]
>[13304.930708] [drm:intel_atomic_commit_tail [i915]] [ENCODER:54:DP-MST A]
>[13304.930756] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DP-MST B]
>[13304.930803] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:DP-MST C]
>[13304.930858] [drm:verify_connector_state [i915]] [CONNECTOR:37:eDP-1]
>[13304.930914] [drm:verify_connector_state [i915]] [CONNECTOR:46:DP-1]
>[13304.930968] [drm:verify_connector_state [i915]] [CONNECTOR:57:HDMI-A-2]
>[13304.931021] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 0
>[13304.931074] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 1
>[13304.931124] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 2
>[13304.931172] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 3
>[13304.931240] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 2, on? 0) for crtc 30
>[13304.931294] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[13304.933621] [drm:skylake_pfit_enable [i915]] for crtc_state = ffff88f9e7db2800
>[13304.934308] [drm:intel_enable_pipe [i915]] enabling pipe B
>[13304.934397] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:50:HDMI-A-1], [ENCODER:45:DDI B]
>[13304.934456] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 28 bytes ELD
>[13304.934523] [drm:audio_config_hdmi_pixel_clock.isra.4 [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[13304.951327] [drm:intel_enable_shared_dpll [i915]] enable DPLL 2 (active 4, on? 0) for crtc 34
>[13304.951394] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 2
>[13304.954969] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[13304.955032] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[13304.955088] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[13304.955142] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[13304.955840] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[13304.955893] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[13304.956875] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[13304.959160] [drm:skylake_pfit_enable [i915]] for crtc_state = ffff88f9e7db4800
>[13304.959799] [drm:intel_enable_pipe [i915]] enabling pipe C
>[13304.993435] [drm:intel_atomic_commit_tail [i915]] [CRTC:26:pipe A]
>[13304.993571] [drm:verify_connector_state [i915]] [CONNECTOR:50:HDMI-A-1]
>[13304.993644] [drm:intel_atomic_commit_tail [i915]] [CRTC:30:pipe B]
>[13304.993736] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 1
>[13304.993808] [drm:verify_connector_state [i915]] [CONNECTOR:53:DP-2]
>[13304.993876] [drm:intel_atomic_commit_tail [i915]] [CRTC:34:pipe C]
>[13304.993957] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 2
>[13304.994075] [drm:drm_mode_setcrtc [drm]] [CRTC:30:pipe B]
>[13304.994163] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 337500, actual 337500
>[13304.994235] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:28:plane 1B] scaler_user index 1.3
>[13304.994297] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:30:pipe B] scaler_user index 1.31
>[13304.994403] [drm:hsw_audio_codec_disable [i915]] Disable audio codec on pipe B
>[13304.994466] [drm:i915_audio_component_get_eld [i915]] Not valid for port B
>[13304.994558] [drm:intel_disable_pipe [i915]] disabling pipe B
>[13305.003183] [drm:intel_disable_shared_dpll [i915]] disable DPLL 1 (active 2, on? 1) for crtc 30
>[13305.003259] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 1
>[13305.003364] [drm:intel_atomic_commit_tail [i915]] [ENCODER:36:DDI A]
>[13305.003431] [drm:intel_atomic_commit_tail [i915]] [ENCODER:45:DDI B]
>[13305.003491] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DP-MST A]
>[13305.003547] [drm:intel_atomic_commit_tail [i915]] [ENCODER:48:DP-MST B]
>[13305.003600] [drm:intel_atomic_commit_tail [i915]] [ENCODER:49:DP-MST C]
>[13305.003653] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DDI C]
>[13305.003704] [drm:intel_atomic_commit_tail [i915]] [ENCODER:54:DP-MST A]
>[13305.003754] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DP-MST B]
>[13305.003805] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:DP-MST C]
>[13305.003865] [drm:verify_connector_state [i915]] [CONNECTOR:37:eDP-1]
>[13305.003926] [drm:verify_connector_state [i915]] [CONNECTOR:46:DP-1]
>[13305.003984] [drm:verify_connector_state [i915]] [CONNECTOR:50:HDMI-A-1]
>[13305.004039] [drm:verify_connector_state [i915]] [CONNECTOR:57:HDMI-A-2]
>[13305.004097] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 0
>[13305.004151] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 1
>[13305.004203] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 2
>[13305.004254] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 3
>[13305.010105] [drm:intel_atomic_commit_tail [i915]] [CRTC:30:pipe B]
>[13305.010170] [drm:intel_enable_sagv [i915]] Enabling the SAGV
>[13305.010293] [drm:drm_mode_setcrtc [drm]] [CRTC:34:pipe C]
>[13305.010390] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 337500, actual 337500
>[13305.010466] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:32:plane 1C] scaler_user index 2.6
>[13305.010532] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:34:pipe C] scaler_user index 2.31
>[13305.010640] [drm:intel_disable_pipe [i915]] disabling pipe C
>[13305.028133] [drm:intel_disable_shared_dpll [i915]] disable DPLL 2 (active 4, on? 1) for crtc 34
>[13305.028201] [drm:intel_disable_shared_dpll [i915]] disabling DPLL 2
>[13305.028296] [drm:intel_atomic_commit_tail [i915]] [ENCODER:36:DDI A]
>[13305.028362] [drm:intel_atomic_commit_tail [i915]] [ENCODER:45:DDI B]
>[13305.028419] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DP-MST A]
>[13305.028470] [drm:intel_atomic_commit_tail [i915]] [ENCODER:48:DP-MST B]
>[13305.028519] [drm:intel_atomic_commit_tail [i915]] [ENCODER:49:DP-MST C]
>[13305.028567] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DDI C]
>[13305.028617] [drm:intel_atomic_commit_tail [i915]] [ENCODER:54:DP-MST A]
>[13305.028663] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DP-MST B]
>[13305.028709] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:DP-MST C]
>[13305.028765] [drm:verify_connector_state [i915]] [CONNECTOR:37:eDP-1]
>[13305.028823] [drm:verify_connector_state [i915]] [CONNECTOR:46:DP-1]
>[13305.028877] [drm:verify_connector_state [i915]] [CONNECTOR:50:HDMI-A-1]
>[13305.028928] [drm:verify_connector_state [i915]] [CONNECTOR:53:DP-2]
>[13305.028979] [drm:verify_connector_state [i915]] [CONNECTOR:57:HDMI-A-2]
>[13305.029030] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 0
>[13305.029080] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 1
>[13305.029128] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 2
>[13305.029176] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 3
>[13305.029242] [drm:intel_atomic_commit_tail [i915]] [CRTC:34:pipe C]
>[13305.029349] [drm:drm_mode_setcrtc [drm]] [CRTC:26:pipe A]
>[13305.029391] [drm:drm_mode_setcrtc [drm]] [CONNECTOR:37:eDP-1]
>[13305.029528] [drm:intel_atomic_check [i915]] [CONNECTOR:37:eDP-1] checking for sink bpp constrains
>[13305.029602] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[13305.029677] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[13305.029740] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 540000 pixel clock 361310KHz
>[13305.029815] [drm:intel_dp_compute_config [i915]] DP link bw 14 rate select 00 lane count 4 clock 540000 bpp 24
>[13305.029888] [drm:intel_dp_compute_config [i915]] DP link bw required 867144 available 1728000
>[13305.029960] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[13305.030022] [drm:intel_dump_pipe_config [i915]] [CRTC:26:pipe A][modeset] config ffff88f9e6372000 for pipe A
>[13305.030091] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: EDP
>[13305.030159] [drm:intel_dump_pipe_config [i915]] pipe bpp: 24, dithering: 0
>[13305.030219] [drm:intel_dump_pipe_config [i915]] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13305.030287] [drm:intel_dump_pipe_config [i915]] dp: 1, lanes: 4, gmch_m: 4209566, gmch_n: 8388608, link_m: 701594, link_n: 1048576, tu: 64
>[13305.030359] [drm:intel_dump_pipe_config [i915]] dp: 1, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13305.030427] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[13305.030494] [drm:intel_dump_pipe_config [i915]] requested mode:
>[13305.030558] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[13305.030617] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[13305.030681] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"3200x1800" 60 361310 3200 3248 3280 3316 1800 1802 1807 1816 0x48 0xa
>[13305.030753] [drm:intel_dump_pipe_config [i915]] crtc timings: 361310 3200 3248 3280 3316 1800 1802 1807 1816, type: 0x48 flags: 0xa
>[13305.030824] [drm:intel_dump_pipe_config [i915]] port clock: 540000
>[13305.030897] [drm:intel_dump_pipe_config [i915]] pipe src size: 3200x1800
>[13305.030968] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[13305.031040] [drm:intel_dump_pipe_config [i915]] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13305.031112] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13305.031170] [drm:intel_dump_pipe_config [i915]] ips: 0
>[13305.031213] [drm:intel_dump_pipe_config [i915]] double wide: 0
>[13305.031258] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x1, cfgcr1: 0x0, cfgcr2: 0x0
>[13305.031301] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[13305.031347] [drm:intel_dump_pipe_config [i915]] [PLANE:23:plane 1A] disabled, scaler_id = -1
>[13305.031390] [drm:intel_dump_pipe_config [i915]] [PLANE:25:cursor A] disabled, scaler_id = -1
>[13305.031435] [drm:intel_dump_pipe_config [i915]] [PLANE:27:plane 2A] disabled, scaler_id = -1
>[13305.031501] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 450000, actual 450000
>[13305.031570] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[13305.031633] [drm:intel_find_shared_dpll [i915]] [CRTC:26:pipe A] allocated DPLL 0
>[13305.031691] [drm:intel_reference_shared_dpll [i915]] using DPLL 0 for pipe A
>[13305.031749] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:26:pipe A] scaler_user index 0.31
>[13305.035486] [drm:skl_set_cdclk [i915]] Changing CDCLK to 450000 kHz (VCO 8100000 kHz)
>[13305.039867] [drm:intel_update_cdclk [i915]] Current CD clock rate: 450000 kHz, VCO: 8100000 kHz, ref: 24000 kHz
>[13305.039932] [drm:intel_atomic_commit_tail [i915]] [ENCODER:36:DDI A]
>[13305.039989] [drm:intel_atomic_commit_tail [i915]] [ENCODER:45:DDI B]
>[13305.040045] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DP-MST A]
>[13305.040092] [drm:intel_atomic_commit_tail [i915]] [ENCODER:48:DP-MST B]
>[13305.040137] [drm:intel_atomic_commit_tail [i915]] [ENCODER:49:DP-MST C]
>[13305.040181] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DDI C]
>[13305.040225] [drm:intel_atomic_commit_tail [i915]] [ENCODER:54:DP-MST A]
>[13305.040266] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DP-MST B]
>[13305.040307] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:DP-MST C]
>[13305.040357] [drm:verify_connector_state [i915]] [CONNECTOR:46:DP-1]
>[13305.040407] [drm:verify_connector_state [i915]] [CONNECTOR:50:HDMI-A-1]
>[13305.040455] [drm:verify_connector_state [i915]] [CONNECTOR:53:DP-2]
>[13305.040502] [drm:verify_connector_state [i915]] [CONNECTOR:57:HDMI-A-2]
>[13305.040548] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 0
>[13305.040631] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 1
>[13305.040676] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 2
>[13305.040719] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 3
>[13305.040779] [drm:intel_enable_shared_dpll [i915]] enable DPLL 0 (active 1, on? 0) for crtc 26
>[13305.040829] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 0
>[13305.040903] [drm:edp_panel_on [i915]] Turn eDP port A panel power on
>[13305.040960] [drm:wait_panel_power_cycle [i915]] Wait for panel power cycle
>[13305.485737] [drm:wait_panel_status [i915]] mask b800000f value 00000000 status 00000000 control 00000000
>[13305.485811] [drm:wait_panel_status [i915]] Wait complete
>[13305.485892] [drm:edp_panel_on [i915]] Wait for panel power on
>[13305.486004] [drm:wait_panel_status [i915]] mask b000000f value 80000008 status 9000000a control 00000003
>[13305.546526] [drm:intel_get_hpd_pins [i915]] hotplug event received, stat 0x01000000, dig 0x12101010, pins 0x00000010
>[13305.546599] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
>[13305.546661] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on PIN 4 - cnt: 3
>[13305.546784] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port A
>[13305.686470] [drm:wait_panel_status [i915]] Wait complete
>[13305.686574] [drm:edp_panel_vdd_on [i915]] Turning eDP port A VDD on
>[13305.686684] [drm:edp_panel_vdd_on [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x0000000b
>[13305.687886] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[13305.687940] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[13305.687992] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[13305.688046] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[13305.688779] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 04000000
>[13305.688828] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[13305.688876] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[13305.689848] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[13305.689901] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS3
>[13305.690944] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 05000000
>[13305.690993] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 1
>[13305.691040] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 1
>[13305.692057] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[13305.692264] [drm:skylake_pfit_enable [i915]] for crtc_state = ffff88f9e6372000
>[13305.692565] [drm:intel_enable_pipe [i915]] enabling pipe A
>[13305.692583] [drm:intel_edp_backlight_on.part.28 [i915]] 
>[13305.692596] [drm:intel_panel_enable_backlight [i915]] pipe A
>[13305.692662] [drm:intel_panel_actually_set_backlight [i915]] set backlight PWM = 937
>[13305.697503] [drm:intel_psr_enable [i915]] PSR disable by flag
>[13305.697518] [drm:intel_edp_drrs_enable [i915]] Panel doesn't support DRRS
>[13305.709548] [drm:verify_connector_state [i915]] [CONNECTOR:37:eDP-1]
>[13305.709592] [drm:intel_atomic_commit_tail [i915]] [CRTC:26:pipe A]
>[13305.709645] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 0
>[13305.726326] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13305.743135] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13305.759900] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13305.776626] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13305.793376] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13305.810117] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13305.826859] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13305.843603] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13305.860381] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13305.877123] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13305.893881] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13305.910612] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13305.927345] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13305.944082] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13305.960849] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13305.977582] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13305.994237] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.011077] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.027802] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.044544] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.061296] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.078041] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.094769] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.111521] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.128244] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.145007] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.161749] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.178498] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.195227] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.211979] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.228725] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.245529] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.262250] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.278860] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.295719] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.312420] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.329177] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.345850] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.362632] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.379323] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.396092] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.412861] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.429634] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.446415] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.463174] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.479902] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.496529] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.513358] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.530105] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.546859] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.563563] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.580210] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.597045] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.613744] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.630545] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.647274] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.664007] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.680755] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.697575] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.714266] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.731020] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.747785] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.764538] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.781316] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.797937] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.814791] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.831475] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.848144] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.864924] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.881654] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.898441] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.915180] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.931945] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.948668] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13306.965426] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13306.982162] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13306.998925] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13307.015638] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13307.032407] [drm:drm_mode_addfb2 [drm]] [FB:59]
>[13307.049123] [drm:drm_mode_addfb2 [drm]] [FB:65]
>[13307.065908] [drm:drm_mode_addfb2 [drm]] [FB:68]
>[13307.088265] [IGT] kms_flip: exiting, ret=99
>[13307.099213] [drm:intel_atomic_check [i915]] [CONNECTOR:50:HDMI-A-1] checking for sink bpp constrains
>[13307.099266] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[13307.099321] [drm:intel_hdmi_compute_config [i915]] picking bpc to 8 for HDMI output
>[13307.099369] [drm:intel_hdmi_compute_config [i915]] forcing pipe bpc to 24 for HDMI
>[13307.099417] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[13307.099473] [drm:intel_dump_pipe_config [i915]] [CRTC:30:pipe B][modeset] config ffff88f9e7db5800 for pipe B
>[13307.099520] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: B
>[13307.099565] [drm:intel_dump_pipe_config [i915]] pipe bpp: 24, dithering: 0
>[13307.099607] [drm:intel_dump_pipe_config [i915]] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13307.099648] [drm:intel_dump_pipe_config [i915]] dp: 0, lanes: 4, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13307.099689] [drm:intel_dump_pipe_config [i915]] dp: 0, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13307.099727] [drm:intel_dump_pipe_config [i915]] audio: 1, infoframes: 1
>[13307.099764] [drm:intel_dump_pipe_config [i915]] requested mode:
>[13307.099805] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[13307.099846] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[13307.099880] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1080" 60 148500 1920 2008 2052 2200 1080 1084 1089 1125 0x48 0x5
>[13307.099923] [drm:intel_dump_pipe_config [i915]] crtc timings: 148500 1920 2008 2052 2200 1080 1084 1089 1125, type: 0x48 flags: 0x5
>[13307.099961] [drm:intel_dump_pipe_config [i915]] port clock: 148500
>[13307.099998] [drm:intel_dump_pipe_config [i915]] pipe src size: 1920x1080
>[13307.100035] [drm:intel_dump_pipe_config [i915]] num_scalers: 2, scaler_users: 0x0, scaler_id: -1
>[13307.100073] [drm:intel_dump_pipe_config [i915]] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13307.100110] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13307.100145] [drm:intel_dump_pipe_config [i915]] ips: 0
>[13307.100180] [drm:intel_dump_pipe_config [i915]] double wide: 0
>[13307.100216] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x21, cfgcr1: 0x80400173, cfgcr2: 0x3a5
>[13307.100251] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[13307.100288] [drm:intel_dump_pipe_config [i915]] [PLANE:28:plane 1B] disabled, scaler_id = -1
>[13307.100324] [drm:intel_dump_pipe_config [i915]] [PLANE:29:cursor B] disabled, scaler_id = -1
>[13307.100359] [drm:intel_dump_pipe_config [i915]] [PLANE:31:plane 2B] disabled, scaler_id = -1
>[13307.100411] [drm:intel_atomic_check [i915]] [CONNECTOR:53:DP-2] checking for sink bpp constrains
>[13307.100458] [drm:intel_atomic_check [i915]] clamping display bpp (was 36) to EDID reported max of 24
>[13307.100509] [drm:intel_dp_compute_config [i915]] DP link computation with max lane count 4 max bw 270000 pixel clock 154000KHz
>[13307.100557] [drm:intel_dp_compute_config [i915]] DP link bw 06 rate select 00 lane count 4 clock 162000 bpp 24
>[13307.100601] [drm:intel_dp_compute_config [i915]] DP link bw required 369600 available 518400
>[13307.100648] [drm:intel_atomic_check [i915]] hw max bpp: 36, pipe bpp: 24, dithering: 0
>[13307.100691] [drm:intel_dump_pipe_config [i915]] [CRTC:34:pipe C][modeset] config ffff88f9e7db1000 for pipe C
>[13307.100729] [drm:intel_dump_pipe_config [i915]] cpu_transcoder: C
>[13307.100766] [drm:intel_dump_pipe_config [i915]] pipe bpp: 24, dithering: 0
>[13307.100805] [drm:intel_dump_pipe_config [i915]] fdi/pch: 0, lanes: 0, gmch_m: 0, gmch_n: 0, link_m: 0, link_n: 0, tu: 0
>[13307.100843] [drm:intel_dump_pipe_config [i915]] dp: 1, lanes: 4, gmch_m: 5980766, gmch_n: 8388608, link_m: 249198, link_n: 262144, tu: 64
>[13307.100881] [drm:intel_dump_pipe_config [i915]] dp: 1, lanes: 4, gmch_m2: 0, gmch_n2: 0, link_m2: 0, link_n2: 0, tu2: 0
>[13307.100918] [drm:intel_dump_pipe_config [i915]] audio: 0, infoframes: 0
>[13307.100953] [drm:intel_dump_pipe_config [i915]] requested mode:
>[13307.100989] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[13307.101028] [drm:intel_dump_pipe_config [i915]] adjusted mode:
>[13307.101061] [drm:drm_mode_debug_printmodeline [drm]] Modeline 0:"1920x1200" 60 154000 1920 1968 2000 2080 1200 1203 1209 1235 0x48 0x9
>[13307.101103] [drm:intel_dump_pipe_config [i915]] crtc timings: 154000 1920 1968 2000 2080 1200 1203 1209 1235, type: 0x48 flags: 0x9
>[13307.101139] [drm:intel_dump_pipe_config [i915]] port clock: 162000
>[13307.101174] [drm:intel_dump_pipe_config [i915]] pipe src size: 1920x1200
>[13307.101211] [drm:intel_dump_pipe_config [i915]] num_scalers: 1, scaler_users: 0x0, scaler_id: -1
>[13307.101247] [drm:intel_dump_pipe_config [i915]] gmch pfit: control: 0x00000000, ratios: 0x00000000, lvds border: 0x00000000
>[13307.101284] [drm:intel_dump_pipe_config [i915]] pch pfit: pos: 0x00000000, size: 0x00000000, disabled
>[13307.101319] [drm:intel_dump_pipe_config [i915]] ips: 0
>[13307.101354] [drm:intel_dump_pipe_config [i915]] double wide: 0
>[13307.101390] [drm:intel_dump_pipe_config [i915]] dpll_hw_state: ctrl1: 0x5, cfgcr1: 0x0, cfgcr2: 0x0
>[13307.101435] [drm:intel_dump_pipe_config [i915]] planes on this crtc
>[13307.101492] [drm:intel_dump_pipe_config [i915]] [PLANE:32:plane 1C] disabled, scaler_id = -1
>[13307.101527] [drm:intel_dump_pipe_config [i915]] [PLANE:33:cursor C] disabled, scaler_id = -1
>[13307.101562] [drm:intel_dump_pipe_config [i915]] [PLANE:35:plane 2C] disabled, scaler_id = -1
>[13307.101614] [drm:intel_atomic_check [i915]] New cdclk calculated to be atomic 450000, actual 450000
>[13307.101679] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[13307.101730] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:28:plane 1B] scaler_user index 1.3
>[13307.101776] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:32:plane 1C] scaler_user index 2.6
>[13307.101835] [drm:intel_find_shared_dpll [i915]] [CRTC:30:pipe B] allocated DPLL 1
>[13307.101880] [drm:intel_reference_shared_dpll [i915]] using DPLL 1 for pipe B
>[13307.101929] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:30:pipe B] scaler_user index 1.31
>[13307.101976] [drm:intel_find_shared_dpll [i915]] [CRTC:34:pipe C] allocated DPLL 2
>[13307.102020] [drm:intel_reference_shared_dpll [i915]] using DPLL 2 for pipe C
>[13307.102067] [drm:skl_update_scaler_crtc [i915]] Updating scaler for [CRTC:34:pipe C] scaler_user index 2.31
>[13307.102155] [drm:intel_disable_sagv [i915]] Disabling the SAGV
>[13307.105635] [drm:intel_atomic_commit_tail [i915]] [ENCODER:36:DDI A]
>[13307.105692] [drm:intel_atomic_commit_tail [i915]] [ENCODER:45:DDI B]
>[13307.105742] [drm:intel_atomic_commit_tail [i915]] [ENCODER:47:DP-MST A]
>[13307.105790] [drm:intel_atomic_commit_tail [i915]] [ENCODER:48:DP-MST B]
>[13307.105833] [drm:intel_atomic_commit_tail [i915]] [ENCODER:49:DP-MST C]
>[13307.105875] [drm:intel_atomic_commit_tail [i915]] [ENCODER:52:DDI C]
>[13307.105917] [drm:intel_atomic_commit_tail [i915]] [ENCODER:54:DP-MST A]
>[13307.105958] [drm:intel_atomic_commit_tail [i915]] [ENCODER:55:DP-MST B]
>[13307.105997] [drm:intel_atomic_commit_tail [i915]] [ENCODER:56:DP-MST C]
>[13307.106046] [drm:verify_connector_state [i915]] [CONNECTOR:46:DP-1]
>[13307.106100] [drm:verify_connector_state [i915]] [CONNECTOR:57:HDMI-A-2]
>[13307.106147] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 0
>[13307.106191] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 1
>[13307.106232] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 2
>[13307.106273] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 3
>[13307.115984] [drm:intel_enable_shared_dpll [i915]] enable DPLL 1 (active 2, on? 0) for crtc 30
>[13307.116042] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 1
>[13307.117685] [drm:skylake_pfit_enable [i915]] for crtc_state = ffff88f9e7db5800
>[13307.118229] [drm:intel_enable_pipe [i915]] enabling pipe B
>[13307.118298] [drm:intel_audio_codec_enable [i915]] ELD on [CONNECTOR:50:HDMI-A-1], [ENCODER:45:DDI B]
>[13307.118348] [drm:hsw_audio_codec_enable [i915]] Enable audio codec on pipe B, 28 bytes ELD
>[13307.118401] [drm:audio_config_hdmi_pixel_clock.isra.4 [i915]] Configuring HDMI audio for pixel clock 148500 (0x00090000)
>[13307.118559] [drm:intel_enable_shared_dpll [i915]] enable DPLL 2 (active 4, on? 0) for crtc 34
>[13307.118631] [drm:intel_enable_shared_dpll [i915]] enabling DPLL 2
>[13307.121938] [drm:intel_dp_set_signal_levels [i915]] Using signal levels 00000000
>[13307.121990] [drm:intel_dp_set_signal_levels [i915]] Using vswing level 0
>[13307.122058] [drm:intel_dp_set_signal_levels [i915]] Using pre-emphasis level 0
>[13307.122114] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS1
>[13307.122783] [drm:intel_dp_start_link_train [i915]] clock recovery OK
>[13307.122837] [drm:intel_dp_program_link_training_pattern [i915]] Using DP training pattern TPS2
>[13307.123782] [drm:intel_dp_start_link_train [i915]] Channel EQ done. DP Training successful
>[13307.125689] [drm:skylake_pfit_enable [i915]] for crtc_state = ffff88f9e7db1000
>[13307.126223] [drm:intel_enable_pipe [i915]] enabling pipe C
>[13307.143086] [drm:verify_connector_state [i915]] [CONNECTOR:50:HDMI-A-1]
>[13307.143146] [drm:intel_atomic_commit_tail [i915]] [CRTC:30:pipe B]
>[13307.143220] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 1
>[13307.143275] [drm:verify_connector_state [i915]] [CONNECTOR:53:DP-2]
>[13307.143325] [drm:intel_atomic_commit_tail [i915]] [CRTC:34:pipe C]
>[13307.143386] [drm:verify_single_dpll_state.isra.114 [i915]] DPLL 2
>[13307.154947] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13307.154992] [drm:_i915_gem_object_create_stolen [i915]] offset=0x11000, size=16384
>[13307.155361] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13307.155400] [drm:_i915_gem_object_create_stolen [i915]] offset=0x15000, size=16384
>[13307.155532] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13307.155575] [drm:_i915_gem_object_create_stolen [i915]] offset=0x19000, size=16384
>[13307.155651] [drm:i915_gem_object_create_stolen [i915]] creating stolen object: size=4000
>[13307.155686] [drm:_i915_gem_object_create_stolen [i915]] offset=0x1d000, size=16384
>[13307.169199] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:23:plane 1A] scaler_user index 0.0
>[13307.169232] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:28:plane 1B] scaler_user index 1.3
>[13307.169261] [drm:intel_plane_atomic_calc_changes [i915]] Updating scaler for [PLANE:32:plane 1C] scaler_user index 2.6
>[13308.941725] [drm:edp_panel_vdd_off_sync [i915]] Turning eDP port A VDD off
>[13308.941833] [drm:edp_panel_vdd_off_sync [i915]] PP_STATUS: 0x80000008 PP_CONTROL: 0x00000007

Actions: View

Attachments on bug 98362: 127440 | 127441

Use of freedesktop.org services, including Bugzilla, is subject to our Code of Conduct. How we collect and use information is described in our Privacy Policy.